TRUE or FALSE for Question 1 to Question 5

Question 1: In a load and store architecture, the only instructions that access
memory are load and store.

TRUE

Question 2: More powerful instructions lead to higher performance since the

total number of instructions executed is smaller for a given task with more
powerful instructions.

FALSE: It is true that fewer instructions required for more powerful

instructions; however, complex instructions are hard to implement which may
slow down all instructions, including simple ones.

Question 3: MIPS has two basic data transfer instructions including lw and
sw. The memory address is a 16-bit address formed by adding the contents of
the program counter to the offset value.

FALSE: MIPS has two basic data transfer instructions including lw and sw.
The memory address is a 32-bit address formed by adding the contents of the
base address register to the offset value.

Question 4: The optimized division algorithm comes from shifting the

operands and the quotient simultaneously with the subtraction. This
refinement halves the width of the adder and registers by noticing where there
are unused portions of registers and adders.

TRUE

Question 5: The one complication of signed division is that we must also set
the sign of the remainder. To avoid ambiguity, the dividend and remainder
must have the same signs, no matter what the signs of the divisor and quotient.
Thus the correctly signed division algorithm negates the quotient if the signs
of the operands are opposite and makes the sign of the nonzero remainder
match the dividend.

TRUE

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Question 6: If the current value of the PC address is 0x0C3A1F00, is it
possible to use a single BRANCH instruction to get to the PC address to the
32-bit constant address: 0010 0000 0000 0001 0100 1001 0010 01002? What if
the current value of PC address change to 0x1FFFF000, can you use a single
BRANCH instruction? Is it possible to get the addresses with a single a JUMP
instruction? Explain your answer.

MIPS instructions are 32-bit (4-byte)

A BRANCH instruction has 16-bit address, which can reach as far as
±2^15 instructions = ± 2^17 bytes = ± 131072 bytes. This makes is possible to
branch to ± 131072 bytes (± 128kB) within the branch instruction.

Binary: 0010 0000 0000 0001 0100 1001 0010 01002 = Decimal: 536955172

Hexadecimal: C3A1F00 = Decimal: 205135616

No. 205135616 is not in range 205135616 ± 131072.

Hexadecimal: 1FFFF000 = Decimal: 536870908

536955172 is in range 536870908 ± 131072.
Yes.

JUMP:
The lower 28 bits of the target address are set to the 26 least significant bits of
the J instruction word, shifted 2 bits to the left.
The upper 4 bits of the target address are set to the 4 most significant bits of
the address of the instruction in the branch delay slot.

The target address is:

0010 0000 0000 0001 0100 1001 0010 0100
PC address 1: 0x0C3A1F00 = 0000 1100 0011 1010 0001 1111 0000 00002
PC address 2: 0x1FFFF000 = 0001 1111 1111 1111 1111 0000 0000 00002

So neither address can JUMP to the target address.

Question 7: In lecture slides, we introduce the MIPS implementation for

factorial. Please convert the following factorial code into MIPS
implementation and DRAW and explain how the stack grows along with the
recursive process when n = 2.
int fact (int n)
{

2
 If(n<1) return 1;
Else return n*fact(n-1);
}

Argument n in $a0
Result in $v0
Fact:
addi $sp, $sp, -8
sw $ra, 4($sp)
sw $a0, 0($sp)
slti $t0, $a0，1
beq $t0, $zero, L1
addi $v0, $zero, 1
addi $sp, $sp, 8
jr $ra
L1:
addi $a0, $a0, -1
jal fact
lw $a0, 0($sp)
lw $ra, 4($sp)
addi $sp, $sp, 8
mul $v0, $a0, $v0
jr $ra

Stack
n=2
$ra for n=2 $ra for n=2 $ra for n=2 $ra for n=2 $ra for n=2
var n=2 var n=2 var n=2 var n=2 var n=2
$ra for n=1 $ra for n=1 $ra for n=1
var n=1 var n=1 var n=1
$ra for n=0
var n=0

Question 8: Some recursive procedures can be implemented iteratively

without using recursion. Iteration can significantly improve performance by
removing the overhead associated with recursive procedure calls. For example,
consider a procedure used to accumulate a sum.
int sum (int n, int acc) {
if (n >0)
return sum(n – 2, acc + n);
else

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 return acc;
}
Convert this program into MIPS very efficiently without recursion.
n in $a0, acc in $a1

ANS: Book example

sum:
slti $t0, $a0, 1 #test if n <= 0
bne $t0, $zero, L1 #go to L1 if n <= 0
add $a1, $a1, $a0 #add n to acc
addi $a0, $a0, –2 #subtract 2 from n
j sum #go to sum

L1:
Add $v0, $a1, $zero #return value acc
jr $ra # return to caller

Question 9: In the lecture slides, we introduce the MIPS implementation for

bubble sort. Please convert the following bubble sort code into MIPS
implementation, including the complete implementation of swap function.
Note: please use $a0 and $a1 for swap().

See Chapter 2, page 96-101

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Question 10: Represent the following numbers into a binary single precision
floating-point number and list the Exponent, Sign, Mantissa parts separately.
Your answer should be 32 bits long ordered by 1 sign bit, 8 exponent bits, and
fraction bits.
A) -0.9
B) 1.2
C) 0.75

A) -0.9(10) = -0.111 0011 0011 0011 0011 0011(2) = 1.110 0110 0110 0110 0110
0110(2) x 2-1
Exponent: -1+2(8-1)-1 = 126(10) = 01111110(2)
Sign = 1
Mantissa = 110 0110 0110 0110 0110 0110
-0.9(10) = 1 01111110 110 0110 0110 0110 0110 0110 (32 bits IEEE 754)

B) 1.2(10) = 1.001 1001 1001 1001 1001 1001 (2) = 1.001 1001 1001 1001 1001
1001(2) x 2-0
Exponent: 0+2(8-1)-1 = 127(10) = 01111111(2)
Sign = 0
Mantissa = 001 1001 1001 1001 1001 1001
1.2(10) = 0 01111111 001 1001 1001 1001 1001 1001 (32 bits IEEE 754)

C) 0.75(10) = 1.1(2) x 2-1

Exponent: -1+2(8-1)-1 = 126(10) = 01111110(2)
Sign = 0
Mantissa = 100 0000 0000 0000 0000 0000
0.75(10) = 0 - 0111 1110 - 10000000000000000000000 (32 bits IEEE 754)

Question 11: (a) Please draw both the optimized multiplication machine
schematic and first-version (unoptimized) multiplication machine schematics
using 32-bit/64-bit ALU and Registers.
ANS: See Textbook, Page 186 and 184, Figure 3.5 and Figure 3.3

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(b) Please describe the full control test logic for operating the first-version
(unoptimized) multiplication machine you designed in question (a).
ANS: textbook page 185, Fig. 3.4

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(c) Using a 6-bit version of the multiplication algorithm in question (b), let’s
try multiplication of integers 21 (010 101)2 and 05 (000 101)2 which results in
105 (000 001 101 001)2. Please complete the table below including the
following columns, Iteration (starting with iteration 0), step, multiplicand,
multiplier and Product to show the contents stored in the 12 bit Product
register while calculating the multiplication results. Please use 12-bit ALU, 12-
bit multiplicand register and 6-bit multiplier register.

ANS:

Iteration step multiplier multiplicand product

0 Initial values 010 101 000 000 000 101 000 000 000 000
1 1a: Prod = Prod + Mcand 010 101 000 0000000 101 000 000 000 101
1 2: Shift left Multiplicand 010 101 000 000 001 010 000 000 000 101
1 3: Shift right Multiplier 001 010 000 000 001 010 000 000 000 101
2 1: No operation 001 010 000 000 001 010 000 000 000 101
2 2: Shift left Multiplicand 001 010 000 000 010 100 000 000 000 101
2 3: Shift right Multiplier 000 101 000 000 010 100 000 000 000 101
3 1a: Prod = Prod + Mcand 000 101 000 000 010 100 000 000 011 001
3 2: Shift left Multiplicand 000 101 000 000 101 000 000 000 011 001
3 3: Shift right Multiplier 000 010 000 000 101 000 000 000 011 001
4 1: No operation 000 010 000 000 101 000 000 000 011 001
4 2: Shift left Multiplicand 000 010 000 001 010 000 000 000 011 001
4 3: Shift right Multiplier 000 001 000 001 010 000 000 000 011 001
5 1a: Prod = Prod + Mcand 000 001 000 001 010 000 000 001 101 001
5 2: Shift left Multiplicand 000 001 000 010 100 000 000 001 101 001
5 3: Shift right Multiplier 000 000 000 010 100 000 000 001 101 001
6 1: No operation 000 000 000 010 100 000 000 001 101 001
6 2: Shift left Multiplicand 000 000 000 101 000 000 000 001 101 001
6 3: Shift right Multiplier 000 000 000 101 000 000 000 001 101 001