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Charge Pump Phase-Locked Loop With Phase-Frequency Detector: Closed Form Mathematical Model
Charge Pump Phase-Locked Loop With Phase-Frequency Detector: Closed Form Mathematical Model
Abstract—Charge pump phase-locked loop with examples are given for the first time, the main idea of
phase-frequency detector (CP-PLL) is an electrical Example 1 was already noticed by P. Acco and O. Feely
circuit, widely used in digital systems for frequency [1], [9]. P. Acco and O. Feely considered only near-locked
synthesis and synchronization of the clock signals. In
this paper a non-linear second-order model of CP-PLL state, therefore they didn’t notice problems with out-of-
is rigorously derived. The obtained model obviates the lock behavior. Example 2 and Example 3 demonstrate
shortcomings of previously known second-order models problems with out-of-lock behavior, which was not discov-
of CP-PLL. Pull-in time is estimated for the obtained ered before.
second-order CP-PLL. Note that while derivation of non-linear mathematical
models for high-order CP-PLL requires numerical solution
I. Introduction of non-linear algebraic equations or allows to find only
approximate solutions (see, e.g. [6], [8], [13], [14], [16],
HASE-locked loops (PLLs) are electronic circuits,
P designed for generation of an electrical signal (volt-
age), while the frequency is automatically tuned to the
[19], [33], [36]), non-linear mathematical models for the
second order CP-PLL can be found in closed-form. Fur-
ther, we consider only the second order CP-PLL. Noise
frequency of an input (reference, Ref) signal. Charge pump
performance and simulation of PLL is discussed in [3], [26],
phase-locked loop with phase-frequency detector (Charge
[28], [29], [32].
pump PLL, CP-PLL, CPLL) is widely used in digital
systems for frequency synthesis and synchronization of the
II. A model of charge pump phase-locked loop
clock signals [3]. The CP-PLL is able to quickly lock onto
with phase-frequency detector in the signal
the phase of the incoming signal, achieving low steady-
space
state phase error [7]. Important issues in the design of PLL
are estimation of the ranges of deviation between oscilla- Consider charge pump phase-locked loop with phase-
tors frequencies for which a locked state can be achieved, frequency detector [10], [12] on Fig. 1. Both reference
the stability analysis of the locked states, and study of and output of the voltage controlled oscillator (VCO) are
possible transient processes. The pioneering monographs square waveform signals, see Fig. 2.
[11], [31], [35] were published in 1966, a rather comprehen-
sive bibliography [24] was published in 1973, and recent trailing edge
surveys [4], [23]. For the corresponding study of the CP-
PLL F. Gardner developed in 1980 a linearized model in
vicinity of locked states [10], [12]. Then an approximate
discrete-time linear models of the CP-PLL were suggested 1 2 3
in [17], [25]. However, linear models are essentially limited, Fig. 2: Waveforms of the reference and voltage controlled
since only local behavior near locked states can be studied. oscillator (VCO) signals are periodic functions with period
For the study of non-local behavior and transient processes equal to one. Trailing edges happen at the integer values of
some nonlinear second-order models of the CP-PLL were corresponding phases.
developed in [2], [7], [34].
Examples from section V demonstrate that algorithm Without loss of generality we suppose that trailing edges
and formulas suggested by M. van Paemel in [34] should of VCO and reference signals occur when corresponding
be used carefully for simulation even inside allowed area phase reaches an integer number. The frequency ωref of
(see Fig. 18 and Fig. 22 in original paper [34]). While the reference signal (reference frequency) is usually assumed
to be constant:
(a ) Faculty of Mathematics and Mechanics, Saint-Petersburg State t
University, Russia; (b ) Dept. of Mathematical Information Technol- θref (t) = ωref t = , (1)
ogy, University of Jyväskylä, Finland; (c ) Institute for Problems in Tref
Mechanical Engineering of Russian Academy of Science, Russia; (cor-
responding author email: nkuznetsov239@gmail.com). This paper is where Tref , ωref and θref (t) are the period, frequency and
an extended version of [22] phase of reference signal.
2
Reference PFD R
C
Loop filter
( ) + 1 +
+ s +
VCO
Fig. 1: Charge pump phase-locked loop with phase-frequency detector (Charge pump PLL)
The phase-frequency detector (PFD) is a digital circuit, The relationship between the input current i(t) and
triggered by the trailing (falling) edges of the reference Ref the output voltage vF (t) for a proportionally integrating
and VCO signals. The output signal of PFD i(t) can have (perfect PI) filter based on resistor and capacitor
only three states (Fig. 3): 0, +Ip , and −Ip . 1
H(s) = R + ,
Cs
Ref Ref is as follows
Zt
1
VCO -Ip 0 Ip Ref vF (t) = vc (0) + Ri(t) + i(τ )dτ, (2)
C
0
VCO
Thus, condition τk+1 ≥ 0 can be expressed via vk and τk
in the following way4 : PFD
Ip
0
-Ip
free
(Tref − (τk mod Tref )) ωvco + Kvco vk ≤ 1. (14)
VCO
Now find τk+1 . VCO trailing edges appeared twice on freq.
time interval [tk , tk+2 ): at t = tmiddle
k and at t = tmiddle
k+1 .
Thus, we get
By (3) it is equivalent to 0
time
tZk+1 tmiddle
k+1
Z (a) Case 2 1: general case, Reference and VCO cycle slipping;
ωvco (t)dt + ωvco (t)dt = 1. (16) τk ≥ 0, τk+1 < 0
tmiddle tk+1 Fig. 8: Subcases of the Case 2. Integral of the VCO frequency
k
ωvco over the VCO period Tvco is pink subgraph area (grey in
By definition of τk (7) we get (see Fig. 30a) black/white). The integral is equal to 1 according to the PFD
switching law and definition of time intervals.
tk+1 = tmiddle
k − (τk mod Tref ) + Tref ,
(17) Similarly to the previous case, we can derive a relation
tmiddle
k+1 = tk+1 + τk+1 .
for τk+1 by integrating VCO frequency ωvco (t) over its
4 Here (a mod b) is the remainder after division of a by b, where a
period [tmiddle
k , tk+1 ]:
is the dividend and b is the divisor. This function is often called the
free
modulo operation. (Tref + τk+1 − (τk mod Tref )) ωvco + Kvco vk = 1.
5
VCO
PFD Ip
0
i(t) -Ip
time
0
IpKvcolk (a) Case 4 1: general case, VCO and Reference cycle slipping;
C
τk < 0, τk+1 > 0
Fig. 10: Subcases of the Case 4. Integral of the VCO frequency
ωvco over the VCO period Tvco is pink subgraph area (grey in
black/white). The integral is equal to 1 according to the PFD
switching law and definition of time intervals.
(a) Case 3 1: general case, VCO cycle slipping; τk < where lb = tmiddle middle can be computed in the follow-
0, τk+1 < 0 k+1 − tk
ing way
Fig. 9: Subcases of the Case 3. Integral of the VCO frequency
ωvco over the VCO period Tvco is pink subgraph area (grey in 1 − Sla
black/white). The integral is equal to 1 according to the PFD lb = lb (τk , vk ) = free
,
switching law and definition of time intervals. Kvco vk + ωvco
Sla = Sla (τk , vk ) = Slk mod 1,
(28)
First, we determine the sign of τk+1 . To do that we Slk = Slk (τk , vk ) =
need to find out which of the signals (VCO or reference) τ2
free
reaches its period first after tmiddle , i.e. to check if lb = − Kvco vk − Ip RKvco + ωvco τk + Kvco Ip k .
k 2C
tk+1 − tmiddle
k ≤ Tref . By (10) for the time interval lb we
get (see Fig. 32) Now we can compute the VCO phase corresponding to its
Slb full period:
lb = lb (vk ) = free
, (23)
Kvco vk + ωvco
Sla + STref + Sτk+1 = 1,
where free
STref = STref (vk ) = Tref (Kvco vk + ωvco ),
tZk+1
free
Slb = ωvco (t)dt = 1 − Sla . (24) Sτk+1 = Sτk+1 (τk+1 , vk ) = τk+1 Kvco vk + ωvco + Ip RKvco +
tmiddle
k Ip Kvco τ 2 (k + 1)
+ .
Here Sla (green area in Fig. 32) is computed as a fractional 2C
(29)
part of the subgraph area corresponding to lk = −τk : From (27) there is only one positive solution τk+1 of
Sla = Sla (τk , vk ) = Slk mod 1, quadratic equation
Slk = Slk (τk , vk ) = √
(25) −b + b2 − 4ad
free
lk2 τk+1 = ,
= Kvco vk − Ip RKvco + ωvco lk + Kvco Ip . 2a
2C Kvco Ip
a= , (30)
Finally, we get 2C
free
1 − Sla b = b(vk ) = ωvco + Kvco vk + Kvco Ip R,
τk+1 = − Tref . (26)
free
Kvco vk + ωvco d = b(τk , vk ) = Sla + STref − 1,
6
IV. Corrected full discrete model of CP-PLL agreement with engineering requirements for a particular
Combining equations for all four cases we obtain a application. The ideal case is τlock = 0.
discrete time nonlinear mathematical model of CP-PLL There is a hypothesis, which has not yet been proven
rigorously, that the hold-in and pull-in ranges5 coincide
Ip and both are infinite if the model has a locked state (see,
vk+1 = vk + τk+1 (τk , vk ),
C (31) e.g. [2], [7], [18]).
k = 0, 1, 2, ...
with initial conditions v0 and τ0 . Function τk+1 (τk , vk ) is B. Pull-in time
defined by the following equation One of the important characteristics of CP-PLL is how
√ fast it acquires a locked state during the pull-in process.
−b+ b2 −4ac
2a , τk ≥ 0, c ≤ 0, Suppose that the CP-PLL is in a locked state with input
frequency ωref1 . Then the reference frequency changes to
1 new frequency ωref2 from fixed range [ωref min , ω max ]. Since
free − Tref + (τk mod Tref ), ref
ωvco +Kvco vk
CP-PLL lost it’s locked state, the feedback loop of CP-
τk+1 (τk , vk ) = τk ≥ 0, c > 0,
PLL tunes the VCO to the new input frequency to acquire
new locked state. Transient process takes time Tref1→ref2 ,
lb − Tref , τk < 0, lb ≤ Tref ,
and maximum of such possible time intervals is called a
√
pull-in time Tpull-in . The pull-in time can be measured in
−b+ b2 −4ad
2a , τk < 0, lb > Tref , seconds or the number of cycles of the input frequency.
(32) In practice (34) is hard to check for all k. Instead for
Kvco Ip simulation one may check that additionally to small τk
a= ,
2C frequency of VCO is close to reference frequency:
free
b = b(vk ) = ωvco + Kvco vk + Kvco Ip R,
τk
c = c(τk , vk ) = ≤ τlock ,
Tref
free
(35)
(Tref − (τk mod Tref )) ωvco + Kvco vk − 1, free 1
ωvco + Kvco vk − < ωlock .
1−Sla (33) Tref
lb = lb (τk , vk ) = free ,
Kvco vk +ωvco
Sla = Sla (τk , vk ) = Slk mod 1, V. Comparison with original model by M. van
Paemel
Slk = Slk (τk , vk ) =
τk2
In this section using original notation [34] we demostrate
free
− Kvco vk − Ip RKvco + ωvco τk + Kvco Ip 2C , why existing model has problems and how proposed model
free fixes them.
d = d(vk ) = Sla + Tref (Kvco vk + ωvco ) − 1.
Here the initial conditions are the following: v0 is the initial A. Example 1
output of the filter, τ0 is determined by θvco (0) and i(0). Consider the following set of parameters and initial
If at some point VCO becomes overloaded (frequency state:
approaches zero) one should stop simulation or use another
set of equations, based on ideas similar to (34) and (35) R2 = 0.2; C = 0.01; Kv = 20; Ip = 0.1; T = 0.125;
(36)
in [34], see section VIII. τ (0) = 0.0125; v(0) = 1.
Calculation of normalized parameters (equations (27)-(28)
A. Locked states, hold-in range, and pull-in range and (44)-(45) in [34])
After the synchronization is achieved, i.e. transient pro- KN = Ip R2 Kv T = 0.05,
cess is over, the loop is said to be in a locked state. For R2 C
practical purposes, only asymptotically stable locked states, τ2N = = 0.016,
Tr
in which the loop returns after small perturbations of its 1 KN (37)
state, are of interest. CP-PLL is in a locked state if FN = ≈ 0.2813,
2π τ2N
trailing edges of the VCO signal happens near the trailing √
KN τ2N
edges of the reference signal: ζ= ≈ 0.0141,
2
τk shows that parameters (36) correspond to allowed area in
≤ τlock , k = 0, 1, 2, ..., (34)
Tref Fig. 13 (equations (46)–(47), Fig 18 and Fig. 22 in [34]):
where τlock is sufficiently small, and the loop returns in 5 The largest symmetric interval (continuous range, without holes)
this state after small perturbations of (vk , τk ). of frequencies around free-running frequency of the VCO is called
In a locked state the output of PFD i(t) can be non- a hold-in range if the loop has a locked state. If, in addition, the
loop acquires a locked state for any initial state of the loop and any
zero only on short time intervals (shorter than τlock ). reference frequency from the interval then the interval is called a
An allowed residual phase difference τlock should be in pull-in range [4], [20], [21], [23].
7
Fig. 11: Parameters for Example 1, Example 2, and Example 3 correspond to allowed area (see Fig 18 and Fig. 22 in [34])
p
1 + ζ2 − ζ Therefore the algorithm is terminated with error.
FN < ≈ 0.3138,
π (38) From (36) for our model we have:
1
FN < ≈ 5.6438.
4πζ free
ωvco = 0,
Now we use the flowchart in Fig. 12 (Fig. 10 in [34]) to c = (T − (τ (0) mod T ))Kv v(0) − 1 = 1.2500,
1 (41)
τ (1) = − T + (τ (0) mod T ) = −0.0625,
Example 1. Kv v(0)
Example 2.
Ip
v(1) = v(0) + τ (1) = 0.3750.
Example 3. C
B. Example 2
ERROR In this case (37), (38), and Fig. 13 are the same as in
Examples 2, 3
Example 1, i.e. we are in the “allowed area”. Now we
compute τ (1) and v(1) following the flowchart in Fig. 12:
since τ (0) < 0 we proceed to case 2) and corresponding
equation of τ (k + 1) (equation (9) in [34]):
Since k = 0, then (16) and (17) in [34]) until t1 + t2 + . . . + tn > |τ (0)|. Even
I
q if we suppose v(−1) = v(0) − Cp τ (0), we get
I
v0 − I p R 2 − (v0 − Ip R2 )2 − 2 Cp · K1v
t1 = , t1 = 0.0463, v1 = 1.215;
Ip
C
(45) t2 = 0.0618, v2 = 0.983; (52)
Ip
v1 = v0 − t 1 , t1 + t2 = 0.1081 < |τ (0)| = 0.123.
C
v0 = v(−1). However, t3 can not be computed, because the relation
under the square root in (44) is negative:
However, v(−1) doesn’t make sense and algorithm termi- Ip 1
nates with error. Even if we suppose that it is a typo (v2 − Ip R2 )2 − 2 · ≈ −0.0726. (53)
C Kv
and v0 = v(0), then relation under the square root become
negative: Corrected model gives
ωkαβ = ωk+1
αβ
≡ 0,
(58)
τkαβ = τk+1
αβ
≡ 0.
which is a locked state if it is locally stable. Period-2 points Fig. 14: Comparison of PFD outputs of Simulink model (PFD
αβ
Simulink) vs V.Paemel’s model (Paemel model) vs Corrected
ωk+2 = ωkαβ , model (Discrete model). Lower subfigure demonstrates output
αβ
(59) of Loop filter. For considered set of parameters (τ (0) = 0; v(0) =
τk+2 = τkαβ , 10; R2 = 1000; C = 10−6 ; Kv = 500; Ip = 10−3 ; T = 10−3 ; τ2N =
1; KN = 0.5; FN = 0.1125; ζ = 0.3536) all three models produce
also can be found by (55): almost the same results.
αβ αβ
ω αβ k + 2 = ωk+1 + 2βτk+2 ,
= ωkαβ + 2βτk+2
αβ αβ
+ 2βτk+1 , (60)
αβ αβ
τk+2 = −τk+1 . B. Example 6
A. Example 5
Fig. 15: Comparison of PFD outputs of Simulink model (PFD
Simulink) vs V.Paemel’s model (Paemel model) vs Corrected
τ (0) = 0; v(0) = 10, model (Discrete model). Lower subfigure demonstrates out-
put of Loop filter. For considered set of parameters (τ (0) =
R2 = 1000; C = 10−6 ; Kv = 500; Ip = 10−3 ; T = 10−3 . 0; v(0) = 100; R2 = 1000; C = 4 · 10−6 ; Kv = 500; Ip = 10−3 ; T =
τ2N = 1; KN = 0.5; FN = 0.1125; ζ = 0.3536. 10−3 ; τ2N = 4; KN = 0.5; FN = 0.0563; ζ = 0.7071) all three
(62) models produce almost the same results.
10
Example 4 Example 4
Example 5 Example 5
Fig. 13: Parameters for Example 5 and Example 6 correspond to allowed area (see Fig 18 and Fig. 22 in [34])
free > 0, τ
Case O1. τk < 0, Kvco vk + ωvco
VIII. Algorithm for VCO overload k+1 < 0 (equiva-
lently lb < Tref )
VCO
PFD Ip
ω free + K v (t), ω free 0
vco vco F vF (t) > − Kvco i(t) -Ip
θ̇vco (t) = vco
ω free
(64)
0, vF (t) ≤ − Kvco
vco
free
ωvco Ip
τk > 0 and vk + − τk < 0,
Kvco C
(65)
ω free time
τk < 0 and vk + vco − Ip R < 0.
Kvco
free
Fig. 16: VCO overload case O1. τk < 0, Kvco vk + ωvco > 0,
τk+1 < 0 (equivalently lb < Tref )
Following Cases describe how to modify (32) to take into
account VCO overload.
Note, that values τk and vk can be correctly computed
free > 0, τ
by (32).
• Case O1. τk < 0, Kvco vk + ωvco k+1 < 0
free > 0, τ In order to compute τk+1 taking into account VCO over-
• Case O2. τk < 0, Kvco vk + ωvco k+1 ≥ 0 load, one can compute phase of VCO before it’s frequency
free ≤ 0, v + vco ω free
• Case O3. τk < 0, Kvco vk + ωvco k KVCO + hit zero. The VCO phase at that moment corresponds to
Ip R < 0 the area Sla of the green triangle (see Fig. 16). In order
free ≤ 0, v + ω free
• Case O4. τk < 0, Kvco vk + ωvco k
vco
KVCO +
to find the triangle area one can find lx — time interval
Ip R ≥ 0 corresponding to zero VCO frequency:
free ≤ 0, τ
Case O5. τk ≥ 0, Kvco vk + ωvco
• k+1 > 0
ω free
• Case O5*. Impossible. τk ≥ 0, Kvco vk + ωvcofree ≤ 0, C
lx = min − (vk + vco − Ip R), −τk . (66)
τk+1 < 0. Ip Kvco
free > 0, τ
Case O6. τk ≥ 0, Kvco vk + ωvco
• k+1 > 0,
free > 0, τ
Case O7. τk ≥ 0, Kvco vk + ωvco
• k+1 ≤ 0, Since the triangle in question (Sla ) is part of the larger
11
ω free
free ≤ 0, v + vco + I R < 0
tringle S, we get Case O3. τk < 0, Kvco vk + ωvco k K p VCO
Ip
S = Kvco (τk + lx )2 ,
2C (67)
Sla = S mod 1.
free > 0, τ
Case O2. τk < 0, Kvco vk + ωvco k+1 ≥ 0 (equiva-
lently lb ≥ Tref )
Consider timing diagram on Fig. 18. One can split
interval τk+1 into subintervals lb0 , lb+ such that PFD
output is zero on lb0 and positive on lb+ :
Ref
VCO
PFD Ip
0
-Ip τk+1 = lb0 + lb+ ,
free Ip
ωvco + Kvco (Ip R + vk + lb0 ) = 0,
C (71)
free
C ωvco
lb0 = − − Ip R − vk .
0 Ip Kvco
time
Since phase difference between two consequetive falling
edges of VCO is 1, we get
free
Fig. 17: VCO overload case O2. τk < 0, Kvco vk + ωvco > 0,
τk+1 ≥ 0 (equivalently lb ≥ Tref )
ω free
free ≤ 0, v + vco + I R ≥ 0
Case O4. τk < 0, Kvco vk + ωvco k K p Consider timing diagram on Fig. 20. Since phase differ-
VCO
ence between two consequetive falling edges of VCO is 1,
we get
free
Fig. 19: VCO overload case O4.τk < 0, Kvco vk + ωvco ≤ 0, vk +
free
ωvco Ref
KVCO + Ip R ≥ 0
VCO
Ref
VCO
PFD 0I p
-Ip time
Discrete model
Descrete model
PFD out
comparison
Conclusion
In this paper a non-linear mathematical model of CP-
PLL is rigorously derived. The obtained model obviates
the shortcomings in previously known mathematical mod-
els of CP-PLL. The VCO overload case initially noted in
[34] is extended to take into account new cases. Analysis
of local stability with respect to coordinate τk (partial
stability, see condition (34)) gives us the estimation of the
hold-in range. There is a hypothesis, which has not yet
been proven rigorously, that the hold-in and pull-in ranges
are coincide. For some parameters we estimate the pull-in
time numerically. There were many attempts to generalize
equations derived in [34] for higher-order loops (see, e.g.
[5], [14], [15], [27], [30], [33]), but the resulting transcen-
dental equations can not be solved analytically without
using approximations. Therefore proposed model is very
14
effective and corresponding numerical algorithm is much [19] T. Johnson and J. Holmberg. Nonlinear state-space model of
faster than alternative models (e.g., Matlab Simulink). charge-pump based frequency synthesizers. In Circuits and
Systems, 2005. ISCAS 2005. IEEE International Symposium
on, pages 4469–4472. IEEE, 2005.
Acknowledgements [20] N.V. Kuznetsov, G.A. Leonov, M.V. Yuldashev, and R.V. Yul-
dashev. Rigorous mathematical definitions of the hold-in and
The work is supported by the Russian Science Founda- pull-in ranges for phase-locked loops. IFAC-PapersOnLine,
tion project 19-41-02002 and Grant for Leading Scientific 48(11):710–713, 2015.
Schools of Russia (2018-2019). [21] N.V. Kuznetsov, G.A. Leonov, M.V. Yuldashev, and R.V. Yul-
dashev. Solution of the Gardner problem on the lock-in range
Authors would like to thank Mark Van Paemel for of phase-locked loop. ArXiv e-prints, 2017. 1705.05013.
valuable comments. In private communication with Mark [22] N.V. Kuznetsov, M.V. Yuldashev, R.V. Yuldashev, M.V.
Van Paemel it turned out that some of the considered Blagov, E.V. Kudryashova, O.A. Kuznetsova, and T.N. Mokaev.
Comment on ”Analysis of a charge-pump PLL: A new model”
shortcoming were avoided in FORTRAN code that he used by M. van Paemel. arXiv preprint arXiv:1810.02609, 2018.
for the simulation of the circuit. Also Mark Van Paemel [23] G.A. Leonov, N.V. Kuznetsov, M.V. Yuldashev, and R.V. Yul-
emphasized importance of VCO overload and motivated dashev. Hold-in, pull-in, and lock-in ranges of PLL circuits:
rigorous mathematical definitions and limitations of classical
us to develope corresponding algorithm. theory. IEEE Transactions on Circuits and Systems–I: Regular
Papers, 62(10):2454–2464, 2015.
[24] W.C. Lindsey and R.C. Tausworthe. A Bibliography of the
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15
Ref
Ref
VCO
VCO
PFD 0I p
-Ip
PFD 0I p
-Ip
time
time
(a) Case 1 1: general case, Reference cycle slipping; τk ≥ 0,
τk+1 ≥ 0 (b) Case 1 4: all VCO and Reference trailing edges happen at
. different time instances; τk > 0, τk+1 > 0
Ref
VCO Ref
PFD 0I p
VCO
-Ip
PFD 0I p
-Ip
0 0
time time
(c) Case 1 2: VCO and Reference trailing edges both happen (d) Case 1 3: VCO and Reference trailing edges both happen
at the same time instance tk+1 ; τk > 0, τk+1 = 0 at the same time instance tmiddle
k ; τk mod Tref = 0, τk+1 > 0
Ref
VCO
PFD 0I p
-Ip
time
Ref Ref
VCO VCO
Ip Ip
PFD 0 PFD 0
-Ip -Ip
VCO VCO
freq. freq.
0 0
time time
(a) Case 2 1: general case, Reference and VCO cycle slipping; (b) Case 2 2: all VCO and Reference trailing edges happen at
τk ≥ 0, τk+1 < 0 different time instances; τk > 0, τk+1 < 0
Ref Ref
VCO VCO
Ip Ip
PFD 0 PFD 0
-Ip -Ip
VCO
VCO freq.
freq.
0 0
time time
(c) Case 2 3: VCO and Reference trailing edges both happen (d) Case 2 4: VCO and Reference trailing edges both happen
at the same time instance tmiddle
k ; τk mod Tref = 0, τk+1 < 0 at the same time instance tk ; τk = 0, τk+1 < 0
Fig. 31: Subcases of the Case 2. Integral of the VCO frequency ωvco over the VCO period Tvco is pink subgraph area (grey in
black/white). The integral is equal to 1 according to the PFD switching law and definition of time intervals.
20
Ref Ref
VCO VCO
PFD Ip PFD Ip
0 0
i(t) -Ip
i(t) -Ip
IpKvcolk IpKvcolk
C C
0
time time
(a) Case 3 1: general case, VCO cycle slipping; τk < (b) Case 3 2: all VCO and Reference trailing edges happen at
0, τk+1 < 0 different time instances; τk < 0, τk+1 < 0
Ref
Ref
VCO
VCO
PFD Ip
i(t)
0 PFD Ip
-Ip 0
i(t) -Ip
IpKvcolk
IpKvcolk
C
C
0
time
0
(c) Case 3 3: VCO and Reference trailing edges both happen (d) Case 3 4: VCO and Reference trailing edges both happen
at the same time instance tmiddle
k ; τk < 0, τk+1 < 0 at the same time instance tk+1 ; τk < 0, τk+1 = 0
Fig. 32: Subcases of the Case 3. Integral of the VCO frequency ωvco over the VCO period Tvco is pink subgraph area (grey in
black/white). The integral is equal to 1 according to the PFD switching law and definition of time intervals.
21
Ref
Ref
VCO
VCO
PFD Ip
0
PFD Ip
0
-Ip
-Ip
time
0
time
0
Ref
VCO
PFD Ip
0
-Ip
time
0