OBJECT COUNTING CONVEYOR

Objective:

The objective of our project is object counting

conveyor.

Brief methodology:

This project is constructed with

 Microcontroller
 Infra red sensor
 Relay driver
 Dc motor
 Mechanical model

This project is designed with microcontroller, infra red sensor,

relay driver, dc motor and mechanical model.
 Infra red sensor is used to count the objects in the conveyor
passing objects. Dc motor is used to run the conveyor. Dc motor
is controlled by microcontroller.lcd display is used to display the
counting information and conveyor status.

LCDIntroduction

the most commonly used Character based LCDs are based on Hitachi's HD44780
controller or other which are compatible with HD44580. In this project document, we
will discuss about character based LCDs, their interfacing with various microcontrollers,
various interfaces (8-bit/4-bit), programming, special stuff and tricks you can do with
these simple looking LCDs which can give a new look to your application.
Usually these days you will find single controller LCD modules are used more in the
market. So in the project document we will discuss more about the single controller
LCD, the operation and everything else is same for the double controller too. Lets take a
look at the basic information which is there in every LCD.

DDRAM - Display Data RAM

Display data RAM (DDRAM) stores display data represented in 8-bit character codes. Its
extended capacity is 80 X 8 bits, or 80 characters. The area in display data RAM
(DDRAM) that is not used for display can be used as general data RAM. So whatever you
send on the DDRAM is actually displayed on the LCD. For LCDs like 1x16, only 16
characters are visible, so whatever you write after 16 chars is written in DDRAM but is
not visible to the user.

Figures below will show you the DDRAM addresses of 1 Line, 2 Line and 4 Line LCDs.

CGROM - Character Generator ROM

Now you might be thinking that when you send an ascii value to DDRAM, how the
character is displayed on LCD? so the answer is CGROM. The character generator ROM
generates 5 x 8 dot or 5 x 10 dot character patterns from 8-bit character codes (see
Figure 5 and Figure 6 for more details). It can generate 208 5 x 8 dot character patterns
and 32 5 x 10 dot character patterns. User defined character patterns are also available
by mask-programmed ROM.
Figure 5: LCD characters code map for 5x8 dots
As you can see in both the code maps, the character code from 0x00 to 0x07 is occupied
by the CGRAM characters or the user defined characters. If user want to display the
fourth custom character then the code to display it is 0x03 i.e. when user send 0x03
code to the LCD DDRAM then the fourth user created charater or patteren will be
displayed on the LCD.

CGRAM Character Generator RAM

As clear from the name, CGRAM area is used to create custom characters in LCD. In the
character generator RAM, the user can rewrite character patterns by program. For 5 x 8
dots, eight character patterns can be written, and for 5 x 10 dots, four character
patterns can be written. Later in this project document i will explain how to use CGRAM
area to make custom character and also making animations to give nice effects to your
application.

BF - Busy Flag

Busy Flag is an status indicator flag for LCD. When we send a command or data to the LCD for
processing, this flag is set (i.e BF =1) and as soon as the instruction is executed successfully this flag is
cleared (BF = 0). This is helpful in producing and exact ammount of delay. for the LCD processing.

To read Busy Flag, the condition RS = 0 and R/W = 1 must be met and The MSB of the LCD data bus (D7)
act as busy flag. When BF = 1 means LCD is busy and will not accept next command or data and BF = 0
means LCD is ready for the next command or data to process.

Instruction Register (IR) and Data Register (DR)

There are two 8-bit registers in HD44780 controller Instruction and Data register.
Instruction register corresponds to the register where you send commands to LCD e.g
LCD shift command, LCD clear, LCD address etc. and Data register is used for storing
data which is to be displayed on LCD. when send the enable signal of the LCD is
asserted, the data on the pins is latched in to the data register and data is then moved
automatically to the DDRAM and hence is displayed on the LCD.
Data Register is not only used for sending data to DDRAM but also for CGRAM, the
address where you want to send the data, is decided by the instruction you send to LCD.
We will discuss more on LCD instuction set further in this project document.
Commands and Instruction set

Only the instruction register (IR) and the data register (DR) of the LCD can be controlled
by the MCU. Before starting the internal operation of the LCD, control information is
temporarily stored into these registers to allow interfacing with various MCUs, which
operate at different speeds, or various peripheral control devices. The internal operation
of the LCD is determined by signals sent from the MCU. These signals, which include
register selection signal (RS), read/write signal (R/W), and the data bus (DB0 to DB7),
make up the LCD instructions (Table 3). There are four categories of instructions that:

 Designate LCD functions, such as display format, data length, etc.

 Set internal RAM addresses

 Perform data transfer with internal RAM

 Perform miscellaneous functions

 Table 3: Command and Instruction set for LCD type HD44780

Although looking at the table you can make your own commands and test them. Below is
a brief list of useful commands which are used frequently while working on the LCD.
* DDRAM address given in LCD basics section see Figure 2,3,4
** CGRAM address from 0x00 to 0x3F, 0x00 to 0x07 for char1 and so on..

The table above will help you while writing programs for LCD. But after you are done
testing with the table 4, i recommend you to use table 3 to get more grip on working
with LCD and trying your own commands. In the next section of the DOCUMENTS we
will see the initialization with some of the coding examples in C as well as assembly.
 MICROCONTROLLER

In our project 89C51 Microcontroller is used as a control unit.

INTRODUCTION ABOUT MICRO CONTROLLER:

A microcontroller consists of a powerful CPU tightly coupled with memory

(RAM, ROM or EPROM), various I/O features such as serial port(s), parallel port(s),

Timer/Counter(s), Interrupt controller, Data Acquisition interfaces-Analog to Digital

Converter (ADC), Digital to Analog Converter (DAC), everything integrated onto a

single silicon chip.

It does not mean that any micro controller should have above said features on-

chip. Depending on the need and area of application for which it is designed, the on-chip

features present in it may or may not include all the individual sections said above. Any

micro computer system requires memory to store a sequence of instructions making up a

program, parallel port or serial port for communicating with an external system,

timer/counter for control purposes like generating time delays, baud rate for the serial

port, apart from the controlling unit called the Central Processing Unit.
MEMORY ASSOCIATED WITH AT-89C51:

PROGRAM MEMORY:

A program memory is a block of memory, which can be used to store a sequence

of program codes (by using special EPROM / PROM programmers). It can only be read

from and not written into, under normal operating conditions.

There can be up to 64 k bytes of program memory in AT-89C51. in ROM and

EPROM versions of the MCS-351 family of devices, the lower 4K are provided on-chip

whereas in ROM fewer versions, all program memory is external.

In ROM and EPROM versions of this device, if the special control signals EA

(External Access enable) is strapped off Vcc, and then program fetches to addresses 0000

to 0FFF are directed to the internal ROM. The program fetch will be from external

memory, where EA* is grounded.

After reset, the CPU begins execution from address location 0000 of the program

memory.

Figure shows a map of the AT-89C51-program memory

 FFFF

60K Bytes FFFF

Internal
1000 OR
64 K Bytes
0FFF External

4 K Bytes 0000
Internal
0000

DATA MEMORY:

Data memory is the Read/Write memory. Hence, it can be both read from and

written into. AT-89C51 has got 128 bytes of internal data memory and 64K of external

data memory.

FF SFRS DIRECT
ADDRESSSI
80 NG ONLY FFFF

7F AND 64 K Bytes
DIRECT AND External
INDIRECT 0000
ADDRESSIN
00 G
INTERNAL DATA MEMORY:

Internal data memory addresses are one byte wide, which includes 128 bytes of

on-chip RAM plus a number of special Function Registers. The 128 bytes of RAM can be

accessed either by direct addressing (MOV data address) or by indirect addressing

(MOV @Ri).

The lowest 32bytes (00-1F) of on-chip RAM are grouped into 4 banks of 8

registers each. Program instructions call out these registers as R0 through R7 > Bits 3

and 4 (PSW.3 and PSW.4) in register program status word (PSW) select which register

bank is n use. This allows more efficient use of code space, since register instructions

are shorter than instructions that use direct addressing.

Reset initializes the stack pointer register to 7 and its incremented once to start

from locating 08, which is register R0 of second register bank. Hence, in order to use

more than one register bank, the stack pointer should be initialized to a different

location of RAM if it is not used for data storage.

 The next 16 bytes (20-2F) from a block of bit addressable memory space, which

can also byte addressed.

Bytes 30 through 7F are available to the user as data RAM. However, is the stack

pointer has been initialized to this area, enough number of bytes should be left a side to

prevent stack overflow.

I/O STRUCTURE OF AT-89C51:

AT-89C51 has four 8-bit parallel ports (hence 8*4=32 I/O lines are available). All

four parallel ports are bi-directional. Each line consists of a latch, an output driver and an

input buffer.

The four ports are named as port 0 (po), port 1 (p1), port 2 (p2) and port 3(p3).

They are bit addressable and has to be represented in the form PX.Y is i.e. bit Y of port X
while using bit addressing mode. PX.0 is the LSB (least significant Bit) of port x and

px.7 is the MSB (Most Significant Bit) of that port.

Out of the four ports, port 0 and port 2 are used in accesses to external memory.

All the port 3 pins are multifunctional. Port 3 is an 8-bit bidirectional with internal pull-

ups.

Port pin Alternate Functions

P3.0 RXD (Serial input port)

P3.1 TXD (Serial output port)

P3.2 INTO (External Interrupt 0)

P3.3 INT1 (External Interrupt 1)

P3.4 T0 (Timer 0 External input)

P3.5 T1 (Timer 1 External Input)

P3.6 WR (External Data memory write

 strobe)

P3.7 RD (External Data memory Read

Strobe)

PORT 0:

Port 0 is an 8-bit open drain bi-directional I/O port. It is also the multiplexed low

order address and data bus during access to external memory.

It also receives the instruction bytes during EPROM programming and outputs

instruction bytes during program verification. (External pull-ups are required during

verification). Port 0 can sink (and operation and source) eight LS TTL input.

PORT 1:

Port 1 is an 8-bit bi-directional with internal pull-ups. It receives the low order

address byte during EPROM program verification. The port-1 output buffers can

sink/source four LS TTL inputs.

PORT 2:

Port 2 is an 8-bit bi-directional with external pull-ups. It emits the high order

address byte during accesses to external memory.

It also receives, these high-order address bits during EPROM programming

Verification. Port 2 can sink/source four LS TTL inputs.

RST:

While the oscillator is running a high on this pin for two machine cycles resets the

device. A small external pull down resistor (8.2k) from RST to Vss permits power on

reset when a capacitor (10 micro frequencies) also connected from this pin to Vcc.

ALE/PROG:

Address latch enable is the output for latching low byte of the address, during

access 10 external memory. ALE is activated at a constant rate of 1/6 the oscillator
frequency except during an external data memory access at which time one ALE pulse is

skipped. ALE can sink/source eight LS TTL inputs. This pin is also the program pulse

input (PROG) during EPROM programming.

PSEN:

Program Store Enable is the read strobe to external program memory. PSEN is

activated twice each machine cycle, during fetches form external program memory.

PSEN is not activated during fetches from internal program memory. PSEN can

sink/source 8 LS TTL inputs.

EA/Vpp:

When external access enable (EA) is held high, the AT-89C51 execute out of

internal program memory (Unless the program counter exceeds OFF (H)). When EA is

held low, the AT-89C51 H executes only out of external program memory. This pin also

receives the 21 Volts programming. Supply Voltage (Vpp) during EPROM programming.

This pin should not be floated during normal.

XTAL1:
 It is inputs to the inverting amplifier that forms the oscillator. XTAL1 should be

grounded when an external oscillator is used.

XTAL 2:

It is Outputs to the inverting amplifier that forms the oscillator, and input to the

internal clock generator, receives the external oscillator signal when an external oscillator

is used.

Vss - Circuit ground potential

Vcc - Supply Voltage during Programming Verification and normal

Operation.

TIMERS/COUNTERS:

AT-89C51 has two 16-bit timer/counter 0, and timer/counter 1. They can be

configured in any of the four operating modes, which are selected by bit-pars (m1, 0) in
register TMOD (Timer/counter Mode control). Modes 0, 1 and 2 are the same for the

timer/counters. Mode 3 is different.

FEATURES OF AT-89C51:

Now a days an 8-bit AT-89C51/8031/8751 and 16 bit 8097 micro controllers

available in the form of kits. Its special features are summarized as:-

4k Bytes of Flash

128 Bytes of RAM

32 I/O lines

A five vector two level interrupt architecture.

A full duplex serial port

On chip Oscillator and clock circuitry.

ADDRESSING MODES:
 The AT-89C51 instructions operate on data stored in internal CPU registers,

external memory or on the I/O ports. There are a number of methods (modes) in which

these registers, memory (internal or external) and I/O Ports (Internal / External) can be

addressed, called addressing modes. This section gives a brief summary of the various

types of addressing modes available in AT-89C51.

These Modes are:

Immediate

Direct

Indirect

Register

Register Specific

Indexed

IMMEDIATE ADDRESSING:
 In this mode, the data to be operated upon is in the location immediately following

the opcodes. For example, the instruction,

MOV A, # 41

-Loads the accumulator with the hex value 41.

‘//’ Signifies IMMEDIATE ADDRESSING.

DIRECT ADDRESSING:

In direct addressing, the operand is specified by an 8-bit address field in the

instruction. For example, the instruction,

INC 20

Increments the contents of the On-Chip data address 20 by one.

INDIRECT ADDRESSING:
 In indirect addressing, the instruction specifies a register, which contains the

address of the operand. Both internal and external RAM can be indirectly addressed.

The address register for 8-bit address can be R0 or R1 of the selected register bank

or the stack pointer. The address register for 16-bit address can only be the 16-bit “data

pointer” register, DPTR. For example, the instruction,

MOVX @DPTR, A

-Writes the contents of the accumulator to the address held by the DPTR register.

RESISTOR ADDRESSING:

The register banks, containing resistors R0 through R7, can be accessed by certain

instructions, which carry a 3-bit register specification within the opcode of the

instruction. Instructions that access the registers this way are code efficient, since this

mode eliminates an address byte.

When the instruction is executed, one of the eight resistors in the selected bank at

the execution time by two bank select bits is selected at the execution time by the two

bank select bits in the PSW. For example, the instruction,

MOV A, R0

-Copies the contents of the resistor R0 (of the selected bank) to the accumulator.
INDEXED ADDRESSING:

Only program memory can be accessed with indexed intended for reading look-up

tables in program memory. A 16-bit base resistor (Either DPTR or the Program counter)

1 and accumulator40
points to the base of the table is set up with the table entry number. The

address of the table entry in program memory is formed by adding the accumulator data
2 39
to the base pointer. The instruction,

3
MOVC 38
A,@A+DPTR

This function reads the

4
contents of program
37
memory, whose address is obtained

by adding the content of DPTR and accumulator copies it to the accumulator.

5 36

6 35

PIN DIAGRAM OF AT89C51:

7 34

PDIP
8 33

P1.0 Vcc

P1.1 9 32 P 0.0(AD 0)

P1.2 P 0.1 (AD 1)

P1.3 10 31 P 0.2 (AD 2)

P1.4 P 0.3 (AD 3)

11 30

12 29
 P1.5 P 0.4 (AD 4)

P1.6 P 0.5 (AD 5)

P1.7 P 0.6 (AD 6)

RST P 0.7 (AD 7)

PORT 0 DRIVERS PORT 2 DRIVERS
(R X D) P3.0 EA / VPP

(T X D) P3.1 ALE/PROG
RAM ADDR RAM PORT 0 PORT 2 FLASH
(INT 0) P3.2 PSEN
RESISTOR LATCH LATCH
(INT 1) P3.3 P2.7 (A 15)

(T 0) P3.4 P2.6 (A 14)

B REGISTER STACK PROGRAM
(T1) P3.5 P2.5 (A 13)
ACC POINTER ADDRESS
(WR) P3.6 P2.4 REGISTER
(A 12)

(RD) P3.7 P2.3 (A 11)

TMP 2 TMP 1 BUFFER
XTAL 2 P2.2 (A 10)

XTAL 1 P2.1 (A 9)

GND P2.0 (A 8) PC
INCREMEN-
TER
PLCC
INTERRUPT SERIAL PORT AND
P 0. 0 – P 0 . 7 P2.0 – P2.7 TIMER BLOCKS
PSW PROGRAM
Vcc COUNTER

GND
DPTR
TIMING AND INSTRUCT
CONTROL
-ION
REGISTER PORT 1 PORT 3
LATCH LATCH

OSC
PORT 1 DRIVERS PORT 3 DRIVERS
 ALU

PSEN

ALE/

PROG

EA/Vpp

RST
 P1.0 – P1.7 P3.0 – P3.7

ACCUMULATOR:

Accumulator is the Accumulator register mnemonics for Accumulator. Specific

instruction however, refer to the Accumulator simply A.

B REGISTER:

The B register is used during multiply and divide operations. For other

instructions can be treated as another scratch pad register.

PROGRAM STATUS WORD:

The PSW resistor contains program status information. The program status word

(PSW) contains several status bits that reflect the current state of the CPU. The PSW
resides in SFR space. It contains the carry bit, the auxiliary carry 9for BCD operations),

the two register bank select bits, the overflow flag a parity bit and two user definable

status flags. The carry bit other than serving the functions of a carry bit in arithmetic

operations, also serves as the ‘Accumulator’ for a number of Boolean operations. The

bits and RSI are used to select one of the register bans. A number instruction refers of

their RAM location R0 through R7. The selection of which the four banks is being

referred to is made on the bass of the bits RS0 and RS1 execution time.

The lower 32B are grouped into 4 banks of 8 resistors. Program instructions call

out there resistors as R0 through R7 bits in the PSW select which register is n use. The

parity bit reflects the number is in the accumulator. P=1 if the accumulator contains an

old number of 1 s and p=0 if the accumulator contains an even number of 1 s. Thus the

number of 1 s in the accumulator plus P is always even. Two bits in the PSW are

uncommitted and may be used as general-purpose status flags.

PROGRAM STATUS WORD OF AT89C51 DEVICES:

 C AC FO RS1 RS0 OV P

Carry flag receives carry out Parity of accumulator by hard

from bit-1 of ALU operation ware to 1 bit if it contains an old
number of 1 s otherwise set to 0

Auxiliary carry flag receives User Definable Flag

carry out from bit-1 of addition
operands

Overflow Flag set by

Arithmetic Operation
General Purpose Status Flag

Resistor Bank Select bit- 0

Register Bank Select bit-1

THE LOWER 128 BYTES OF INTERNAL RAM 7F (H)

2F (H)

20 (H)
Bank-3 1F (H)

18 (H)
Bank-2 17 (H)

10 (H)
Bank-1 0F (H)

08 (H)
Bank-0 07 (H)
 Bit addressable Space

Bit address 0-7F (H)

Bank Select Bit 11

In PSW

10 4 Banks of 8 resistors

R0 - R7

01

00

STACK POINTER:

The stack pointer resistor is 8-bit wide. It is incremented before data is stored

during PUSH and CALL execution while the stack may where in on-chip RAM. The stack

pointer is initialized to 07(H) after a reset. This causes the stack to begin at location

08(H).
DATA POINTER:

The data pointer (DPTR) consists of a high byte (DPH) and a low byte (DPL). Its

intended function is to hold a 16-bit address. It may be manipulated as a 16-bit resistor

or 08 two independent bit registers. Ports 0 to 3 – p0, p1, p2 and p3 are the SFR latches

for ports 0, 1, 2, and 3 respectively.

SERIAL DATA BUFFER:

The serial data buffer is actually two separate resistors transmit buffer and a

receive buffer resistor. When data is moved to SBUF, it goes to the transmit buffer

where it is held for serial transmission. (Moving a byte to SBUF is what initiates the

transmission) When data is moved from SBUF, it comes from the receive buffer.

TIME RESISTORS:
 Resistors pairs (TH0, TL), (TH1, TL1) and (TH2, TL2) are the 16-bits counting

resistors for the interrupt system, the timer counters and the serial port.

RELAY

A relay is nothing but a switch mostly switches are manually operated type.
But the operations has not sufficient in ON and OFF purpose, it has many problems. So
we are used automatically operated switches it is worked based on the voltage across
the relay coil, an relay consist of an relay coil one pole two contact the pole is a movable
one. It is moved to new position by means of voltage is applied to the relay coil. The
pole is normally closed contact and another contact is normally opened contact.

The supply is available across the relay coil, then the normally opened contact
is closed and normally closed contact opened. The above explanations are suitable for
single pole and double through relay. The contacts are used to following of the current.
 The various current ratings are available. The current rating is not available in
the market then we are assuming the total current. But the relays are not used in very
high currents rating. Because of arcing at the time of contacts is opened. The relay
contacts are periodically checkup is required. The operations will not be followed. So
the contact is damaged on the continuous condition may gets damaged the contact, due
to the heat.

RELAY DRIVER CONTROL

Digital IC’s cannot provide the necessary current & voltage to TURN ON a
Relay. So a Relay Driver Circuit is required. The basic function of the driver circuit is to
provide the necessary current to energize the relay coil.

Generally relay coils operate from 5V to 24V & require about 25mA to
100mA current to energize the coil, the current required to Turn ON a relay is called as
the “PULL IN” or “HOLDING” current. This PULL IN Current depends upon the Relay
used.

The simplest of relay driver circuit consist of a NPN or a PNP transistor.

Almost all the digital circuits can provide enough base current to TURN ON a Transistor.

In the adjoining figure you can see an NPN transistor BC 547 is being used to
drive the relay. The relay has a 12V coil i.e. it can be turned ON only when the operating
voltage i.e. the Vcc is 12V. The Resistor R1 is used to set the base current for the
transistor, the value of R1 should be such that when V in is applied the transistor is driven
into saturation i.e. it is fully turned ON & the Relay is energized. It’s important that the
transistor is driven into saturation so that the voltage drop across the transistor is
minimum thereby dissipating very little power.

Now we have to calculate the value of R1. Suppose the relay requires a PULL
IN current of 80mA. So the collector current has to be at least 80mA.

The minimum DC current gain of BC 547 is 100,So the minimum base

current is 0.8mA. But to be on the safer side i.e. just to make sure that the transistor is in
saturation region, we approximately double this value to say 1.5mA. Now if the V in is
switching from 0V to 12V.

So we can use 8KΩ resistor to provide base current of 1.5mA, which is

sufficient to TURN ON the relay & activate the Relay.

Most of the digital circuits require 5V to operate in that case V IN will be 5v

so the base resistance R1 will be 3.33KΩ.

LED is connected to indicate weather the relay is operated or not.

POWER SUPPLY UNIT

 The power supply circuit that uses single transformers that produces 12-0-

12V. Further, the outputs are full wave rectified. Both +12V and -12V are taken from the

two ends of the bridge. They are unregulated outputs and are useful for non-critical

applications. In this project 7812 positive and 7912 negative IC regulators are used. They

are delivery currents regulators. But they are input voltage can be made adjustable also.

The 12V supplies are obtained by using monolithic voltage regulator IC’s and

7912. These IC’s provide stabilized outputs of +12V respectively with 1 ampere rating.

Heat sinks are required for these IC’s.

Output Voltage (V₀) = Vxx + (Vxx/R₁) + IQ R₂

= Vxx + (R₂/R₁) + IQ R₂

Where,

Vxx = the fixed Voltage

IQ = the Regular quircent current

Power Dissipation (RS) = Vi (min) – Vo – 2

Ii (max) + IQ

Where,

Ii (max) = Maximum Load Current

IQ (min) = Regulate Quircent current

Vi (min) = Minimum input voltage

Vo = Output Voltage

∴Rs = (Ii (max) + IQ)² RS

BLOCK DIAGRAM:

230 V AC DC O/P
Rectifier Filter Regulator
Transformer

Transformer:
 A transformer is a static (or stationary) piece of which electric power in one

circuit is transformed into electric power of the same frequency in another circuit. It

can raise or lower the voltage in a circuit but with a corresponding decrease or increase

in current. It works with the principle of mutual induction.

12V POWER SUPPLY UNIT:

A K

IN 4007
7812
230V A K 1000µF/25V 1000 µF/25 V

AC K A

IN 4007

230 V / 12V, 500mA K A

In our project we are using step down transformer for providing a necessary

supply for the electronic circuits. In our project we are using a 0-12 and 0-9V

transformer.

Rectifier:

The DC level obtained from a sinusoidal input can be improved 100% using a

process called full-wave rectification. It used 4 diodes in a bridge configuration.

From the basic bridge configuration we see that two diodes are conducting while

the other two diodes are in “off” state during the period t = 0 to T/2 Accordingly for the
negative of the input the conducting diodes. Thus the polarity across the load is the

same.

Filter:

The filter circuit used here is the capacitor filter circuit where a capacitor is

connected at the rectifier output, and a DC is obtained across it. The filtered waveform

is essentially a DC voltage with negligible ripples, which is ultimately fed to the load.

Regulator:

The output voltage from the capacitor is more filtered and finally regulated. The

voltage regulator is a device, which maintains the output voltage constant irrespective

of the change in supply variations, load variation and temperature changes. Here we

use two fixed voltage regulators namely LM 7812, LM 7805 and LM 7912. The IC 7812 is

a +12V regulator IC 7912 is a –12V regulator and IC 7805 is a +5V regulator.

VOLTAGE REGULATOR (IC 78XX SERIES) MODEL CIRCUIT:

+ 1 2 +
IN OUT

C₂
IC 78XX
FROM (0-15V) C 470 mF 0.01 mF

RECTIFIER V₀ = + XX V
GND
3

- -

Block diagram:

Lcd display