VLSI Design Internship Program - UART Design

Week Date Subject/Module Topic Live Q&A time

14-Feb-2024 Induction - 5:00 PM

Week 1 15-Feb-2024 Introduction Digital Electronics None
Digital
16-Feb-2024 Number System & Logic Circuit 10:00 AM
19-Feb-2024 None

20-Feb-2024 10:00 AM
Week 2 21-Feb-2024 Digital Combinational circuit None

22-Feb-2024 None
23-Feb-2024 10:00 AM

26-Feb-2024 None

27-Feb-2024 10:00 AM
Week 3 28-Feb-2024 Digital Sequential Circuit I None

29-Feb-2024 None

1-Mar-2024 10:00 AM
4-Mar-2024 None

5-Mar-2024 10:00 AM
Week 4 6-Mar-2024 Digital Sequential Circuit II None

7-Mar-2024 None

8-Mar-2024 10:00 AM

11-Mar-2024 None
12-Mar-2024 FSM 10:00 AM
Week 5 13-Mar-2024 Digital None
14-Mar-2024 None
Memories
15-Mar-2024 10:00 AM
18-Mar-2024 None
Introduction to Verilog HDL
19-Mar-2024 10:00 AM
Week 6 20-Mar-2024 Verilog None
Data types
21-Mar-2024 None
22-Mar-2024 Lab1 10:00 AM

25-Mar-2024 None
26-Mar-2024 10:00 AM
Operators
Week 7 27-Mar-2024 Verilog None
28-Mar-2024 None
29-Mar-2024 Lab2 10:00 AM

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21/1A, III Floor, MS Plaza, Gottigere, Bannerghatta Main Rd, Bengaluru, Karnataka 560076 | www.maven-silicon.com
 1-Apr-2024 None
2-Apr-2024 10:00 AM
Advanced Verilog for Verification
Week 8 3-Apr-2024 Verilog None
4-Apr-2024 None

5-Apr-2024 Lab3 10:00 AM

8-Apr-2024 None
Assignments
9-Apr-2024 10:00 AM
Week 9 10-Apr-2024 Verilog None
Structured Procedures
11-Apr-2024 None
12-Apr-2024 Lab4 10:00 AM

15-Apr-2024 None
Synthesis Coding styles
16-Apr-2024 10:00 AM
Week 10 17-Apr-2024 Verilog Lab5 None

18-Apr-2024 None
FSM & Lab6
19-Apr-2024 10:00 AM
22-Apr-2024 None

23-Apr-2024 10:00 AM
Week 11 24-Apr-2024 Project specification Specification analysis None

25-Apr-2024 None

26-Apr-2024 10:00 AM

29-Apr-2024 None
30-Apr-2024 Block level architecture 10:00 AM
Week 12 1-May-2024 Project Implementation None
2-May-2024 None
Baud generator
3-May-2024 10:00 AM
6-May-2024 None
TX_FIFO(RTL/TB)
7-May-2024 10:00 AM
Week 13 8-May-2024 Project Implementation None
Transmitter top(RTL/TB)
9-May-2024 None
10-May-2024 RX_FIFO(RTL/TB) 10:00 AM

13-May-2024 RX_FIFO(RTL/TB) None

14-May-2024 10:00 AM
Receiver top(RTL/TB)
Week 14 15-May-2024 Project Implementation None
16-May-2024 None
UART Register (RTL/TB)
17-May-2024 10:00 AM

Maven Silicon Softech Pvt Ltd.

21/1A, III Floor, MS Plaza, Gottigere, Bannerghatta Main Rd, Bengaluru, Karnataka 560076 | www.maven-silicon.com
 20-May-2024 Wishbone Interface None
21-May-2024 10:00 AM
Week 15 22-May-2024 None
23-May-2024 None

24-May-2024 10:00 AM
Project Implementation
27-May-2024 UART top level TB None

28-May-2024 10:00 AM
Week 16 29-May-2024 None

30-May-2024 None
31-May-2024 10:00 AM
Final test is scheduled for 7th June 2024

Maven Silicon Softech Pvt Ltd.

21/1A, III Floor, MS Plaza, Gottigere, Bannerghatta Main Rd, Bengaluru, Karnataka 560076 | www.maven-silicon.com