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UMBB/IGEE EE242/ L04

Recitation #07
Exercise n°1:
Find Vo using Thevenin equivalent circuit seen by the resistor R4. (see Fig.1).

Fig.(1)

Exercise n°2:

Given the circuit of Fig.2 with: VCC=12V, RC= RE=1 K,


VBE=0.7V, RB=200K, hfe=100, hoe=hre0, VT=25mV.
a) Find ICQ and Determine hie.
b) Draw the equivalent AC small signal circuit.
c) Find the expressions and the values of: the input impedance Zi,
the output impedance Zo and the no-loaded gain in voltage
(Av=Vo/Vin).
d) Deduce the no-loaded gain in current.
e) Connect across the Resistor RC a bypass capacitor. Deduce the
new values of Zi, Zo and Av. What do you remark? Fig.(2)

Exercise n°3:

Given the circuit of Fig. 3, with: VCC=12V, RC= RE=1 K,


1. VBE=0.7V, RB=200K, hfe=100, hoe=hre0, VT=25mV

a) Draw the equivalent AC small signal circuit.


b) Find the expressions and the values of: the input impedance Zi,
the output impedance Zo and the no-loaded gain in voltage
(Av=Vo/Vin).
c) Deduce the no-loaded gain in current.

2. Connect across the Resistor RE a bypass capacitor.


a) Deduce from (1.) the expressions and the values of the input
impedance Zi, the output impedance Zo and the no-loaded gain
in voltage (Av=Vo/Vin).
Fig.(3)
b) Compare the results of (1.) and (2.). What do you remark?
1
Exercise n°4:

Consider the circuit of Fig.4 (Darlington connection) :

Zi
a) Construct the AC equivalent circuit and find the voltage gain
(AV=vo/vin)and the input and output impedances (Zi and Zo) (with Zo
hoe1=hre1 =hoe2=hre2 0).
b) Find the current gain (Ai=io/ii).

Exercise n°5: Fig.(4)

In the cascaded amplifier of the Fig 5, the specifications of each stage are:
Stage 1:(Zi1=10, Zo1=2k, AV1=80), Stage 2:(Zi2, Zo2, AV2)
Stage 3:(Zi3=1k, Zo3=1.5k, AV3= -30)

Fig.(5) V1 Stage1 V2 Stage2 V3 Stage3 V4 RL=1k

1. What are the configuration types of the stages 1 and 3? Give the overall expression of the total loaded
gain AVL(=V4/V1). (Justify your answers by giving the two-port system of each amplifier).
2. If (V3/V1) = 69.87 and (V4/V2) = -11.53, find the input impedance of the second stage.
3. If (Zi2/Zo2)=103, Find the no loaded gain AV2, what is the configuration type of this stage? Compute
the overall loaded gain AVL.

Exercise n°6:
RC
Consider the circuit of Fig.6: Zo
With hfe=100, Q-point values: ICQ=0.245mA,
VCEQ=3.64V, hoe-1 =219kΩ.
RL
1. Construct the AC equivalent circuit and find the
voltage gain (AV=vo/vin), input and output
Zi
impedances (Zi and Zo) (with hre 0). RS
2. Find the current gain (Ai=io/ii).
RE

Fig.(6)

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