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ARTICLE IN PRESS

Nuclear Instruments and Methods in Physics Research A 556 (2006) 565–576


www.elsevier.com/locate/nima

TESLA cavity modeling and digital implementation in FPGA


technology for control system development
Tomasz Czarskia, Krzysztof T. Pozniaka, Ryszard S. Romaniuka,, Stefan Simrockb
a
Institute of Electronic Systems Warsaw University of Technology, Nowowiejska 15/19, 00-665 Warsaw, Poland
b
DESY, Hamburg, Germany
Received 6 September 2004; received in revised form 19 September 2005; accepted 10 October 2005
Available online 28 November 2005

Abstract

The electromechanical model of the TESLA cavity has been implemented in FPGA technology for real-time testing of the control
system. The model includes Lorentz force detuning and beam loading effects. Step operation and vector stimulus operation modes are
applied for the evaluation of a FPGA cavity simulator operated by a digital controller. The performance of the cavity hardware model is
verified by comparing with a software model of the cavity implemented in the MATLAB system. The numerical aspects are considered
for an optimal DSP calculation. Some experimental results are presented for different cavity operational conditions.
r 2005 Elsevier B.V. All rights reserved.

PACS: 07.05.Dz; 07.50.e; 29.17.+w; 29.50.+v

Keywords: Superconducting cavity control; TESLA accelerator; X-ray FEL; LLRF—low level radio frequency; Control theory; FPGA; DSP; VHDL;
System simulation; Cavity controller; Cavity simulator

1. Introduction and occupied space by the control-diagnostic system, less


power consumption, increased reliability in adverse envir-
The majority of existing accelerators are controlled by onments and lower cost.
analog control systems. A fully digital solution of such The TESLA accelerator uses nine-cell superconducting
systems has recently become possible with the advent of niobium resonators to accelerate electrons and positrons.
FPGA chips equipped with DSP capabilities. A new The acceleration structure is operated in a standing p-mode
generation of digital controllers may integrate new tasks wave at the frequency of 1.3 GHz. The RF oscillating field
like: system identification and simulation, continuous and is synchronized with the motion of a particle moving at the
multichannel measurements, massive data acquisition, velocity of light across the cavity (see Fig. 1). The LLRF
continuous diagnostics and exception handling, introduc- (low level radio frequency) cavity control system for the
tion of real-time feed-back between the beam quality TESLA project has been developed in order to stabilize the
(electrical and optical) and system parameters, building a accelerating fields of the resonators. The control section,
rich database of the system behavior in changing working powered by one klystron, may consist of many cavities.
conditions, etc. The above tasks rest on the assumption One klystron supplies the RF power of 10 MW to the
that the idle time, of the accelerator working in pulsed cavities through the coupled waveguide with a circulator.
mode, may be efficiently used for the intensive DSP The cavities are driven with pulses of 1.3 ms in duration
calculations. The introduction of new features is expected and the average accelerating gradients of 25 MV/m. The
to result in: increased system safety, shorter design time, control feed-back system regulates the vector sum of the
less human resource requirements, less consumed material pulsed accelerating fields in multiple cavities. The fast
amplitude and phase control of the cavity field is
Corresponding author. Tel.: +48 501 472 206; fax: +48 22 825 2300. accomplished by modulation of the signal driving the
E-mail address: rrom@ise.pw.edu.pl (R.S. Romaniuk). klystron. The cavity RF signal is down-converted to an

0168-9002/$ - see front matter r 2005 Elsevier B.V. All rights reserved.
doi:10.1016/j.nima.2005.10.122
ARTICLE IN PRESS
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Coupler

sensor
Field
Klystron

Particle
Vecto r
Modulator Down-
CAV I TY ANALOG SY S T E M converter

DAC CONTROLLER I/Q ADC


Detector

Feed-Forward Set-point

Fig. 1. Cavity environment and simplified block diagram of the cavity control system.

intermediate frequency of 250 kHz preserving the ampli- The forward wave is represented by current Jf and
tude and phase information. The ADC and DAC voltage U f ¼ J f Z 0 . The reflected wave, represented by
converters link the analog and digital parts of the system. current Jr and voltage U r ¼ J r Z 0 is terminated by the
The digital signal processing is applied for the detection of circulator load, matched to the waveguide (J f ¼ J k ).
the field vector as the complex envelope represented by Superposition of the forward and reflected wave, repre-
real—I (in-phase) and imaginary—Q (quadrature) compo- sented by current J 1 ¼ J f  J r and voltage U 1 ¼ U f þ
nents (I/Q detector). The digital controller stabilizes the U r ¼ ð2J k  J 1 ÞZ0 drives the coupler, which converts the
complex envelope of the cavity wave, according to the signals according to transformation ratio 1:N. The output
desired set point. Additionally, the adaptive feed-forward is signals of the coupler are represented by current J 2 ¼ J 1 =N
applied to improve the compensation of repetitive pertur- and voltage U 2 ¼ NU 1 ¼ U c ¼ ð2J k =N  J 1 =NÞN 2 Z 0 .
bations induced by the beam loading and by the dynamic Superposition of the output current of the coupler and
Lorentz force detuning. beam loading results in the cavity current Jc and cavity
The theoretical verification of the existing superconduct- voltage Uc, related by impedance Zc.
ing cavity model [1–3] lead to the synthesis of a digital Introducing the cavity loaded impedance ZL ¼ N2Z0JZc
algorithm efficiently implemented in the FPGA structure. (parallel connection) and defining the transformed gen-
This cavity simulator was used for evaluation of the control erator current J g  J k =N, results in the cavity voltage
algorithms and for investigation of the optimal control U c ¼ ð2J g  J b ÞZ L ¼ JZ L . Therefore, the cavity loaded
method. The FPGA hardware implementation of the impedance ZL(s) can be represented by the transfer
cavity model is intended for real-time operation. function in the corresponding forms:

2. The cavity model ZL ðsÞ ¼ ð1=RL þ sC þ 1=sLÞ1


¼ o0  rs=ðso0 =QL þ s2 þ o20 Þ
2.1. Electrical circuit model
¼ o1=2  RL =ðo1=2 þ ðs2 þ o20 Þ=2sÞ, ð1Þ
The following considerations are limited to a single
cavity represented as LCR circuit coupled to a waveguide where the following secondary parameters (derived from
driven by a klystron. This approach is sufficient for the the primary LRC parameters) are applied: resonance
purpose of cavity control modeling [1–3]. The circuit model frequency o0 ¼ 2pf 0 ¼ ðLCÞ1=2 , characteristic resistance
of the cavity environment is presented in Fig. 2. The r ¼ ðL=CÞ1=2 , shunt resistance RLRJN2Z0, loaded quality
currents (J) and voltages (U) are represented in Laplace factor QL ¼ RL =r, half-bandwidth (HWHM)
space. The klystron as a power amplifier is modeled by the o1=2 ¼ 2pf 1=2 ¼ 1=2CRL ¼ o0 =2QL .
RF current generator Jk driving the waveguide via a
circulator. The waveguide, as a transmission line, is
parameterized by characteristic impedance Z0 and time Due to the stability of the RF generator frequency og,
delay Tw. The cavity is represented as resonant LCR circuit and narrow resonator bandwidth, the cavity voltage can be
with impedance Z c ðsÞ ¼ ð1=R þ sC þ 1=sLÞ1 coupled to modeled in the time domain as analytical signal represented
the waveguide. Beam loading is modeled as a current as a vector or phasor in the complex domain:
source Jb supplied by the electromagnetic field of the
cavity. The bunched beam current has 2 ps pulse uðtÞ  ½ur ; ui   ur þ iui ¼ aðtÞðcosðog t þ jðtÞÞ
duration, 1 MHz rate and an average value of 8 mA. þ i  sinðog t þ jðtÞÞÞ ¼ aðtÞ expðiðog t þ jðtÞÞÞ, ð2Þ
ARTICLE IN PRESS
T. Czarski et al. / Nuclear Instruments and Methods in Physics Research A 556 (2006) 565–576 567

Klystron Cavity Beam


Coupler
Uc Jc
Fo rward wave Uf = Z0·Jf
-Jb
Jk
Waveguide J2
1.3
GHz ~ with U1 = Z0·(2Jk - J1)
1: N
U2
RLC

Circulator
Zc
1 MHz
Reflected wave Ur = Z0·Jr

Fig. 2. Circuit model of cavity environment.

where ur is a real signal and ui its Hilbert transform; RFcurrent


Cavity
RFvoltage
amplitude a(t) and phase j(t) are slowly time-varying j(t) J(s) = I(s–iωg) ZL(s) u(t) U(s) = ZL(s) I(s–iω g)
parameters relative to the period of the RF signal carrier. exp(-iωgt) Demodulator
The cavity current is modeled as an analytical signal Modulator exp(i gt)
[I, Q]current [I, Q]voltage
jðtÞ ¼ 2jg ðtÞ  jb ðtÞ, where jb corresponds to the og Fourier i(t) I(s)
ZL(s+iωg)
v(t) V(s) = ZL(s+iωg) I(s)
component of the beam loading current. The relation
between the current and the voltage is given in Laplace Fig. 3. Cavity signal-flow graph for complex envelope and analytical
space: signal (left-right arrow 2 means Laplace transformation).

UðsÞ ¼ JðsÞ  Z L ðsÞ, (3)


ZL ðs þ iog Þ  o1=2  RL =ðs þ o1=2  iDoÞ, where the cavity
where U(s) and J(s) ¼ 2Jg(s)Jb(s), are Laplace trans- detuning is 2pDf ¼ Do  o0  og .
forms of the analytical signal for the voltage and current, The complex envelope relation for the cavity signals is
respectively. written in Laplace space as follows:
The low-level RF representation of the cavity signal in s  VðsÞ ¼ ðo1=2 þ iDoÞ  VðsÞ þ o1=2  RL  IðsÞ. (6)
the time domain is the complex envelope derived from the
complex demodulation (down conversion) of the analytical Moving to the time domain yields the state space
signal, which is obtained by applying the operator equation with v(t) as a state vector of the cavity electrical
exp(iogt) for a given frequency og. Vice versa, the model:
complex modulation (up conversion) of the envelope is dvðtÞ=dt ¼ Ae  vðtÞ þ o1=2  RL  iðtÞ, (7)
obtained by applying the operator exp(iogt) and yields the
analytical signal for a given frequency og. The complex where v(t) and iðtÞ ¼ 2ig ðtÞ  ib ðtÞ are the time dependent
envelope for the cavity current i(t) and voltage v(t) can be complex envelopes of the voltage and current, respectively,
represented as a vector or phasor by its real I—in-phase, and Ae ¼ o1=2 þ iDo is the phasor.
and imaginary Q—quadrature components as follows (for The resultant state-space equation for the complex
the voltage case): envelope depends only on the cavity bandwidth and
detuning. This simple relationship for the cavity envelope
½I; Qvoltage  vðtÞ  ½vr ; vi   vr þ ivi  uðtÞ  expðiog tÞ allows for a control system modeling within the low-level
¼ aðtÞeijðtÞ  ½aðtÞ cos jðtÞ; aðtÞ sin jðtÞ. ð4Þ frequency range. The phasor solution of the state-space
equation for the current step input i0 is as follows:
The signal relation is modeled by the flow graph vðtÞ ¼ i0  o1=2  RL  ðexpðAe  tÞ  1Þ=Ae for time tX0.
according to Fig. 3.
The successive operations, presented by the signal-flow (8)
graph in Fig. 3, yield the direct relation between the cavity The step response of the cavity voltage [I, Q] components
input and output and the corresponding envelope graph are presented in
Fig. 4 for a driving current of i0 ¼ 32 mA (ig ¼ 16 mA,
VðsÞ ¼ IðsÞ  ZL ðs þ iog Þ, (5)
ib ¼ 0, RL ¼ 1560 MO, f 1=2 ¼ 216 Hz, detuning range
where V(s) and I(s) ¼ 2Ig(s)Ib(s), are the Laplace trans- Df ¼ 400= þ 400 Hz).
forms of the complex envelope for the voltage and the
current, respectively. 2.2. Electromechanical model
The resultant cavity transfer function is transformed to a
low-pass filter. The analytical form of impedance can be The cavity has a high loaded quality factor QL3  106
simplified for signals with narrow spectral range in and a narrow bandwidth of about 430 Hz (FWHM). The
comparison with the generator frequency close to the cavity is sensitive to mechanical distortion caused by
cavity resonance frequency. Then, for jsj5ogEo0 yields: microphonics and Lorentz force, changing the resonator
ARTICLE IN PRESS
568 T. Czarski et al. / Nuclear Instruments and Methods in Physics Research A 556 (2006) 565–576

Fig. 4. The step response of the cavity voltage envelope represented by [I, Q]—components and the corresponding envelope graph—trajectory of the [I, Q]
vector for different detuning.

Table 1
Main parameters of the cavity electromechanical model

Cavity electrical parameters Cavity mechanical modes parameters

f 0 ¼ 1300 yyyyyyyyresonance frequency (MHz) f ¼ [235,290,450]yyresonance frequencies vector (Hz)


r ¼ 520 yyyyyyyycharacteristic resistance (O)
QL ¼ 3  106 yyyyyyyyloaded quality factor
RL ¼ QL r ¼ 1560yyyyyyyyload resistance (MO) Q ¼ [100,100,100]yyquality factor vector
f 1=2 ¼ f 0 =2QL ¼ 216yyyyyyyyhalf band-width (Hz) K ¼ [0.4, 0.3, 0.2]yyLorentz force detuning constants vector (Hz/(MV)2)
Df ¼ 390yyyyyyyypre-detuning (Hz)

frequency. The cavity model is non-stationary with a time where the parameter Km is the Lorentz force detuning
varying detuning Do. A value of the cavity detuning can be constant.
comparable to the cavity bandwidth in the real operation The resulting cavity detuning is DoðtÞ ¼ SDom ðtÞ þ Do0 ,
condition. This cavity parameter has two dominant where Do0 is the initial predetuning.
deterministic components: the Lorentz force detuning and The main parameters of the cavity electromechanical
the initial predetuning. The mechanically biased predetun- model are gathered in Table 1. The three dominating
ing attempts to compensate the EM forced detuning factor, modes are considered for the mechanical model.
during operation of the cavity. The mechanical model of The pure mechanical model is weakly damped. The
the cavity describes the dynamic Lorentz force detuning dominating oscillations are caused by the mechanical
which depends on the time varying field gradient [2]. It is modes (Table 1) driven by the square of the field gradient.
based on a linear relationship for each of the independent
mechanical modes of the cavity with resonance frequency
fm and mechanical quality factor Qm for a given mode. 3. Digital processing of the cavity model
Each of the mechanical modes is driven by the square of
the cavity field gradient v2 according to the state space 3.1. Discrete cavity model
equation for the mth mode:
A discrete processing of the cavity algorithm has been
dwm ðtÞ=dt ¼ Am  wm ðtÞ þ Bm  v2 ðtÞ, (9) developed for a digital implementation of the cavity model.
The continuous model of the cavity behavior, presented in
where wm(t) ¼ [Dom(t); d[Dom(t)]/dt] is the state vector and Eqs. (7) and (9), can be approximated by recursive
consists of the time-varying detuning Dom(t) and its time calculations in a finite number of steps. Applying the Euler
derivative; Am[2  2] ¼ [0,1; (2pfm)2, 2pfm/Qm] is the system approximation for time the derivative of a general variable
matrix; vector Bm[2  1] ¼ [0;(2pfm)2  Km] is the input matrix x: dx/dtE(xn+1xn)/T, yields for successive nth and
ARTICLE IN PRESS
T. Czarski et al. / Nuclear Instruments and Methods in Physics Research A 556 (2006) 565–576 569

(n+1)th samples, with time interval T and with identity The resultant detuning of the cavity is Do ¼
matrix 1, the following recursive equations, respectively: Sw(2m1)+w0, where w0 is the initial predetuning.
The discrete cavity algorithm, for the electrical and
mechanical parallel iterative processing, has been imple-
 for the electrical model (7) in the vector representation mented by applying MATLAB code with the sampling
with matrix Ae ¼ [o1/2, Do; Do, o1/2], time T ¼ 1 ms.
vnþ1 ¼ ð1 þ T  Ae Þ  vn þ T  o1=2  RL  in , (10)
where 3.2. Cavity simulator algorithm
in ¼ 2ðig Þn  ðib Þn ,
The functional diagram of the cavity digital simulator
algorithm, according to the electromechanical model, is
 for the mechanical mth mode (9) presented in Fig. 5. The electrical part of the cavity
ðwm Þnþ1 ¼ ð1 þ T  Am Þ  ðwm Þn þ T  Bm  ðv2 Þn . (11) simulator is implemented in an arithmetical function block
using DSP functions. The arithmetic procedure is realized
Applying simplified notation by ignoring time indices according to the state-space relation with state vector v
and by introducing new symbol yields, respectively, representing [I, Q] components of the cavity output
 for the electrical model: envelope. The discrete system matrix E depends on the
v ¼ E v þ ig  ib, (12) cavity detuning Do and the cavity bandwidth o1/2.
A normalized current generator with input signal ig and
where E ¼ [1T  o1/2, T  Do; T  Do, 1T  o1/2] is the
the beam ib, drives the DSP unit. The non-stationary
discrete system matrix and ig ¼ T  o1/2  RL  2ig is the
detuning Do is a parameter of the matrix E. The input and
unified input signal for the generator and ib ¼ T 
output registers correspond to the time delay of cavity
o1/2  RL  ib, for the beam loading,
environment (waveguide). The intermediate frequency IF
 for the mth mechanical mode:
modulator converts the cavity output vector to the signal
wm ¼ ð1 þ T  Am Þ  wm þ T  Bm  v2 . (13) v_m of frequency 250 kHz (reciprocal operation to the I/Q
detection).
Applying the common state vector w (dim ¼ 6  1) and The mechanical model of the cavity is implemented in
the common matrix A (dim ¼ 6  6) and the common the DSP unit, according to the state space relation, with the
vector B (dim ¼ 6  1), for the mechanical model with 3 state vector w. The time-varying detuning and its time
modes, yields derivative are two state-variables for each mechanical
mode. The system matrix A and the vector B depend on the
w ¼ A w þ B v2 , (14) following cavity parameters: the resonance frequency, the
quality factor and the Lorentz force-detuning constant for
where the partial vector and matrices with indices range each mechanical mode. Each of the mechanical modes is
(2m1: 2m) for the mth mode are defined as: w(2m driven by the square of the cavity field gradient v2
1:2m) ¼ wm, A(2m1:2m, 2m1:2m) ¼ 12+T  Am, B(2m generated from the electrical part of the model. Three
1:2m) ¼ T  Bm for m ¼ 1 : 3. dominating resonance frequencies according to the Table 1

Beam Table w0
ib

Electrical model v2 Mechanical model


Input
ig v = E*v + ig – ib w = A*w + Bv2
register
∆ω ∆ω = w0+w(1)+w(3)+w(5)

IF modulator Output v
register w

v_m

Fig. 5. Functional diagram of the cavity simulator algorithm.


ARTICLE IN PRESS
570 T. Czarski et al. / Nuclear Instruments and Methods in Physics Research A 556 (2006) 565–576

P
are considered in the cavity model and the superposition of xk with the parameter aik as follows: P xi ¼ k aik xk . The
all modes, together with the initial predetuning w0, yield equivalent DSP operation is: X i ¼ k Aik X k =Sik , with the
the resultant detuning Do. scaled variable X i ¼ si xi with a scaling factor si, the scaled
parameter Aik ¼ sik aik with a scaling factor sik, the scaled
variable X k ¼ sk xk with scaling factor sk, and the resultant
3.3. Cavity controller algorithm
rescaling factor S ik ¼ sik sk =si . The number of bits equals to
log2(Sik) for the rescaling shift and for each multiplication.
A model of the control system has been developed to
The discrete cavity model from Section 3.1, was adapted
investigate different operational conditions of the cavity.
for the hardware implementation. The scaled model with
The functional diagram of digital controller algorithm is
integer-valued N-bit resolution was developed in the
presented in Fig. 6. The input signal v_m of intermediate
MATLAB system as the pattern for the VHDL coding
frequency f i ¼ 250 kHz from the cavity simulator is
for the FPGA implementation. The numerical accuracy of
demodulated by the I/Q detector unit. The external [I, Q]
the digital model was tested for different bit resolutions,
vector can be selected by the MUX switch. The resultant
and diverse scaling factors. The full bit resolution of the
cavity voltage envelope [I, Q] is calibrated, so as to
MATLAB cavity model, with normalized parameters and
compensate the channel attenuation and phase shifting of
variables, was considered as a reference.
individual cavities. The set-point table contains a signal
The relative step response is shown in Fig. 7 for all
level, which is compared to the actual cavity voltage. The
variables for the 18-bit resolution model compared to the
multiplier, working as a proportional controller, amplifies
reference with full resolution. Two cavity models (digital
the error signal according to the data from the GAIN table
18-bit resolution and full resolution one) were driven with
and closes the feed-back loop. The feed-forward table is
the same input signal generator, equivalent to 14.7 mA
applied and the resultant output signal ig can drive the
current pulse. The total time of the simulation is 10 000 ms
cavity simulator.
and is long compared to the real operating pulse of 1500 ms.
Due to the good agreement the curves for two models are
3.4. DSP modeling and numerical optimization hardly distinguishable.
The relative mean square error of the complex envelope
The hardware implementation of the cavity model Err(N) for N-bit resolution was calculated for n steps
(discrete one) requires numerical care due to the limited according to the expression:
resolution of the parameters and variables of the DSP. X .X
Normalization and scaling of the parameters and variables ErrðNÞ ¼ jðVN Þk  ðVref Þk j2 jðVref Þk j2 ,
is an essential preparation for the DSP implementation
for k ¼ 1 : n, ð15Þ
with fixed point arithmetic. The actual range of the
involved values extends up to seven decades (223) for where (Vref)k is the complex sample of the reference
the cavity model. The best numerical accuracy for each envelope for the kth step, (VN)k is the complex sample of
linear operation can be achieved by preceding scaling the N-bit resolution envelope for the kth step.
(multiplication by power of two) and matching the values The 18-bit resolution cavity model was considered for
within the given N-bit resolution range, common for all the final hardware realization with the relative mean square
involved quantities. The range of the scaled parameters and error Err(18) ¼ 5.1e3. The results for different bit
the maximum values of the variables has been stretched to resolutions are presented in Fig. 8. However, for non-
72N1 for each operation. Concluding the DSP operation, linear systems like this they depend on the detailed
the obtained product is rescaled by bit shifting (division by simulation conditions.
power of two) to preserve its original normalization. The 18-bit resolution version of the FPGA cavity
The main arithmetic processing, for each actual variable simulator is expected to be quite sufficient for this
xi, is a linear combination of the corresponding variables simulation. The limited validity of the heuristic mechanical

Feed-Forward GAIN Set-Point


Table Table Table

M I/Q
v_m
detector
ig + +- Calibration U

X I Q

Fig. 6. Functional diagram of the controller algorithm.


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Cavity output envelope relative to range of 26 [MV]


100

50 Amplitude
In-phase
%

0
Quadrature
-50

-100
0 1000 2000 3000 4000 5000 6000 7000 8000 9000 10000

Detuning and its components relative to normalized range of 2-7 equivalent to ~1243 [Hz]
100

50
predetuning = 370 Hz

w (5)
%

w(3) w(1)
-50

detuning
-100
0 1000 2000 3000 4000 5000 6000 7000 8000 9000 10000

Detuning derivative components relative to normalized range of 24 equivalent to ~2.546 [MHz/s]


100

w(4)
w(6)
50

w(2)
%

-50

-100
0 1000 2000 3000 4000 5000 6000 7000 8000 9000 10000

Cavity output square of envelope relative to range of 212 [MV2]


40

30
%

20

10

0
0 1000 2000 3000 4000 5000 6000 7000 8000 9000 10000
time [microseconds]

Fig. 7. Relative step response for the 18-bit resolution model compared to the reference full resolution (curves are hardly distinguished for two models).

model of the cavity and 14-bit resolution of the preferred integrated with a daughter board (DB). The DB is realizing
analog-to-digital converter do not require a resolution of the hardware DSP algorithms. The DB possesses two fast
better quality. The main parameters of the FPGA 14-bit, 65 MHz ADC and DAC and a FPGA VirtexII chip
simulator are combined in Table 2. equipped with 18  18 bit multiplication circuits. The
adaptation of the kit to the needs of the user standard is
4. FPGA-based cavity simulator integrated with controller realized by embedding it on a carrier board 6HE EURO, as
presented in Fig. 9. The SIMCON card occupies two slots
A hardware layer of the cavity simulator and controller in the VME 6U crate. The power supply is provided either
system (SIMCON) is realized with the commercial devel- from the VME bus or from the power unit provided with
opment kit [4]. The kit consists of the main board (MB) the board. The enhanced parallel port (EPP) protocol is
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Fig. 8. Relative mean square error of complex envelope for different bit-resolution of cavity model (total time of the simulation—10 000 ms).

Table 2
Main parameters of the FPGA simulator

DSP resolution DAC and ADC resolution Sampling time Minimum processing time Maximum carrier frequency

18 (bit) 14 (bit) 1 ms 200 (ns) 1.25 (MHz)

daughter board. The optional connection of the external


ANALOG INPUT 1 control to the simulator or controller of the FEL cavity is
ANALOG INPUT 2
EXTERNAL CLOCK possible via the provided I/O ports. The digital TTL inputs,
ANALOG OUTPUT 1 present on the VME board, were used for synchronization
ANALOG OUTPUT 2
with the 1 MHz clock and the 10 Hz trigger. A signal of
DIGITAL INPUT 1 10 Hz is the major trigger of the accelerator and 1 MHz is
DIGITAL INPUT 2
DIGITAL INPUT 3
the sampling frequency of the down-converted signal.
DIGITAL OUTPUT 1 These signals are distributed in the existing analog
DIGITAL OUTPUT 2 generation of the whole control system of the FEL.
DIGITAL OUTPUT 3
The functional structure of the SIMCON is presented in
LED 1 Fig. 10.
LED 2
A core of the SIMCON is built of two non-dependent
modules: the CAVITY SIMULTOR and the CAVITY
EPP CONNECTOR
CONTROLLER. They are programmed inside the FPGA
chip as hardware DSP algorithms. The algorithms use fast
internal multiplication components. The blocks work in
parallel in real time. They are controlled by programmable
USB CONNECTOR parameters provided by the PROGRAMMABLE DATA
CONTROLLER block. The parameters are scalars (cavity
and controller data) and vectors (feed-forward and beam
data). The set parameters stem from the algorithms
Fig. 9. Hardware layer of the SIMCON system. PCI/USB kit board [4]
described in detail in Ref. [3].
positioned on the VME carrier.
The block of INPUT MULTIPLEXERS allows the
programmable input of the control signals of controller
used to communicate with the board because the EPP has a and simulator blocks. Realization of the following func-
simple implementation in the FPGA chip. The hardware tions is possible through this block: internal digital feed-
realization of the interface was described in detail in [5–7]. back loops, connection of external analog signals from AD
The integrated SIMCON system is realized in the form converters, setting of test vectors initially programmed in
of a parameterized structure of functional blocks in the Data Acquisition (DAQ) block (described below). The
VHDL. The AD and DA converters are located on a OUTPUT SWITCH MATRIX selects different outputs to
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Fig. 10. Multilayer functional structure of the SIMCON.

the DA converters or data registration in DAQ block. A ADC FPGA DAC


CAVITY SIMULATOR
suitable configuration of the switch matrix gives appro-
priate analog feed-back between the cavity controller and BEAM TABLE
simulator.
The block DATA ACQUISITION DAQ allows for
current monitoring of the most important signals in the FPGA MATLAB FPGA
system. These may be input and output signals or internal internal connection SYSTEM internal connection

results from the DSP processing in the algorithms of cavity


simulator and controller. DAQ block is used as program-
mable signal generator for the tests of the input and output SET-POINT TABLE
signals. FEED-FORWARD TABLE
The block INPUT PROCESSING provides a conversion GAIN TABLE
of values between physical 14-bit resolution of ADC FPGA
DAC ADC
converters and 18-bit resolution of internal DSP proces- CONTROLLER

sing, the input signal calibration including amplification


and regulated shift of the constant voltage value, as well as Fig. 11. Functional diagram for the one chip FPGA system.
smoothing of the input channels (preprocessing) using a
method of averaging. The block OUTPUT PROCESSING The step operation and vector stimulus mode is applied
provides conversion between physical 18-bit resolution of for testing the FPGA device coupled to the MATLAB
the internal DSP processing and 14-bit resolution of DAC. system via the COMMUNICATION CONTROLLER.
The block TIMING & STATUS CONTROLLER The FPGA signal processing was verified according to the
provides internal synchronization of all processes of the desired algorithm. To realize online processing, a synchro-
SIMCON system. It selects between the external clock nous 40 MHz pipeline bus is used. The system flexibility,
signals provided by the accelerator control system or clocks obtained in this way, gives the possibility to choose
from external generators. The latter case enables autono- arbitrarily the number of clock periods necessary to do
mous work of the system. Switching of the operation modes the successive, partial calculations by the DSP blocks.
of the system is possible, i.e. performing simulation in real
time or in the step simulation regime with reference vectors. 5. Software simulation and results of hardware test
The programming layer of all blocks of SIMCON system procedure
is realized by the control computer system with the aid of
the COMMUNICATION CONTROLLER block. The The FPGA cavity simulator with controller is coupled to
EPP hardware transmission protocol was used for this the MATLAB system via a communication interface. The
purpose. The signal distribution bases on the Internal real time tests are carried out according to the schematic
Interface standard, described in detail in Ref. [7]. block diagram shown in Fig. 11. The MATLAB system
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Cavity output envelope [MV] Controller output [mA]


30 20

25
flattop 15

20
10
15
filling
10 5
decay

5 0

0
-5
-5
I
I -10
-10 Q
Q
Amplitude
Amplitude
-15 -15
0 500 1000 1500 2000 0 500 1000 1500 2000
time [10 s]-6 time [10-6 s]

Phase of cavity and controller output [rad] Cavity detuning [Hz]


1 400

300
0.5
200

0 100

0
-0.5
-100

-1 -200

-300
-1.5
Cavity -400
Controller
-2 -500
0 500 1000 1500 2000 0 500 1000 1500 2000
time [10-6 s] time [10-6 s]

Fig. 12. MATLAB simulation of the cavity model for real operation conditions.

initiates the simulation process for given primary para- resulting example, for the real operational condition, is
meters of the cavity model according to Table 1. The presented in Fig. 12. The cavity is driven in pulse mode
secondary, internal parameters for the FPGA system were forced by control feed-back together with the direct control
calculated as described in the second paragraph. The by feed-forward. During the first stage of the operation, the
required data for the set-point and feed-forward tables of cavity is filling with a constant forward power, resulting in
the controller are generated according to the cavity model an exponential increase of an electromagnetic field,
by an iterative processing striving to the optimal control. according to its natural behavior in resonance condition.
The MATLAB simulation process is verified by a plot. The When the cavity gradient reached the required final value,
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T. Czarski et al. / Nuclear Instruments and Methods in Physics Research A 556 (2006) 565–576 575

the beam loading current is injected, resulting in the steady-


state flattop operation. Turning off both, the generator and
the beam current, yields an exponential decay of the cavity
field.
The resulting parameters and data are loaded to the
FPGA internal memory. The controller can drive the
cavity simulator via the internal digital connection (18-bit
data resolution). The FPGA system can run itself cyclically
according to the given data tables. The cavity simulator
and controller can be also driven independently via the
external connection applying 14-bit ADC. The 14-bit
DACs convey data from the cavity simulator or from
controller outside FPGA system.
The real-time tests were carried out according to the
described simulation procedure. The FPGA system runs
itself cyclically according to the given data tables and the
output signals are monitored by oscilloscope. The simula- Fig. 15. Output envelope of the cavity controller with short pulse beam
compensation during flattop level.

Fig. 13. Output envelope of the cavity simulator driven by feed-back and
feed-forward mode. Fig. 16. Cavity simulator output for the 250 kHz modulated signal.

tion results corresponding to Fig. 12 are presented in


Figs. 13–16.

6. Conclusions

The TESLA cavity simulator integrated with controller


has been implemented for the control system purpose,
applying FPGA technology. An efficient DSP algorithm
was developed describing a cavity model in a comprehen-
sive way. Proper scaling of parameters and variables in the
DSP program provides an optimal numerical precision for
a given bit resolution. The FPGA cavity simulator has been
investigated for different operational conditions: step
response, feed-forward and feed-back mode. The step
operation and vector stimulus method is proven to be
Fig. 14. Output envelope of the cavity controller operated in feed-back efficient for testing a FPGA device coupled to the
and feed-forward mode. MATLAB system. The FPGA implementation with 18-
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576 T. Czarski et al. / Nuclear Instruments and Methods in Physics Research A 556 (2006) 565–576

bit resolution is sufficient for simulation purpose and References


control system testing. The cavity simulator can be adopted
for superconductive and normal conductive resonator [1] T. Schilcher, Vector sum control of pulsed accelerating fields in
Lorentz force detuned superconducting cavities, Ph.D. Thesis, Ham-
models by applying different sets of parameters. The very
burg, 1998.
confined resources occupied by the 18-bit resolution model [2] M. Liepe, W.D.-Moeller, S.N. Simrock, Dynamic Lorentz force
(inside a single programmable chip) allow for prospective compensation with a fast Piezoelectric tuner, in: Proceedings of the
simulation and control of a large number of accelerator 2001 Particle Accelerator Conference, Chicago.
cavities by a single FPGA chip. [3] T. Czarski, R.S. Romaniuk, K.T. Pozniak, S. Simrock, Cavity control
system, advanced modeling and simulation for TESLA linear
accelerator, TESLA Technical Note, 2003-06, DESY.
Acknowledgments [4] http://www.nallatech.com/ [Nallatech Homepage].
[5] K.T. Pozniak, T. Czarski, R.S. Romaniuk, Functional analysis of DSP
blocks in FPGA chips for application in TESLA LLRF system,
The authors would like to thank DESY Directorate for TESLA Technical Note, 2003-29, DESY.
providing excellent conditions to perform the work [6] K.T. Pozniak, R.S. Romaniuk, K. Kierzkowski, Parameterized
described in this paper. control layer of FPGA based cavity controller and simulator for
TESLA test facility, TESLA Technical Note, 2003-30, DESY.
We acknowledge the support of the European Commu-
[7] K.T. Pozniak, M. Bartoszek M. Pietrusinski, Internal interface for
nity Research Infrastructure Activity under the FP6 RPC Muon trigger electronics at CMS experiment, in: Proceedings of
‘‘Structuring the European Research Area’’ program the SPIE, Photonics Applications II In Astronomy, Communications,
(CARE, contract number RII3-CT-2003-506395). Industry and High Energy Physics Experiments, vol. 5484, 2004.

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