Design of Mechatronics

Systems

Supervisor:
Prof.Dr/ Mohamed Sedky El-Habrouk

Student:
Name\ Youssef Walied El-Ebiary
ID\ 7576
Dep.\ Mechatronics & Robotics
 Communication Protocols

I- Introduction:
-Communication protocols are essential in embedded systems to enable communication between
different components and devices. Embedded systems are often resource-constrained, so it is
important to choose communication protocols that are efficient and reliable.

Some of the most common communication protocols used in embedded systems include:
-UART
-USART
-SPI
-I2C
-CAN

-And in the following we’re going to discuss each protocol briefly,

II-I- UART (Universal Asynchronous Receiver/Transmitter):-

- UART is a type of Serial Communication protocols
which is the most famous and most simple type of
communication protocols used in embedded systems.
- It’s a Full-Duplex communication protocol, which
means that any device can send and receive data
simultaneously.
- It’s an Asynchronous communication protocol which means it requires no clock for syncing both
devices, which offer a great advantage for UART over other communication protocols used in
embedded systems as it enables the devices to communicate over long distances as there will be
no clock distortion, and make the system more simple, as well as less wires are needed for
communication (normally 2 to 3 wires are used).
- Since there is no clock used for synchronization, the synchronization is done by two main
aspects, the first one is the Data Frame and the second is the predefined Baud Rate.
- Once the Transmitter puts a word in the transmit buffer, the word is packaged with one start bit
(mostly a logic low) , followed by the data bits, followed by Parity Bit (simple error checking
mechanism), and finally the stop bit/bits (mostly a logic high). And then the device starts sending
the message bit-by-bit with every clock.
- The Receiver receives the message it defames it (discards the start and stop bits), the data is
stored in Receive buffer and a flag is raised indicating a receive complete.
- Its main disadvantages is that : there is large overhead on the data bits (due to synchronizing
bits), also Data transfers speed is low compared to other synchronous serial communication
protocols. And it does not support communication with multiple devices.

II-II- USART (Universal Synchronous Asynchronous Receiver/Transmitter):-

-The USART (Universal Synchronous Asynchronous Receiver/
Transmitter) protocol is a versatile serial communication protocol that
can be used in both synchronous and asynchronous modes (We
discussed the asynchronous mode of it before). In synchronous mode, it
uses a clock signal to synchronize data transmission between two
devices. This makes it possible to achieve higher data rates than with asynchronous communication.
the USART consists of one master device (that generate clock) and a slave (that sink the clock), but
it is a single-master-single-slave device.

-Its theory of operation is basically the same as the normal UART (or USART in asynchronous
mode) , the Transmitter transmits data in frames. Each frame consists of a start bit, a data word, and
a stop bit. The start bit is used to signal the beginning of a frame, and the stop bit is used to signal
the end of a frame. The data word is the actual data that is being transmitted. The only difference is
that a clock signal is used to synchronize the transmission and reception of each bit in the data byte.
The USART master sends the clock signal to the slave, and the slave uses the clock signal to sample
the data bits.
II-III- SPI (Serial Peripheral Interface):-
- SPI (also called “four-wire” serial bus) is another
Synchronous communication protocol, which means it uses
separate lines for data and a clock to keep both sides in
perfect sync.
- It’s a Master-Slave communication, but it is a Single-Master
and Multi-Slave communication and a slave can not change
its role to a master (i.e there is no bus arbitration).
- Full-Duplex communication, which means each device can
send and receive data at a time.
- Communication always is started by the master and slaves only can send and receive data when
instructed to. And the master controls each slave through a line called Slave Select or Chip
Select.
- The Master and Slave are connected in such a way that the
two Shift Registers form an inter-device circular buffer.
These Shift Registers operate in Serial-In/Serial-Out
(SISO) fashion, the output of the master’s shift register is
the input of the slave shift register (via MOSI line) and the output of the slave shift register is the
input of the master shift register (via MISO line), this makes the connection operate in a circular/
ring buffer.
- Data are usually shifted out with the most significant bit first, while shifting a new least
significant bit into the same register position. As soon as a clock pulse arrives, the shift registers
come into operation and the data in the registers are shifted by one bit towards the left. This
events MSB from Master and MSB from slave, and the shifted bit occupies the LSB from the
other device.
- Its main Advantages are, it’s faster than Asynchronous serial communications, Its hardware is
very simple (it’s basically only a shift register), no complicated slave addressing system like I2C,
and low power requirements and higher speed than I2C.
- Its main Disadvantages are, that it requires more signal lines (wires) than other communication
methods as it requires separate CS/SS lines to each slave, which can be problematic if numerous
slaves are to be used, and it also supports only one master (the master microcontroller controls all
the communications, slaves cant talk to each other directly).
II-IV- I2C (Inter-Integrated Circuit):-
- I2C stands for Inter-Integrated Circuit. It is a bus
interface connection protocol incorporated into devices
for serial communication. It was originally designed by
Philips Semiconductor in 1982. Recently, it is a widely
used protocol for short-distance communication. It is also
known as Two Wired Interface (TWI).
- It’s is another Synchronous communication protocol, which means it uses separate lines for data
and a clock to keep both sides in perfect sync.
- It’s a Master-Slave communication, but it is a Multi-Master and Multi-Slave communication and
a slave can change its role to a master (i.e there is bus arbitration unlike SPI protocol).
- Half-Duplex communication, which means each device can either send or receive data at a time.
- It uses only 2 bi-directional open-drain lines for data communication called SDA and SCL. Both
these lines are pulled high.
Serial Data (SDA) – Transfer of data takes place through this pin.Transmission occurs by
toggling the lines by pulling LOW and releasing HIGH
Serial Clock (SCL) – It carries the clock signal.

- When a Device wants to send (or receive) data, it pulls the SCL
line low, followed by the Start-Bit(Its one of two times where its
allowed to pull the SDA line low while the SCL line is high) it’s
sent to wake the idling slave devices. At this instant, This device
became Master (the master is defined as the device that clocks the
bus, addresses slaves and writes or reads data to and from registers in the slaves) and all other
devices are slaves till the Master sends a Stop-Bit. The Master then starts to send a 7-Bit slave
address, The slaves respond only when interrogated by the master, through their unique address.
Hence it is imperative to avoid duplication of addresses among slaves. Slaves never initiate a
data transfer.
- A slave address is sent in 8-bit byte format, MSB first, but the last bit signifies whether the
transaction will read or write to the slave. In effect, the upper 7 bits, constitute the slave address,
while the 8th bit serves as a READ/WRITE# command bit. Thus there is an address space of 128
unique addresses for addressing up to 128 slaves. If the first seven bits match the SLAVE
device’s address it continues by reading the 8th bit (READ/WRITE# bit) of the address byte. All
 other SLAVE devices ignore the remainder of the transaction. A LOW in the READ/WRITE# bit
specifies that the MASTER will write data to the addressed SLAVE device, and for a HIGH, the
MASTER will read data from the SLAVE device. Once the address byte has been read by the
corresponding SLAVE it will acknowledge this transfer by sending an acknowledge bit by
pulling SDA LOW for the adjacent clock HIGH pulse period and then assume the role of a slave-
transmitter or slave-receiver depending on the READ/WRITE# bit sent. From this point onwards,
unless a stop bit is sent, the SLAVE assumes that since it has been already addressed, all
communication is being directed to it.
- As a form of feedback, after every byte transmission the receiving device sends an Acknowledge
or Not Acknowledge bit. An Acknowledge bit is generated by the receiver by holding the SDA
line low during a HIGH SCL period, while a Not Acknowledge bit is generated when the receiver
leaves the SDA line passively pulled HIGH and does not respond in any way. This fact implies
that in response to an address byte, all unmatched SLAVEs send a Not Acknowledge bit by not
responding.
- The Master can send a Repeated Start Condition (a Start without pre-
Stop Condition), to communicate to another slave or change its role
from write to read from same slave.

- The transmission continues between Master and Slave in the form of

Data-ACK-Data-ACK.

till the master terminate the communication with the Stop-Bit.

- Since it’s a Multi-Master protocol, Arbitration occurs, All master devices monitors the SDA line,
if it’s gone high while it should be low this indicates that another master is holding the line so it
releases the line and become slave till the holding Master releases the line.
II-V- CAN (Controller-Area Network):-
- CAN is short for ‘controller area network’. It is a serial communication bus designed for robust
and flexible performance in harsh environments, and particularly for industrial and automotive
applications.
- The CAN bus is a broadcast type of bus. This means that all nodes can ‘hear’ all transmissions.
There is no way to send a message to just a specific node; all nodes will invariably pick up all
traffic. The CAN hardware, however, provides local filtering so that each node may react only on
the interesting messages. CAN uses short messages the maximum utility load is 94 bits. There is
no explicit address in the messages; instead, the messages can be said to be contents-addressed,
that is, their contents implicitly determines their address.
-There are four different message types (or ‘frames’) on a CAN bus:
1.The Data Frame
2.The Remote Frame
3.The Error Frame
4.The Overload Frame

- The message arbitration (the process in which two or more CAN controllers agree on who is to
use the bus) is of great importance and more complex than I2C for example.
- The original ISO standard laid out what is called Standard CAN. Standard CAN uses an 11-bit
identifier for different messages, which comes to a total of 2^11, i.e. 2048, different message
IDs. CAN was later modified; the identifier was expanded to 29 bits, giving 2^29 identifiers.
This is called Extended CAN. CAN uses a multi-master bus, where all messages are broadcast
on the entire network. The identifiers provide a message priority for arbitration.
CAN uses a differential signal with two logic states, called recessive and dominant. Recessive
indicates that the differential voltage is less than a minimum threshold voltage. Dominant
indicates that the differential voltage is greater than this minimum threshold. Interestingly, the
dominant state is achieved by driving a logic '0' onto the bus, while the recessive state is
achieved by a logic '1'. This is inverted from the traditional high and low used in most systems.
The Dominant overwrites the Recessive during Arbitration. The following Figure illustrates the
message structure in ISO standard.
- The first bit is the Start Of Frame (SOF). This dominant bit represents the start of a CAN
message.
Next is the 11-bit Identifier (for ISO standard), which establishes the priority of the CAN
message. The smaller the identifier, the higher the priority of the message.

The ٍRemote Transmission Request (RTR) bit is normally dominant, but it goes recessive when
one node is requesting data from another (i.e. it specifies the types of message wether it’s a Data-
Frame or a Remote-Frame (where the requesting node seeks data from another node on the CAN
bus) ).

The identifier extension (IDE) bit is dominant when a standard CAN frame is being sent and not
an extended one. The r0 bit is reserved and not currently used.

The Data Length Code (DLC) nibble signifies how many bytes of data are in this message.

Next is the Data itself, being as many bytes as represented in the DLC bits.

The Cyclic Redundancy Check (CRC) is a 16-bit checksum for detecting errors in the transmitted
data. If the message is properly received,

the Receiving Node overwrites the Recessive Acknowledge bit (ACK) with a Dominant bit. The
ACK also contains a delimiter bit to keep things synchronized.

The End Of Frame (EOF) signifies the end of the CAN message and is 7 bits wide, for detecting
bit-stuffing errors.

The last part of a CAN message is the Inter-Frame Space (IFS), used as a time delay. This time
delay is precisely the amount of time needed for a CAN controller to move the received message
into a buffer for further processing.
- Any CAN controller may start a transmission when it has detected an idle bus. This may result in
two or more controllers starting a message (almost) at the same time. The conflict is resolved in
the following way. The transmitting nodes monitor the bus while they are sending. If a node
detects a dominant level when it is sending a recessive level itself, it will immediately quit the
arbitration process and become a receiver instead. The arbitration is performed over the whole
Arbitration Field and when that field has been sent, exactly one transmitter is left on the bus. This
node continues the transmission as if nothing had happened. The other potential transmitters will
try to retransmit their messages when the bus becomes available next time. No time is lost in the
arbitration process.

- The two main important messages in CAN Protocol are the Data Frame and Remote Frame
Data Frame: “Hello everyone, here’s some data labeled X, hope you like it!”
The Data Frame is the most common message type. It comprises the following major
parts (a few details are omitted for the sake of brevity):
-The Arbitration Field, which determines the priority of the message when
two or more nodes are contending for the bus. The Arbitration Field contains:
-An 11-bit Identifier and one bit, the RTR bit, which is dominant for
data frames.
-The Data Field, which contains zero to eight bytes of data
-The CRC Field, which contains a 15-bit checksum calculated on most parts
of the message. This checksum is used for error detection
-An Acknowledgement Slot; any CAN controller that has been able to
correctly receive the message sends an Acknowledgement bit at the end of
each message
Remote Frame: “Hello everyone, can somebody please produce the data labeled X?”
The Remote Frame is just like the Data Frame, with two important differences:
-It is explicitly marked as a Remote Frame (the RTR bit in the Arbitration
Field is recessive)
-There is no Data Field.