DEPARTMENT OF ELECTRONICS AND ELECTRICAL COMMUNICATION ENGINEERING INDIAN INSTITUTE OF TECHNOLOGY KHARAGPUR ae Date:_ Feb 2016, FN/AN, Time: 2Hrs., Full Marks: 60, No, of Students :670 (Non-ECE branches); Mid Spring Semester-2016, Sub, No.: EC21101, Sub. Name: Basic Electronics Instructions _ — ‘+ All waveform sketches /diagrams must be neatly drawn and clearly labeled. Answers must be brief and to the point ‘The final answers (numerical valves wih unit) should be underined or enclosed within BOX] with unt For every Question No, start your answer from 2 new page. Avoid writing answers of the various pars of a single question at diferent locations in your answer-script. For any value related to any device parameter or cireit parameter, which you may find ot given witha problem, assume suitable vale for such parameter. marks) 4A Multiple choice questions: 1. Inapn-junction diode, reverse saturation current does not exist during its (a) reverse bias configuration (b) forward bias configuration (©) both reverse and forward bias configurations (@) none of the above I. Consider the RC filter eireuit (shown in the right) with me ANN 0 as a time constant and X, as the reactance of the capacitor, T ° Yorn ° © s @) — We REX? Il. Consider the circuit shown in the right with an ideal ‘Zener diode. What is the smallest value of R so that IR< 50 pA a (2) 350kQ (b) 500 kK. (©) 250k (@) 300k V. Let Cy-2Cy, Ry Rr, where Cy and Ry, Cp and Ry are the filter capacitances and resistances of half-wave (HWR)and full-wave (FWR) rectifiers based AC to DC converters. When same signal is applied, the relation between ripple voltage from the filter of FWR based converter (Vr) & ripple voltage from the filter of HWR based converter (Vu) is (@) Vn= Vin (O)Vr= 2Vn4 (\Vn= 0.5 Vi (Vr 4 Vin f. “Barly Effect” in Bipolar Junction Transistor circuits in Common Emitter Configuration is related to the phenomenon that with increase in Collector-Emitter Voltage (Ve): (a) Minor change occurs in collector current (Ic) even (b) Minor change occurs in emitter current (Iz) even when collector ‘when base current (Ip) is constant current (Ic) is constant (©) Minor change occurs in base current (Ip) even (4) Minor change occurs in base current (Is) even when emitter current when collector current (Ic) is constant lp) is constant B. Fill in the blanks (6 marks). \ pn junction is formed when a p-type and n-type semiconductors are brought in contact with each other. The depletion width or ___“as the junction is either forward biased or reverse biased. The dominant process for constituting the diode (pn ‘nction) current is . The silicon diode (cut-in voltage, V, =0.7 V) is used to build a full-wave bridge rectifier. Ifthe input time arying signal has frequency of 50 Hz. and peak to peak amplitude of 20 V, the value of the capacitance required to achieve a ripple oltage of 0.2V is (assume the output load resistance of 10 kM). An n-type semiconductor with slightly higher doping is rought in contact with lightly- doped p-type and moderately-doped n-type semiconductors to acts as npn transistor. Ifthe common- ase current gain of this transistor is 0.99 and the base current ig is 15 A, the collector and emitter currents are : :spectively (assume thatthe transistor is biased in the forward-active mode), C. Column matching (4 marks) [write down the correct combination only) fage £[2.[Simple diode | Gotd Tans semiconductor | Conceniation gradient Zener diode | Rectifier (i) Excinsic semiconductor | Positively charge carier (| Semiconductor | Wood Drift curent Pure form of semiconductor Metal Voltage Regulator | Diffusion curren Electric field induced charged carrier movement | Insulator___| Gallium Arsenide | __Hole_———_| Impure form of semiconductor — 2A, Draw the circuit diagram of (i) a half wave rectifier and (i abridge full-wave rectifier that has fier capacitor across the load resistance. Also, neatly draw the output voltage against time in reference to ac input voltage in cach case. Next, conser the following design criteria for these two circuits. With 15022 load resistance and $0 Hz ac input, the desired peak de output voltage is 12V and ripple voltage must not be more than 0.3V. Cuin voltage of each diode is 0.7V. For cach of i) and (i), find the required rms value atthe secondary of transformer, value of the filter capacitance and peak current through each diode.|(1+2)#2+2+2 = 9 marks} 2B. Consider the voltage regulator circuit given in the right. It should have a K nominal output voltage of 10V. The Zener diode used has 10V drop at 25mA a" ——— = Zener current with 5Q2 Zener resistance. The power rating ofthe Zener diode % is 1W. The input power supply voltage has a nominal value of 20V and can vary 425%. The output load current can vary between 0 and 20mA. The minimum Zener current is SmA. Find the input resistance R, maximum variation in output voltage and percentage voltage regulation, [2+3+1= 6 marks}. 3A. Plot v, for the circuit shown in the right with proper explanations ‘Assume diode eut-in voltage (V4) of 0.7 V. The input pulse varies between +20V to -SV. The resistance in the circuit is 2.2 kA. [5 marks} ‘3B. Consider the circuit & details (shown below) of the associated devices. Let input voltage VII(=10 sinat) begin from t=O as shown below. Corresponding to 2 wavelengths of VII, plot the measured output voltages MVI, and MV2. All the plots must depict accurate voltage values. Explicitly mention the positive (highest) and negative (lowest) peak values of output voltages in cach case. (10 marks}. 4A. Consider the BJT common-emitter circuit, shown in the right, working in the forward active mode. If Vpx(on) =0.7V, 120. Obtain the base, collector and emitter currents, common-base current gain factor a, the output voltage Vee, the base-collector voltage Vic and based on it confirm whether the circuit isin forward active mode or not. [8 marks] 4B. () Calculate the intrinsic cartier concentration of Si at room temperature (25°C) and at 40°C. Note that forbidden energy gap is 1.1eV and the coefficient B for Si is 5.23>10"® (em?K™?), Boltzman constant ks =1.38%10 J/K. [2 marks] Gi) Calculate thermal equilibrium concentration of free electrons and holes if donor concentration is 10"” em”. [2 marks} (Gi) Find the built-in potential and junction capacitance at these two values of temperature. Consider the reverse biasing voltage of 5.2 Vat both temperature values, assume Cy ~0.SpF, acceptor concentration is 10" em” . [4 marks] End of Question Paper-———————_______ Rage 22