JSPM University Pune

Faculty of Science and Technology

School of Computational Sciences & Mathematics
SY B. Tech [Lateral Entry]

QUESTION BANK
Sub: - Digital Logic Design Div: - A, C, D & E
Faculty: - Dr. Alisha Priya

1. Determine the decimal numbers represented by the following binary

numbers:
i)101101 ii)1001.0101
2. Express the following decimal numbers in the binary form:
i)10.625 ii)0.6875
3. The octal equivalent of the hexadecimal number AB.CD is
3. Convert (6327.4051)8 into its equivalent decimal number.
4. Convert (2F9A)16 into its equivalent binary and decimal number.
5. Find the 1’s complement of the following binary numbers:
i)0100111001 ii)11011010
6. Find the 2’s complement of the following binary numbers:
i)10010010 ii)01100100
7. Convert the hexadecimal number 64CD to binary, and then convert it from
binary to octal.
8. What is the largest binary number that can be expressed with 16 bits? What
are the equivalent decimal and hexadecimal numbers?
9. Given two binary numbers X = 11010 and Y = 1101, perform the subtraction
X-Y using 2’s complement.
10. Obtain the 1’s and 2’s complements of the following binary numbers:
(a)00010000 (b) 00000000 (c) 11011010 (d) 10101010 (e) 10000101 (f)
11111111
10. Design 4-Bit Binary to Gray Code converter.
11. Convert the following Binary Codes to Gray Codes:
i)10011100 ii)00110011 iii)0110011010
12. Draw logic symbols and truth table for
i) NAND and ii) XNOR Gate.
13. Why NAND and NOR Gates are called as Universal Gates? Explain
 with suitable example.
14. Draw i) AND ii) OR iii) XOR gate using NOR gate.
15. Represent the decimal numbers i)396 and ii)4096 in binary form in i)
Binary Code ii) BCD Code iii) Excess-3 Code.
16. Design 4-Bit Binary to Gray Code converter.
17. List the applications of i) Gray Code ii) Excess-3 Code iii) BCD Code.
18. Prove the following using De Morgan’s Theorems:
i) AB+CD=[(AB)’. (CD)’]’ & ii) (A+B) (C+D) = [(A+B)’+(C+D)’]’
19. Solve the following equation using K-map minimization Techniques:
i) Z=f(A, B,C,D)=Σm(2,7,8,10,11,13,15)
ii) Z=f(A,B,C,D)=Σm(1,3,5,8,9,11,15)+d(2,13)
20. Simplify the following Boolean Expression using Quine Mc Cluskey
Method: i) Z=f(A,B,C,D)=Σm(0,1,3,7,8,9,11,15)
ii) Z=f(A,B,C,D)=Σm(1,5,6,12,13,14)+d(2,4)
21. Implement the Boolean function:

i) With AND, OR, and inverter gates

ii) With NAND and inverter gates
22. Fill in the blanks:
i) A K-map of n-variables contains___________cells.
ii) Number of inputs for a Full Adder is________.
iii) A combinational circuit does not have____________.
iv) Figure of Merit of a logic family is given by_________________.
v) The minimum number of selection inputs required for selecting
one out of 32 inputs is_________.
23. Minimize the logic function using Quine-McCluskey Method:
F (A, B, C, D) =Σm (8,10,12,13,14)
24. Draw half adder using NAND gates
25. In the logic circuit shown in the figure, Y is given by

26. State and prove De Morgan theorems.

27. What do you mean by half adder and full adder? How will you
implement full adder using half adder? Draw the circuit diagram.
28. Design 3-bit binary counter using T flip-flop.
29. Implement 1:16 demultiplexer using 1:4 demultiplexers
30. Implement full subtractor using demultiplexer.
31. Draw the circuit for 3 to 8 decoder and explain
32. Compare: i) MUX and DEMUX ii) DEMUX and DECODER
33. Design and implement a full adder circuit using a 3: 8 decoders.
34. What do you mean by parity? Draw and Explain Parity Generator Circuit.
35. Draw Half Substractor and Half Adder using NAND Gates.
36. Draw and explain the operation of T-Flip Flop.
37. Draw 3-bit SISO and PIPO Register using D-Flip Flop.
38. Draw and explain the working of 4-bit Ring Counter using D Flip-Flop.
39. Differentiate between Latch and Flip Flop?
40. List applications of Flip Flop.
41. Convert JK Flip Flop using D-Flip Flop
42. Compare Sequential Circuit with Combinational Circuit.
43. Fill in the blanks:
i)ALU stands for ___________________.
ii)Number of flip flops required to store n-bit information is _____.
iii)Master Slave JK flip flop is used in a JK Flip flop to eliminate____.
iv)A ripple counter is an ____________sequential circuit.
v)The output of an AND Gate is high if and only if all its inputs are
____.
vi)To implement full adder using half adder, the number of half adders
is _____ and OR gate is _____.
44. Implement following Boolean function using PAL

45. What is the difference between PLA, PAL and PROM.

46. Difference between mealy and moore machine.
47. Draw an ASM Chart for a 3-bit binary counter having enable line X such
that: X=1 (Counting Enable), X=0 (Hold Present count).
48. Convert the state diagram diagram of Fig. below to ASM chart.
49. Draw an ASM Chart and state diagram for the synchronous circuit having
the following descriptions: The circuit has a control input C, clock and
outputs x, y and z. i) if C=1, on every clock rising edge the code on output
x, y and z changes from 000 010 100 110 000 and repeats.
ii)if C=0, the circuit holds the present state.
50. Using PROM realise the following expressions:
a) F1(a, b, c) =Σm (0,1,3,5,7)
b) F2(a, b, c) = Σm (1,2,5,6)
49. Implement the following function using PLA:
F1 = Ʃm (0, 3, 4, 7) & F2 = Ʃm (1, 2, 5, 7)
50. Implement 3-bit binary to gray code converter using PLA.
51. Draw and explain the general structure of PLA and PAL.
52. Draw the clocked Master-Slave J-K flip-flop configuration and explain how
it removes race-around condition in J-K flip-flops.
53. Design 4:1 MUX using PAL.
54. What is the difference between PLA, PAL and PROM.
55. List advantages and disadvantages of TTL and CMOS Logic family.
56. Define the following terms:
Fan out
Noise Margin
Figure of Merit
Propagation Delay
57. Draw and explain the block diagram of microprocessor-based system.
58. Answer in one word.
i)Example of Combinational Circuit
ii)Example of Sequential Circuit
iii)One bit memory cell
iv)Group of Flip Flops
59. What is logic family? Give classification of logic families.
60. State and explain any 4 characteristics of digital ICs.
61. Draw 2-input standard TTL NAND gate. Explain operation of transistor
(ON/OFF) with suitable input conditions and truth table.
62. Explain wired logic output of TTL with neat circuit diagram.
63. List advantages and disadvantages of TTL and CMOS Logic family.
64. Draw the structure of CMOS Inverter gate. Explain its working.
65. Draw neat circuit diagram of 3-input CMOS NAND and CMOS NOR Gate.
66. Compare TTL with CMOS Logic Family. [Any 8 Points]
67. What is Microprocessor? Explain the system bus in brief.
68. Which are various functional units of microprocessors? Explain ALU in
brief.
69. What is Microprocessor? Explain various operations of the microprocessor.
70. Explain working of 4-bit binary parallel adder.