The LNMIIT, Jaipur

Department of Electronics and Communication

Engineering
Basic Electronics Lab (ECE-106)

Name: Saurav Kumar Roll No.:23UCC597

Experiment No. 9

Aim: To analyse and design a sequential logic circuit (different Latches and Flip Flops).

Apparatus Used: 1. CRO, Function Generator, Breadboard.

2. ICs: 7400, 7404, 4027, LEDs, limiting resistors and jumper wires.

Theory:
Observation Table:
DSO SCREENSHOTS:

SR Latch S =0 ,R =1, Q=1 and Q’ = 0

GATED SR Latch S =1,C=1, R =0, Q=1 and Q’ = 0

D-Latch C=1, D=1 and Q=1

JK Flip flop
J =1,k=0,Q=1
J=1,K = 1,Q =1,Frequency = 500Hz

D Flip Flop D =1,Q =1

T Flip Flop T =0, Q =1

Conclusion
This experiment taught me-
1) About various latches and flip-flop, and their use cases.
2) How to use IC 4027.
3) Concept of memory storage.