North South University

Department of Electrical & Computer Engineering

CSE231L.5

Lab # 2

Course Name:CSE-231 Lab (Universal Gates)

Experiment Number: Lab -#02
Name of experiment/s: Universal Gates
Date of Performance: 02/11/2020
Date of Submission: 08/11/2020

Section: 05

STUDENT NAME: MD JUBAYER HUSSAIN SCORE

STUDENT ID: 1921657042

REMARKS:
Department of Electrical and Computer Engineering, NSU CSE231L/EEE211L: Digital Logic Design Lab

Lab 3: Universal Gates

A. Objectives
We have to understand the concept of Universal Gates (NAND & NOR). We implement the basic logic gates
using universal gates. Than have to implement Boolean functions using universal gates. We have to
understand gate level minimization.

B. Apparatus
• Trainer Board
• IC 7400 Quadruple 2-input NAND gates
• IC 7402 Quadruple 2-input NOR gates

C. Theory
NAND GATE:
The NAND gate is a combination of an AND gate and NOT gate.
They are connected in cascade form. It is also called Negated
And gate. The NAND gate provides the false or low output only
when their outputs is high or true. The NAND gate is essential
because different types of a boolean function are implemented
by using it.
NOR GATE :
An OR gate followed by a NOT gate in a cascade is called a NOR
gate. In other words, the gate which provides a high output
signal only when there are low signals on the inputs such type
of gate is known as NOR gate.
AND GATE:
AND gate also has two or more input signals same as that of
the OR gate, and the output is single. The gate has a high output
only when all the input signals are high otherwise the output
signal is low.
OR GATE :
An OR gate has two or more than two inputs and one output
signal. It is called an OR gate because the output signal will be
high only if any or all input signals are high
Not GATE:
The NOT gate is a single input single output gate. This gate is
also known as Inverter because it performs the inversion of
the applied binary signal i.e., it converts 0 into 1 or 1 into 0.

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Department of Electrical and Computer Engineering, NSU CSE231L/EEE211L: Digital Logic Design Lab

Figure C1 shows the implementation of NOT, AND & OR gates using only NAND gates.

Figure C1: NAND as a universal gate

D. Procedure
1. Verify each of the NAND gate equivalent circuits in Figure C1 to perform the same operations of the
basic gates.
2. Design, construct and test the implementations of XOR and XNOR gates using NAND gates only. Show
the circuits in Figure F1 (Section F), clearly labeling the pin numbers.
3. Design, construct and test the implementations of NOT, AND, OR, XOR and XNOR gates using NOR
gates only. Show the circuits in Figure F2 (Section F), clearly labeling the pin numbers.

Figure D1: A combinational circuit

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Department of Electrical and Computer Engineering, NSU CSE231L/EEE211L: Digital Logic Design Lab

4. Complete the truth table for the circuit in Figure D1 in Table F1 (Section F).
5. Convert the circuit in Figure D1 to a NAND gate equivalent circuit, showing the steps involved and
clearly labeling the pin numbers in the final circuit design. Show your work in Figure F3 (Section F).
(i) Part 1 - Replace each of the gates with its NAND gate equivalent.
(ii) Part 2 - Identify any inversions that are compensated (i.e. one inverter followed by another) in
part 1 and redraw the final circuit in part 2.
6. Validate the operation of the universal gate circuit from the truth table.

E. Report:
1.Draw the IC diagram for the circuit in the figure F3
– step 2.
ANSwer:

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Department of Electrical and Computer Engineering, NSU CSE231L/EEE211L: Digital Logic Design Lab

2.Simulate the circuit in figure F3 – STEP 2 using

logisim. Provide a screenshot of the logisim circuit
schematic and truth table with your report.
Answer:

F. Experimental Data

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Department of Electrical and Computer Engineering, NSU CSE231L/EEE211L: Digital Logic Design Lab

Figure F1: Implementation of XOR and XNOR using NAND gates

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Department of Electrical and Computer Engineering, NSU CSE231L/EEE211L: Digital Logic Design Lab

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Department of Electrical and Computer Engineering, NSU CSE231L/EEE211L: Digital Logic Design Lab

Figure F2: Implementation of NOT, AND, OR, XOR and XNOR using NOR gates

ABC I1=AC I2=BC’ F=I1+I2

000 0 0 0
001 0 0 0
010 0 0 0
011 0 0 0
100 0 1 1
101 1 0 1
110 0 1 1
111 1 0 1

Table F1: Truth table of combinational circuit in Figure B2

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Department of Electrical and Computer Engineering, NSU CSE231L/EEE211L: Digital Logic Design Lab

Discussion:
How universal gates work, we learned it from
the lab. A universal gate can implement any
Boolean function without using any other
gates. At first, we were facing some problems in
universal gates because we were not very
familiar with it before. So, it was a little bit
confusing for us in the class. Our respectable
lab instructor taught us about all the problems
well. Beside that we learned that how can we
easily convert all the gate using NAND and NOR
gate. We implement the basic logic gates using
universal gates, implement the Boolean function
using universal gates and understood the gate
level minimization. Now we don’t feel it very hard
in the universal gates chapter.

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