Main Memory Organization: Stored Program

(IAS computer)
The present day digital computers are based on stored-program
concept introduced by Von Neumann. In this stored-program
concept, programs and data are stored in separate storage unit
called memories. Central Processing Unit, the main component of
computer can work with the information stored in storage unit
only. In 1946, Von Neumann and his colleagues began the design
of a stored-program computer at the Institute for Advanced
Studies in Princeton. This computer is referred as the IAS
computer.

The IAS computer is having three basic units:

1. The Central Processing Unit (CPU).
2. The Main Memory Unit.
3. The Input/Output Device.

Central Processing Unit:

This is the main unit of computer, which is responsible to perform
all the operations. The CPU of the IAS computer consists of a
data processing unit and a program control unit.

The data processing unit contains a high speed registers intended

for temporary storage of instructions, memory addresses and
data. The main action specified by instructions are performed by
the arithmatic-logic circuits of the data processing unit.

The control circuits in the program control unit are responsible for
fetching instructions, decoding opcodes,controlling the information
movements correctly through the system, and providing proper
control signals for all CPU actions.
The Main Memory Unit:
It is used for storing programs and data. The memory locations of
memory unit is uniquely specified by the memory address of the
location. M(X) is used to indicate the location of the memory unit
M with address X.

The data transfer between memory unit and CPU takes place with
the help of data register DR. When CPU wants to read some
information from memory unit, the information first brings to DR,
and after that it goes to appropriate position. Similarly, data to be
stored to memory must put into DR first, and then it is stored to
appropriate location in the memory unit.

The address of the memory location that is used during memory

read and memory write operations are stored in the memory
register AR.
The information fetched from the memory is a operand of an
instruction, then it is moved from DR to data processing unit
(either to AC or MQ). If it is an instruction, then it is moved to
program control unit (either to IR or IBR).

Two additional registers for the temporary storage of operands

and results are included in data processing units: the accumulator
AC and the multiplier-quotient register MQ.

Two instructions are fetch simultaneously from M and transferred

to the program control unit. The instruction that is not to be
executed immediately is placed in the instruction buffer register
IBR. The opcode of the other instruction is placed in the
instruction register IR where it is decoded.
In the decoding phase, the control circuits generate the required
control signals to perform the specified operation in the
instruction.

The program counter PC is used to store the address of the next

instruction to be fetched from memory.
Input Output Device:

Input devices are used to put the information into computer. With
the help of input devices we can store information in memory so
that CPU can use it. Program or data is read into main memory
from input device or secondary storage under the control of CPU
input instruction.

Output devices are used to output the information from computer.

If some results are evaluated by computer and it is stored in
computer, then with the help of output devices, we can present it
to the user. Output data from the main memory go to output
device under the control of CPU output instruction.

How the fetch, Execute Cycle works in the Von-Neumann

Architecture: ---------------
Computer Buses and Types:-

• It is a set of parallel lines used to connect two or more devices of

a digital computer.
• It is the most important component of computer architecture. A
computer has more than one bus interconnection
• All the components of computer are connected with a set of
parallel lines. All these lines are used to transferred data in the
form of bits from one component to another component .These
lines are called Bus:
• These are two types of buses
a. System Bus
b. Expansion Bus.
System Bus:
• System bus is used to connect main components of the computer
(I/O unit, Memory,CPU)
• Generally there are 70-100 parallel lines in system bus.
• It is divided into three main categories:
a. Control bus
b. Address Bus
c. Data bus
Control Bus:

• These lines are used to transfer control signal from one

component to another.
• It specifies the type of operation that is to be performed. It is al so
transmits the control signal like ACKS(Acknowledge signals)
• When a CPU gives command to be the memory for writing data,
then the memory send an ACKs signals to the CPU after successful
writing of data.

Command/control Signals Meaning

Memory write it is used to write data to a
given memory location
Memory read it is used to read data to a
given memory location
I/O write it is used to write data on I/O
device
I/O read it is used to read data from I/O
device
Bus request it is used to request a control
on the bus so the requesting
 device can use it to transmit
Data.
Bus grant it is used by the BUS control to
indicate the grant of the bus to
a device

Address bus:
• It is the part of the System Bus. It is used to carry address signals
to read and write data in the memory.
• Address bus is unidirectional.
• An address is a unique ID of each component connected to the
System bus. It is called address of the component.
 • When a component of a computer wants to communicate with
another, it uses a few system bus lines to specify the address of
the destination: these lines are called address bus.

Address Bus
CPU Memory

Data Bus:

• Data bus is used to transfer the data from one component to

another.
• These are 32 bit or 64 parallel lines of data bus.
• The amount of data a bus can transmit is call bus width. A 64 lines
data bus can transmit 64 bits at time.
• Width of data bus has direct impact on the performance of the
computer.
• Data bus is bidirectional.
• The major components are connected to the system bus and
remaining components are connected to expansion bus and
expansion bus is connected to the system bus.
• If all the components are attached with system bus then it
will slow the computer
Ex: modem attached to computer.
• All the components will have to wait longer to get access to
the bus. We use the expansion bus to solve this problem.

Properties of Bus:
• Bus width: The amount of information that can be stored.
: The wider the bus , the more information that
can be stored.
 : No. of bits can be sent at once.
• Bus speed :The speed of a bus to transfer bits/bytes in a unit
(The rate at which bus can transmit data) and it is calculated
in HZ)
• Bus bandwidth: Amount of data can be carried from one
point to another in a given time.
Bandwidth=Bus width x bus speed.

Major buses and their features:

▪ Types of Expansion Slots:

o 8-bit ISA :
▪ ISA = Industry Standard Architecture
▪ Data width = 8 bits
▪ Speed = 7 MHz
▪ Throughput = 1 MB / sec

8-bit ISA slots

o 16-bit ISA:
▪ Data width = 16 bits
▪ Speed = 7 MHz
▪ Throughput = 8 MB/sec
 ▪ The original 8-bit and 16-bit ISA cards had to be
manually configured.

o ISA met its demise when it could no longer take

advantage of the faster Pentium processors

16-bit ISA slots

o MCA :
▪ MCA = Micro Channel Architecture
▪ Data width = 32 bits
▪ Speed = 12 MHz
▪ Throughput = 40 MB/sec
▪ Device automatically configured itself.

o EISA :
▪ EISA = Extended Industry Standard Architecture
▪ Data width = 32 bits
▪ Speed = 8.33 MHz
▪ Throughput = 32 MB/sec
 ▪ Device automatically configured itself
▪ Maintained backwards compatibility with 8-bit and
16-bit ISA bus
o PCI
▪ PCI = Peripheral Component Interconnect
▪ Data width = 32 bits
▪ Speed = 33 MHz
▪ Throughput = 264 MB/sec
▪ The PCI bus is actually mezzanine bus. A
mezzanine bus is an expansion bus that does not
have to be the only expansion bus on the
motherboard. In other words, it is coordinated to
work with other buses on the motherboard.
• Data traffic on the ISA bus is passed to the
PCI bus and “stepped up” to run at the speed
of the PCI bus.
▪ The PCI bus connects to the Northbridge chip
through the PCI expansion bus.
▪ PCI cannot handle the greater video requirements
of today’s graphically intense games.
 PCI slots

o AGP
▪ AGP = Accelerated Graphics Port
▪ Data width = 32 bits
▪ Speed = 66 MHz and above
▪ Throughput = 528 MB/sec
▪ Designed to provide fast access to video
▪ Directly connected to the motherboard.

AGP Slot

o USB (pp. 138-140):

▪ USB = Universal Serial Bus
 ▪ Data width = 1 bit
▪ Speed = 3 MHz
▪ Throughput:
• USB 1.1 = 12 MB/sec
• USB 2.0 = 60 MB/sec
▪ USB is hot swappable. Hot swappable means that
devices can be added and removed easily while
the computer is still running without having to
reboot.
▪ USB devices may be daisy chained. 127 devices
can be connected through a single USB port.
(USB can daisy chain (In electrical and electronic
engineering a daisy chain is a wiring scheme in
which multiple devices are wired together in
sequence or in a ring.) up to 127 devices)
• This is done by plugging a multi-port USB hub into a
USB port on the back of the computer. Then plug other
USB devices into the hub.

USB Ports