B.N.

M Institute of Technology
Department of Electronics & Communication Engineering

Course name: Microcontroller and Embedded Systems

Course Code: 22AML135
Question and Answer Bank for Module 3

1. Write the Instruction format & S,N,W suffixes used in ARM CortexM3
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2. Explain the addition and subtraction instructions of ARM CortexM3
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3. Explain all the types of multiplication instructions of ARM CortexM3
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4. Explain the all the types of division instructions of ARM CortexM3
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5. Explain the all the types of Logical instructions of ARM CortexM3
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6. Explain the all the types of Shift & Rotate instructions of ARM CortexM3
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7. Explain the all the types of Reverse instructions of ARM CortexM3 with
examples.
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9. Show the result of the following instructions assuming R0=0X12345678,
R1=0X9ABCDEF0
a) ASR R0, R1, #9 b) BIC R0,R1,#0XAB c) RSB R2,R1,R0
d) REVSH R1,R0 e) SXTB R1,R0 f) RBIT
Ans: a) ASR stands for Arithmetic Shift Right. Shifting of content in the intended
register takes place as shown below.
The instruction ASR R0, R1, #9 right shifts the operand in R1 nine times and then
stores the result into R0. R0 = FFCD5E6F after the execution of the above
instruction.

Shift Shifted data

No.

0 10011010101111001101111011110000

1 11001101010111100110111101111000

2 11100110101011110011011110111100

3 11110011010101111001101111011110

4 11111001101010111100110111101111

5 11111100110101011110011011110111

6 11111110011010101111001101111011

7 11111111001101010111100110111101

8 11111111100110101011110011011110

9 11111111110011010101111001101111

Hence R0 = FFCD5E6F (Hex eq.)

b) BIC stands for Bit clear. This instruction logically ANDs one value with the logic
inversion of another value. The instruction BIC R0, R1, #0XAB logically ANDs
content in R1 with logically inverted values of 0XAB and stores the result in R0.
Hence R0 = 0X12345650.
Steps: i. ~( 0XAB) = 0X54
ii. R1 & result of step i. = 0X50
iii. R0 = 0X12345650
c) Function of RSB instruction is reverse subtract. The instruction RSB R2, R1, R0
performs R2 = R0 – R1. Hence R2 = 0X77777788 (subtraction done by
converting hex number to binary and then using 2’s complement method).
Step i. R1 = 0X9ABCDEF0
ii. ~R1 = 0X6543210F
iii. ~R1 + 1 = 0X6543210
iv. R0 + (~R1+1) = 0X77777788

d) REVSH instruction reverses the byte order in the lower 16-bit half word of a 32-
bit register and sign extends the result to 32 bits ( Refer figure below).

After executing REVSH R1, R0 instruction R1 = 0x00007856.

e) SXTB is acronym for Signed extend byte. This instruction sign extends the
byte data to word. i.e., SXTB R1, R0 results in R1 = signext(R0[7:0]).
Hence R1 = 0X00000078.

f) The RBIT instruction reverses the bit order in a data word. The syntax is as
follows: RBIT.W <Rd>, <Rn>
This instruction is very useful for processing serial bit streams in data communications. For
example, if R0 is 0xB4E10C23 (binary value 1011_0100_1110_0001_0000_1100_0010_0011),
executing: RBIT.W R0, R1; R0 will become 0xC430872D (binary value
1100_0100_0011_0000_1000_0111_0010_1101).
19. Explain all Load instructions with examples
Ans: The basic instructions for accessing memory are Load and Store. Load (LDR)
transfers data from memory to registers, and Store transfers data from registers to
memory. The transfers can be in different data sizes (byte, half word, word, and
double word). ARM processors support memory accesses with offset, pre indexing
and post indexing addressing.
20. Explain all Store instructions with examples
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