Debre Markos University

DMiT
School of Electrical & Computer Engineering

Computer Organization & Architecture

Chapter Three(Lecture 1)
Memory Basics

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Computer Memory Overview
• The memory is that part of computer where programs and
data are stored.
• The basical concept is the following:
– Bits
• The basic unit of memory is the binary digit called a bit. A
bit may contain a 0 or 1. It is the simplest possible unit
– Memory addresses
• Memories consist of a number of cells or locations each of
which can store a piece of information. Each location has a
number called its address, by which program can refer to it.
The cells is the smallest addressable
• Byte: 8-bits
• Bytes are grouped into words. The significance of word is
that most instruction operate on entire word. A computer
with a 32bit/word has 4 bytes/word

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Characteristics of Memory Systems
• Classifying and studying memory systems using their key
characteristics
• Location
• Capacity
• Unit of transfer
• Access method
• Performance
• Physical type
• Physical characteristics

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Characteristics of Memory Systems…Cntd
• Location
• Refers to whether memory is internal or external to computer
system
• Internal memory

• directly accessible by the processor

• Types of internal memory

• Main memory – often equated with internal memory

• Cache

• CPU registers

• External memory

• Accessible via the I/O module/controller

• Also called secondary memory

• Disks and tapes

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 Characteristics of Memory Systems…Cntd
• Capacity
• the amount of information that can be contained in a memory unit

• For internal memory

• expressed in terms of bytes or words

• For external memory

• expressed in terms of bytes

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Characteristics of Memory Systems…Cntd
• Unit of Transfer
• For internal memory
• Usually governed by data bus width
• May be equal to a word
• For external memory
• Data transferred in much larger units than a word
• Usually a block which is much larger than a word

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Characteristics of Memory Systems…Cntd
• Access Methods
• Sequential Access

• The computer system reads or writes information to the

file sequentially, starting from the beginning of the file
and proceeding step by step.
• e.g. Tape drive units
• Direct Access
• Individual blocks have unique address
• allows the access of any element directly by locating it by
its index number or address.
• In direct access, data is read immediately without iterating
from the beginning
• e.g. Disk drive units

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Characteristics of Memory Systems…Cntd
• Random Access
• The computer system can read or write information anywhere
in the data file.
• e.g. RAM
• Associative Access
• A method of addressing a location by virtue of its data content
rather than by its physical location.
• An access is made by specifying something about the contents
of the desired location rather than by using a normal address.
• e.g. Some cache memory units

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Characteristics of Memory Systems…Cntd
 Performance
• Access time (latency)
• It is the time it takes to perform a read or write operation
• Memory Cycle time
• Cycle time is the time, usually measured in nanoseconds, between
the start of one random access memory access to the time when the
next access can be started.
• applicable to RAM

• Transfer rate
• The rate at which data can be transferred into or out of a memory unit

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Characteristics of Memory Systems…Cntd
• Physical Types
• Semiconductor
• RAM
• Magnetic
• Disk & Tape
• Optical
• CD & DVD

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 Characteristics of Memory Systems…Cntd
 Physical Characteristics
◦ Volatility
 Volatile memory
 Information is lost when electrical power is switched off
 E.g RAM
 Non Volatile memory
 Information once recorded remains without deterioration
 Electrical power not needed to retain information
 E.g magnetic storage unit
 Non erasable memory
 cannot be altered
 ROM

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 Types of Memory
• Main Memory (“Internal” memory components)
• RAM (read-write memory): Static RAM, Dynamic RAM
• ROM (Read Only Memories) : ROMs, PROMs, EPROMs,
EEPROMs, Flash Memory.
• Cache memory
• The cache memories are high-speed buffers for holding
recently accessed data and neighbouring data in main memory.
• External Memory
• Magnetic disks
• Optical disks
• Magnetic tape

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 Memory Hierarchy
• Basic elements in memory hierarchy
• Registers
• In CPU
• Internal or Main memory
• May include one or more levels of cache
• “RAM”
• External memory
• Backing store

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 Memory Hierarchy…Cntd
 Design constraint on computer’s memory system
◦ How much ?
 capacity
◦ How fast ?
 To achieve performance, memory must keep up with processor
◦ How expensive ?
 Cost must be reasonable in relationship to other components

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Memory Hierarchy…Cntd
• Trade off among three key characteristics of memory: Capacity ,
Access time and Cost
• faster access time --- greater cost per bit
• greater capacity --- smaller cost per bit
• greater capacity --- slower access time
• Solution:
• Not to rely on a single memory component or tech
• Employ memory hierarchy

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Memory Hierarchy - Diagram

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Hierarchy List
• Registers
• L1 Cache
• L2 Cache
• Main memory
• Disk
• Optical
• Tape

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Semiconductor Memory
• RAM
• Misnamed as all semiconductor memory is random access
• What should be its name?
• Possible to Read/Write
• Volatile
• Can be used only as a temporary storage
• Two types of technologies can be used to built RAM:
• Dynamic RAM (DRAM)
• Static RAM (SRAM)

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Semiconductor Memory…Cntd
• Dynamic RAM (DRAM)
• Bits stored as charge in capacitors
• Charges leak
• Need refreshing even when powered
• Less expensive
• Slower
• Used for main memory

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Semiconductor Memory…Cntd
• Static RAM
• Bits stored using flip flops, on/off switches
• No charges to leak
• No refreshing needed when powered
• More expensive
• Faster
• Used for cache memory

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Semiconductor Memory…Cntd
• SRAM v DRAM
• Both volatile
• Power needed to preserve data
• Dynamic
• Less expensive
• Needs refresh
• Main memory
• Static
• Faster
• Cache

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Semiconductor Memory…Cntd
• Types of ROM (PROM, EPROM, EEPROM and Flash memory)
• Read Only Memory (ROM)
• contains a permanent pattern of data that cannot be changed
• Nonvolatile
• Read but cannot write
• Used for
• Microprogramming , Library subroutines – for frequently used
functions, system programs (BIOS)
• Written during fabrication

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Semiconductor Memory…Cntd
• Programmable ROM (PROM)
• Programmed only once
• Once the PROM is programmed, the information written is permanent
and cannot be erased or deleted
• Read “mostly” memory
• Erasable Programmable (EPROM)
• The data can be erased and reprogrammed by using ultraviolet (UV)
light.
• The UV light clears the data on the chip so that it can reprogram.
• Electrically Erasable (EEPROM)
• Cells don’t need to be erased before programming
• It can be programmed and erased electrically using electron emission
• Flash memory
• It can be electrically erased and reprogrammed.
• It was developed from EEPROM (electronically erasable
programmable read-only memory).
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 Summery of Semiconductor Memory

• The most common memory is referred to as RAM

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Types of External Memory
• Magnetic tape
• Magnetic disc
• Optical
• CD-ROM
• CD-Recordable (CD-R)
• CD-R/W
• DVD
• DVD-R/W

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 Magnetic Tape
• Serial access
• Slow
• Very cheap
• Backup

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 Magnetic Disk
• A magnetic disk is a storage device that uses a magnetization process to
write, rewrite and access data.
• Are widely used to store computer data as well as audio and video
signals.
• Hard disks and floppy disks are common examples of magnetic disks.

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 Optical Storage
• CD-ROM
– can store up to 700 MB of data.
– the data cannot be altered or overwritten.
– It is typically used to store software programs.
– CDs can store audio and video data, as well as text and program
instructions.

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 Optical Storage…Cntd
• CD-Recordable (CD-R)
•It can only record data once, then the data becomes permanent on
the disc.
•Custom made music CDs
• CD-RW
• can be written, read, erased, and re-written
• Digital Video Disk (DVD-ROM,DVD-R and DVD-RW)
• Rapidly replacing CD
• Has higher capacity

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Cache Memory
• Small amount of fast memory

• Sits between normal main memory and CPU

• May be located on CPU chip or module

• Uses Static RAM (SRAM)

• Expensive than DRAM

• Resides inside or outside CPU

• L1,L2 and L3 caches are available

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Cache and Main Memory

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Cache operation
• CPU requests contents of memory location

• Check cache for this data

• If present, get from cache (fast)

• If not present, read required block from main memory to cache

• Then deliver from cache to CPU

• Cache includes tags to identify which block of main memory is in each

cache slot

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Cache Read Operation - Flowchart

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Typical Cache Organization

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Cache/Main Memory Structure

M = 2n / K blocks in RAM
C << M blocks in cache

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 Mapping Functions
• The transformation of data from main memory to cache memory is
referred to as mapping process

• A mapping function is the method used to locate a memory address

within a cache

• It is used when copying a block from main memory to the cache and

Also it is used again when trying to retrieve data from the cache

• There are three kinds of mapping functions

– Direct

– Associative

– Set Associative
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Direct Mapping
• Each block of main memory maps to only one cache line
• So, simple and inexpensive
• Line number is calculated using the following function

i = j modulo m

where

i = cache line number

j = main memory block number

m = number of lines in the cache

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 Direct Mapping…Cntd
• For example, on the right
is a 16-byte main memory
and a 4-byte cache (four
1-byte blocks).
– Memory locations 0, 4, 8
and 12 all map to cache
block 0.
– Addresses 1, 5, 9 and 13
map to cache block 1, etc.
– How can we compute this mapping?

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 Direct Mapping Cache Line Table

Cache line Main Memory blocks held

0 0, m, 2m, 3m, … ,2s-m

1 1,m+1, 2m+1, …, 2s-m+1

M-1 m-1, 2m-1,3m-1, …, 2s-1

Note: m = 2r = 214 is the number of lines in cache

s = 22 is the block identifier
2s = 222 blocks in RAM

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Direct Mapping Address Structure

 Each main memory address can by divided into three fields

• Least Significant w bits identify unique word within a block

• Remaining bits (s) specify which block in memory. These are

divided into two fields
– Least significant r bits of these s bits identifies which line in the cache

– Most significant s-r bits uniquely identifies the block within a line of
the cache

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Direct Mapping…Cntd
• Address length = (s + w) bits

• Number of addressable units = 2s+w words or bytes

• Block size = line width = 2w words or bytes

• Number of blocks in main memory = 2s+ w/2w = 2s

• Number of lines in cache=cache size/block size = m = 2r

• Size of tag = (s – r) bits

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Direct Mapping Address Structure

• Example 1
• Cache of 64kByte

• Cache block of 4 bytes

– i.e. cache is 16k (214) lines of 4 bytes

• 16MBytes main memory

• 24 bit address

– (224=16M)

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Direct Mapping Address Structure…Cntd
Tag s-r Line or slot r Word w
8 14 2
• 24 bit address

• 2 bit word identifier (4 byte block)

• 22 bit block identifier

• 8 bit tag (=22–14)

• 14 bit slot or line

• No two blocks in the same line have the same tag
• Check contents of cache by finding line and comparing tag

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Direct Mapping Address Structure…Cntd
• Example 2
• Show cache addressing for a byte-addressable memory with 32-bit
addresses. Cache line W = 16 B. Cache size L = 4096 lines (64 KB).
Solution
Byte offset in line is log216 = 4 b. Cache line index is log24096 = 12 b.
This leaves 32 – 12 – 4 = 16 b for the tag.

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Associative Mapping
• Main memory block can be placed into any cache position

• Memory address is interpreted as:

– Least significant w bits = word position within block

– Most significant s bits = tag used to identify which block is

stored in a particular line of cache

• Every line's tag must be examined for a match

• Cache searching gets expensive and slower

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Associative Mapping…Cntd
• Address length = (s + w) bits

• Number of addressable units = 2s+w words or bytes

• Block size = line size = 2w words or bytes

• Number of blocks in main memory = 2s+ w/2w = 2s

• Number of lines in cache = undetermined

• Size of tag = s bits

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Associative Mapping Address Structure

• Example 1
• Cache of 64kByte

• Cache block of 4 bytes

– i.e. cache is 16k (214) lines of 4 bytes

• 16MBytes main memory

• 24 bit address Tag – s bits Word – w bits

(22 ) (2 )
– (224=16M)

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Set Associative Mapping
• Combination of direct and associative mapping
• Cache is divided into a number of sets
• Each set contains a number of lines
• A block maps to any line in a given set
– e.g. Block B can be in any line of set i
• k lines in a cache is called a k-way set associative mapping
• E.g. 2 lines per set
– Called 2-way set associative mapping
– A given block can be in one of 2 lines in a particular set

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Set Associative Mapping…Cntd
• Address length is s + w bits

• Cache is divided into a number of sets, v = 2d

• Number of lines in a cache = v•k = k•2d

– k = 1, this is basically direct mapping

– v = 1, this is associative mapping

• Size of tag = (s-d) bits

• Block j maps to set i = j mod v

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Set Associative Mapping Address Structure
• Example 1
• Cache of 64kByte

• Cache block of 4 bytes

– i.e. cache is 16k (214) lines of 4 bytes

• 16MBytes main memory

• 24 bit address Tag Set Word

– (224=16M) 9 bits 13 bits 2 bits

• it is 2-way set associative

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Set Associative Mapping Address Structure…Cntd
• Example 2
• Show cache addressing scheme for a byte-addressable memory with
32-bit addresses. Cache line width = 16 B. Set size(k) = 2 lines.
Cache size = 4096 lines (64 KB).
Solution
Byte offset in line is log216 = 4 b. Cache set index is (log24096/2) = 11 b.
This leaves 32 – 11 – 4 = 17 b for the tag.
11-bit set index in cache
17-bit line tag 4-bit byte offset in line
32-bit
address

Address in cache used to

read out two candidate
items and their control info

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Set Associative Mapping Address Structure…Cntd
• Example 3
• A 64 KB four-way set-associative cache is byte-addressable and
contains 32 B lines. Memory addresses are 32 b wide. Illustrate the set
Associative mapping address Structure
Solution
Address (32 b) = 5 b byte offset + 9 b set index + 18 b tag
tag set index byte offset
18 bits 9 bits 5 bits

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Exercise
1. For each of the following addresses, answer the following
questions based on a 2-way set associative cache with 4K lines,
each line containing 16 words, with the main memory of size 256
Meg memory space (28-bit address):
– What cache set number will the block be stored to?
– What will their tag be?
– What will the minimum address and the maximum address of
each block they are in be?
2. A set-associative cache consists of 64 lines, or slots,
divided into four-line sets. Main memory contains 4K blocks of
128 words each. Show the format of main memory addresses.
3. A two-way set-associative cache has lines of 16 bytes and a total
size of 8 kbytes. The 64-Mbyte main memory is byte addressable.
Show the format of main memory addresses.

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Exercise…Cntd

4. Assume we have a computer with 16 bit addresses and 64 Kb of

memory, cache blocks are 16 bytes long and we have 128 bytes
available for cache data .Then fill the Following Table

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