Department of Computer and Communication Systems Engineering

Faculty of Engineering
Universiti Putra Malaysia
43400 UPM Serdang
Selangor

Course : ECC3162 COMPUTER AND COMMUNICATION

SYSTEMS PRACTICAL II
Credit Hours : 1 (0+1)
Semester : 2 - 2022/2023
Lecturer : Pn. Roslizah binti Ali
Demonstrator : Aishah binti Abd Rahman
Wan Muhammad Haikal bin Sobri
Laboratory : Intelligent Systems Engineering Lab
Duration : 3 Hours (online)

LAB 3 : MODELSIM-INTEL SIMULATOR

USING GRAPHICAL WAVEFORM EDITOR

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Objectives:

1. To simulate Verilog code using Graphical Waveform Editor in the

ModelSim-Intel FPGA simulator.
2. To perform simulation on a simple majority circuit, a 2 to 1 multiplexer and
a loadable down counter.
List of Equipment / Components:

NO. EQUIPMENT QTY

Computer - ModelSim-Intel FPGA

1 1
Starter Edition software
2 Terasic DE1-SoC Board 1

Introduction:

ModelSim is a multi-language environment developed by Mentor Graphics which

is used for simulation of hardware description languages such
as VHDL, Verilog and SystemC. ModelSim can be used independently, or in
conjunction with Intel Quartus Prime software. Simulation can be performed using
the graphical user interface (GUI), a testbench or automatically using script files.

In this lab, ModelSim-Intel FPGA software will be used to simulate Verilog designs
using the Graphical Waveform Editor. Students are required to implement
simulations and verify the design of a simple majority circuit, a 2 to 1 multiplexer
and a loadable down counter.

Procedures:

1) A guide for using the ModelSim-Intel FPGA Simulator is given in the file
ModelSim_Waveforms_Verilog.pdf on PutraBLAST. Go through the
document in detail and implement all the procedures. Record your simulation
results.

Discussion:

1) Discuss the importance of using simulation in FPGA design.

2) Name the simulation software that is provided in Quartus Prime.