Ga NFast Chargers

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FINAL YEAR PROJECT SAT - GaN Fast Chargers
Preprint · July 2023

DOI: 10.13140/RG.2.2.31722.90561
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SCHOOL OF ADVANCED TECHNOLOGY
SAT301 FINAL YEAR PROJECT
Gallium Nitride (GaN) Fast charger
Final Thesis
In Partial Fulfillment
of the Requirements for the Degree of
Bachelor of Engineering
Student Name : CHRISTOPHER GASPAR MSIGWA

Student ID : 1931154
Supervisor : Dr Ping Zhang
Assessor :
SAT301 Final Thesis Christopher Msigwa - May,2023
Abstract
Future Si-based power devices could be able to function at elevated switching
rates, temperatures and voltages thanks to the improved material properties of wide
bandgap semiconductors. A novel kind of power electronics is at present in development
due to the limitations of existing Si power devices in power converter systems. The
implementation of these new power semiconductor devices will enable the development
of new power converters as well as an important advancement in the functioning of
existing ones, leading to an improvement in the efficiency of the electric energy
conversions and a more effective utilization of electricity. SiC and GaN have become
among the most promising semiconductor materials for these new electrical devices
because of their excellent features, commercial accessibility of the starting material, and
development of their technical processes.
Due of its larger bandgap than silicon, gallium nitride can withstand greater voltages and
temperatures. For the user, the size of a GaN charger is its main benefit. Consumer
devices that are powered by digital technology are multiplying, growing in size, and
consuming more power. They demand quick charging due to their strong batteries. Fast
chargers made of GaN are generally 50% smaller than chargers made of Silicon.
Therefore, they will be less intrusive and more readily fit inside your bag. The goal of
this project is to create and use a GaN fast charger.
In this project, an effective fast charger with a high input DC/DC converter and a broad
range of input voltage from 4V to 100V was simulated using the LTspice software. In
order to enable the charger to charge various consumer electronics without endangering
the security of smaller devices, the converter's output was combined with power supply.
Keywords: Power Delivery (PD); Gallium Nitride (GaN); Wide band gap
Semiconductor; Converters; Switching frequency; LTspice
ii
Acknowledgements
As I reflect upon the incredible journey of completing this final year project, I am filled
with immense gratitude and warmth towards everyone who has contributed to its success.
Words cannot express the depth of my appreciation, but I would like to take this
opportunity to extend my heartfelt thanks to all those who have been instrumental in
making this project a reality.
First and foremost, I would like to express my deepest gratitude to my supervisor, Dr.
Ping Zhang, whose unwavering support, guidance, and mentorship have been invaluable.
Your expertise, insights, and encouragement have inspired me to strive for excellence and
have been the driving force behind the successful completion of this project.
I am also extremely grateful to my fellow students and friends, who have provided a
constant source of motivation, camaraderie, and laughter throughout this journey. Your
friendship and support have made the challenges of this final year project more bearable
and the triumphs even sweeter.
To my parents, Mr. and Mrs. Gaspar Msigwa, thank you for your unconditional love,
support, and belief in me. Your unwavering confidence and support in my abilities has
been the foundation upon which I have built my success. I am truly blessed to have you
by my side, and I dedicate this project to you all.
I would also like to extend my appreciation to the faculty and staff of XJTLU, whose
dedication to education and commitment to fostering a nurturing environment have
played a pivotal role in my personal and academic growth. Special thanks go to Dr
Pengfei Song, Miss Shuangxin Zhang and Miss Jane for their support and guidance
throughout this project.
iii
Lastly, I would like to acknowledge the countless authors, researchers, and experts whose
work has informed and shaped my understanding of the subject matter. Your
contributions to knowledge have served as a beacon of inspiration and a testament to the
power of human curiosity.
In conclusion, I stand humbled and grateful for the opportunity to have embarked on this
beautiful journey. This final year project has been an invaluable learning experience, and
I will cherish the memories and lessons it has provided for years to come. To everyone
who has played a part in this milestone, thank you from the bottom of my heart.
iv
Contents
Abstract ............................................................................................................................... ii
Acknowledgements ............................................................................................................ iii
Contents ...............................................................................................................................v
List of Tables .................................................................................................................... vii
List of Figures .................................................................................................................. viii
List of Acronyms .................................................................................................................x
Chapter 1 Introduction ..................................................................................................1
1.1 Motivation, Aims and Objective ................................................................................1
1.1.1 Problem Description: .................................................................................... 1
Increase of digital electronics usage: ......................................................................... 1
Fast Charging technology: ......................................................................................... 3
Legacy of Silicon:...................................................................................................... 4
Gallium Nitride:......................................................................................................... 5
Power Delivery: ......................................................................................................... 7
USB-C: ...................................................................................................................... 8
1.1.2 Aims and objective ..................................................................................... 10
1.2 Literature Review .....................................................................................................11
1.3 Industrial Relevance; ................................................................................................13
Chapter 2 Methodology and Results ..........................................................................15
2.1 Methodology.............................................................................................................15
Data Flows and Power roles in USB C and USB Power Delivery; ........................ 15
Upstream-Facing Port USB 2.0 without USB PD: .................................................. 17
Downstream-Facing Port USB Type-C: USB 2.0 without USB PD:...................... 19
USB Type-C Dual-Role data Port USB 2.0 without USB PD: ............................... 20
USB Type-C DRP/DRD: USB 2.0 with USB PD: .................................................. 22
USB 3.1 Gen 1 (SuperSpeed) and Gen 2 (SuperSpeed+): ...................................... 24
2.1.1 LTspice Simulation: .................................................................................... 26
LTC7891 chip .......................................................................................................... 29
Selection and calculation of external components in the simulation: ..................... 32
2.2 Results ......................................................................................................................35
2.2.1 The circuit board: ........................................................................................ 35
IP6538...................................................................................................................... 36
CSD18540 ............................................................................................................... 37
2.2.2 Commercial purchased chargers ................................................................. 39
UGREEN GaN 140W PD3.1 Charger..................................................................... 39
UGREEN 65 W GaN fast Charger .......................................................................... 40
UGREEN 65W Cube 7-in-1 GaN Charging Station ............................................... 42
UGREEN GaN 200W Desktop Charger ................................................................. 43
2.2.3 Results from simulation .............................................................................. 46
Results from first simulation with LTC3864: ......................................................... 46
Results from second simulation with LTC7891: ..................................................... 48
v
2.3 Results Discussion ....................................................................................................51

2.3.1 Efficiency comparison; ............................................................................... 51
Chapter 3 Conclusion and Future Work ...................................................................54
3.1 Conclusion ................................................................................................................54
3.2 Future Work..............................................................................................................55
Chapter 4 References ...................................................................................................56
vi
List of Tables
Table 1: List of acronyms ....................................................................................................x
Table 2: amount of signal from PD controller and the output voltage expected ...............29
Table 3: input and output power and efficiencies of the LTC3864 ...................................47
Table 4: input and output power and efficiencies of the LTC3864 at input voltage
of 24V ........................................................................................................48
of 32V ........................................................................................................49
of 48V ........................................................................................................49
of 60V ........................................................................................................50
of 80V ........................................................................................................50
of 100V ......................................................................................................50
Table 10: Efficiencies of the simulation of chip LTC7891 ...............................................51
vii
List of Figures
Figure 1: Battery capacity in mAhr and the Smartphone screen size in cm2 vs years
2006-2020 ....................................................................................................2
Figure 2: the year of founding of the USB specifications and their capabilities .................3
Figure 3: Different material properties of various semiconductors .....................................6
Figure 4: various combinations of Voltage and current that come with different
USB specifications .......................................................................................8
Figure 5: USB-C pin arrangement .......................................................................................9
Figure 6:Block diagram of UFP type-C USB 2.0 without PD...........................................17
Figure 7: Termination of the CC logic pullup and pull down [11] ....................................18
Figure 8: block diagram of DFP USB type-C USB 2.0 without PD..................................19
Figure 9: Block diagram of USB type-C DRD USB 2.0 ...................................................21
Figure 10: USB PD profiles showing the power rails and maximum current [10] ...........22
Figure 11: block diagram for USB Type-C DRP/DRD: USB 2.0 with USB PD ..............23
Figure 12: Block diagram of USB 3.1 ...............................................................................25
Figure 13: general block diagram of the USB-C adapter ..................................................26
Figure 14: Expanded block diagram of the USB-C adapter ..............................................26
Figure 15: Further expanded block diagram revealing the main components ...................27
Figure 16: block diagram with direction of movement of signals and power ...................28
Figure 17: Circuit design simulated in LTspice .................................................................29
Figure 18: Typical application circuit of the LTC7891 .....................................................31
Figure 19: The POV of the circuit board purchased ..........................................................36
Figure 20: IP6538 Series product information...................................................................37
viii
Figure 21:Charging curve of the Macbook pro 16” ...........................................................45
Figure 22:LTspice simulation with LTC3864 ...................................................................47
Figure 23: The simulation with LTC7891 .........................................................................48
ix
List of Acronyms
Table 1: List of acronyms
Term Initial components of the term (examples are below)

FEC Forward Error Correction
FET Field Effect Transistor
USB Universal Serial Bus
USB IF USB implementors Forum
PHY Physical Layer
DFP Downstream Facing Port
DRD Dual Role Device
GaN Gallium Nitride
SiC Silicon Carbide
x
Chapter 1
Introduction
1.1 Motivation, Aims and Objective
1.1.1 Problem Description:
Increase of digital electronics usage:
The 1990s witnessed a great revolution in consumer digital electronics. There was a
significant increase in devices like computers and smartphones including the IBM Simon
and general magic in 1994 [1]. Although they were not as successful, they laid a strong
foundation to the founding of the first iPhone in 2007. The digital consumer electronics
market in the 1990s was greatly fuelled by the rapid development of digital technology in
terms of software and hardware. It was also fuelled by the availability of affordable and
powerful microprocessors an example being the Pentium pro which was the first intel
chip with L2 cache [2].
Since then, there has been an exponential increase in the amount of consumer digital
electronics being used worldwide. According to the World’s Largest Market Research
Store (research and Markets), the electronic products market witnessed a growth from
$1186.56 billion in 2022 to $1275.34 billion in 2023 [3]. This growth represents a
compound annual growth rate (CAGR) of 7.5%. The data suggests that almost 6.92
billion smartphones and an estimate of over 2 billion personal computers in use in 2023.
These consumer devices consume plenty of electric power. They have not only been
increasing in number, but they have also been getting bigger in size and more powerful
[4]. The main type of batteries powering these devices is lithium ion. The batteries
1
packed into the consumer electronics have been increasing in capacity over the recent
years.
Figure 1: Battery capacity in mAhr and the Smartphone screen size in cm2 vs years
2006-2020
One main disadvantage of these batteries is that they do not last long. Most smartphones
can last averagely up to only 20 hours of use [5], with the best ones lasting to a maximum
of 36 hours. This implies that these devices need to be charged from time to time. It is the
reason why there are charging ports in almost every place around the city like in
restaurants, cafes and in airports. They are all trying to satisfy the huge demand of
charging needed by people in order to keep their devices active longer. People use these
2
smartphones not only for communication, but also for work, entertainment, navigation
and even payment.
Fast Charging technology:
In order to keep up with the increased power demand of these digital devices in the last
few years, fast charging had to be implemented. The basic idea behind fast charging is to
increase the number of watts that are delivered to a phone’s battery in this case, more
power can be provided to the battery so that it can charge faster.
There are a few different ways of doing this, but the most common is to use a higher
voltage or a higher current charger. By using a charger that provides more voltage or
current, you can deliver more watts to the battery, which in turn allows it to charge faster.
USB 2.0 which was able to charge devices with 2.5W started along with the digital
devices, which then advanced to 7.5 W through 4.5 W during 2008 and 2010 by
increasing the amount of current flowing to the device [6]. In 2014, a few smartphones
which possessed the capabilities were to charge very fast from 0% to full charge in just
under 1 hour and a half using 15 W of power. USB power delivery which will be
elaborated later on achieved the charging power of 100 W in 2015 and this allowed
powerful devices like gaming laptops to be powered using the USB.
Figure 2: the year of founding of the USB specifications and their capabilities
3
The biggest challenge that came with the increasing of power to charge the digital
devices was the size of the charger. A convectional 60 W charger for Apple MacBook’s
comes in a square shape with the sides having the length of 10.6cm, which is almost the
size of an average adult human arm. If these chargers were to be raked up to 100 W, they
would be twice as big and would be too big to carry around. A work around has been to
observe and optimize the biggest component in these chargers, namely the transformer.
The transformer takes up to half the size of the whole charger and it usually varies in size
inversely proportional to the frequency of the electricity flowing through.
The switching frequency of a charger is one of the key factors that determine its size and
weight [7]. A higher switching frequency means that the charger can move power
through its transformer more quickly, which sequentially allows for a smaller and lighter
transformer. The relation between the size of the transformer and the frequency could be
demonstrated using the following equation, where A stands for Area of the winding coils
and f stands for frequency of the electricity going through.
𝑃𝑜𝑢𝑡 × 𝐷𝑐𝑚𝑎
𝑊𝑎𝐴𝑒 =
𝐾𝑓 × 𝐵𝑚𝑎𝑥 × 𝑓
Legacy of Silicon:
Silicon has a low frequency causing the charging bricks to be huge. The maximum
switching frequency for chargers that use silicon charger is typically around 100 kHz [7].
However, this can vary based on the specific charger and the power needs of the device
being charged. For instance, a charger for a laptop may have a higher switching
frequency than one that for a smartphone because the former needs more power to charge
than the later.
Silicon is a semiconductor material with a bandgap of 0.7 eV that is commonly used in

powering electronics devices [8]. It is an excellent material for these applications because
4
it is competitively priced, widely available, and has good thermal and electrical
properties. However, as mentioned earlier, silicon is limited to its low switching
frequency, relatively low breakdown voltage and a relatively low power density, which
causes its transformers in power electronics to be big in size.
To achieve smaller transformers and chargers which can promise the fast-charging speed,
a new material has to be utilized.
Researchers were able to devise wideband gap semiconductors like Gallium Nitride
(GaN) and Silicon Carbide (SiC) in order to increase the frequency and reduce the size of
the transformers in the chargers [9].
Gallium Nitride:
GaN, or Gallium Nitride, is classified as a "Wide band gap semiconductor," which refers
to semiconductors whose band gap is wider than conventional semiconductors such as
silicon whose band gap is in the range of 0.5-1 eV, with a value of 1.12 eV. Wide band
gap semiconductors, like GaN (with a band gap of 3.4 eV), have a higher band gap above
2 eV, which also includes SiC (silicon carbide) with a band gap of 2.49 eV [9]. The wider
band gap of these materials allows them to conduct current at higher voltages, resulting in
a higher rate of power flow and efficiency. Among other advantages, wide bandgap
semiconductors also come with the ability to function in higher temperature due to their
good thermal conductivity and the higher melting point. They also feature significant
higher electron velocity thus allowing higher switching frequency in power electronics.
5
Figure 3: Different material properties of various semiconductors
With higher switching frequencies, the chargers could be reduced in size after the
transformers are also reduced in size.
With the benefit of smaller chargers but still powerful chargers, there was a risk of
supplying too much power to some of the small electronics like smart watches and other
low power rated smartphone devices.
Experts were able to increase the amount of current flowing through from 500 mA in the
beginning of 2000s, to 3 A in 2014. It was noticed that any further increase of electric
current would lead to very thick wires which became bulky and non economical all
together. On the other hand, any increase in voltage beyond 5 Volts which was
maintained for 15 years already as observed in Figure 2, would results into burning of
electric devices that are not meant to hold that much power. This includes the small
digital devices that didn’t need the ability to handle more than 5 volts like smartwatches,
mp3 players and small sized smartphones.
6
In order to ensure the safety while charging every device, there was a need of a
communication protocol to facilitate a transfer of message which will signal to the
charger how much power it can supply to safely charge the connected device.
Power Delivery:
To ensure the safety of the small digital electronics meanwhile reaching the demand of
the big smartphones and personal computers, the USB IF established the USB power
delivery [10]. USB Power Delivery (USB-PD) is a standard that facilitates the transfer of
higher power levels between USB devices via a USB-C cable. By enabling the
negotiation of power levels and device capabilities between two USB-PD enabled
devices, USB-PD allows for more efficient and adaptable power transfer.
Compared to the original USB 1.0 specification, which allowed for only 2.5W of power
transfer, USB-PD can deliver up to 100W, making it suitable for a broad range of devices
that require higher power levels, such as laptops, tablets, and smartphones.
The negotiation of power levels and device capabilities is carried out through a
communication protocol between the USB-PD controller chips in both devices when they
are connected. The exchange of information determines the maximum power level that
can be delivered, based on the lowest common denominator.
Among other advantages, the best one is that USB-PD supports various voltage levels
through several defined power profiles that specify the maximum voltage and current that
can be delivered. This allows complex combinations of voltage and current to be attained
in order to charge the devices faster with safety guaranteed. The appropriate power
profile to use is determined by the connected devices' power requirements and
capabilities.
As platforms and devices became more complex, the maximum power had to be
increased to meet their needs. With just USB Type-C alone, it could support up to 5 V at
7
3 A (15 W). With USB PD, however, it can support up to 20 V at 5 A (100 W) while
using the USB Type-C platform.
Figure 4: various combinations of Voltage and current that come with different USB
specifications
Moreover, USB-PD allows for power role swapping, which enables a device to switch
between being a power source and a power sink. For instance, one port of a laptop can
charge a smartphone while in use, and if the laptop's battery is low, the same port could
be connected to a charger and it could charge the laptop. The same port allows power to
either get in to the laptop of go out depending on the what it is connected to.
In addition to power delivery, USB-PD also supports data transfer, video, and audio over
the same USB-C cable, making it convenient and efficient to use a single cable for
multiple functions. This feature reduces clutter and simplifies connectivity. Power
delivery was possible through USB-C because of the unique feature the cable has over
other serial buses.
USB-C:
USB-C, also known as USB Type-C, is a modern and more advanced version of the
Universal Serial Bus (USB) standard that has gained widespread adoption in the digital
8
electronics industry since its introduction in 2014 [11]. Its popularity stems from its
numerous advantages over previous serial bus standards like PS/2 and VGA ports.
USB-C accumulates all of these benefits because it possesses a lot of pins. It has up to 24
pins in the port. This allows enough pins to transfer data, power and also allows the
power delivery communication messages to flow through the cable without interrupting
with other functionalities.
Figure 5: USB-C pin arrangement

One of the other benefits of USB-C is its small physical size. The connector is smaller
and slimmer than previous USB connectors, making it convenient to use in confined
spaces and enabling device manufacturers to create slimmer and lighter devices.
Furthermore, the connector is reversible, meaning that it can be inserted into a device in
any orientation, eliminating the annoyance of figuring out which way to plug it in.
USB-C also boasts higher bandwidth than previous USB standards. It can support speeds
up to 10 Gbps, which is twice as fast as USB 3.0 and more than 20 times faster than USB
2.0 [11]. This enhanced bandwidth allows for faster data transfer, particularly useful for
transmitting large files and streaming high-definition videos.
USB-C is also highly versatile. It can accommodate multiple protocols over the same
cable, such as USB, DisplayPort, and Thunderbolt 3, allowing for a single cable to be
used for various functions, including charging, data transfer, and video output.
Modern platforms and devices require USB Type-C connectors to meet their evolving
needs as form-factor designs tend to be smaller, thinner, and lighter. In addition, the
inclusion of USB PD for the Type-C connector allows applications that require high
power consumption to be accommodated
9
1.1.2 Aims and objective
In layman's terms, the goal of this project is to investigate the feasibility of GaN
technology to create faster-charging electronic devices which integrate USB power
delivery to supply high power to electronic devices in a safe manner. The project will
begin with an overview of GaN and its properties, as well as a review of fast-charging
technology. Then, we'll investigate how well GaN-based fast-charging solutions work,
including how efficient and cost-effective they are compared to traditional charging
technology.
The project also aims to design and implement a fast charger which utilizes the full
potential of Gallium nitride as a wideband gap semiconductor to supply high power with
a small sized charger. A DC-DC converter will be designed and simulated using LTspice.
In order to ensure safety of the devices being charged, power delivery will be integrated
into this charger so that it can establish a communication with the device and only supply
safe amounts of voltage.
The project would be analyzing circuit boards and chargers whch implement GaN
semiconductors and power delivery. There are very minimal risks that are expected
during this study. Although open circuit boards would also be dealt with, the risks of
electric shock are minimal since most of them run and use voltages below 32 V which is
considered to be safe for human beings to handle.
At the conclusion of this project, our hope is to gain a more comprehensive

understanding of the strengths and weaknesses of fast charging technology that utilizes
Gallium Nitride (GaN), as well as its potential to enhance the speed and effectiveness of
charging electronic devices. The outcomes of this investigation may have significant
repercussions for the advancement of fast-charging technology and its possible utilization
in the market for electronic devices and electric vehicles.
10
1.2 Literature Review
Gallium nitride (GaN) is a binary III-V direct bandgap semiconductor material. It is a

hard, durable material with a high heat capacity and thermal conductivity. Early research
by Mohammad and Salvador in 1994 indicated that GaN has a wide bandgap of 3.4
electron volts at room temperature, this allows it to withstand high voltages and power
levels [12]. This property makes GaN highly promising for power electronic applications
such as fast charging. This research reveals why GaN has the potential to be used in the
power electronics so that they could achieve better efficiencies while still outputting high
voltages.
Compared to silicon, the most common semiconductor material, GaN can operate at
much higher voltages, frequencies, and temperatures. Silicon has a narrower bandgap of
1.1 eV, limiting its maximum operating voltage to around 1000 V. In contrast, experts
were able to prove that GaN can operate up to 3300 V [7]. Their findings reveal that GaN
also has a higher saturation velocity, allowing for higher switching speeds up to 10 MHz
compared to 1 MHz for silicon. Thermally, GaN is superior with the ability to operate up
to 600°C compared to only 200°C for silicon. The study conducted here shows how GaN
is dominant over silicon in terms of better properties.
Research by Meneghesso on reliability issues of gallium nitride devices says that “Due to
their high breakdown voltages (.100 V), GaN HEMTs can operate in conditions that are
not readily realizable with other device technologies, i.e. high drain operating voltage,
low output capacitance per unit power (resulting from high power density), high peak
efficiency, and good thermal dissipation [13].” These properties suggest GaN would be
an excellent candidate for fast charging applications where high-power delivery and
thermal management are required. GaN power transistors such as high-electron-mobility
11
transistors (HEMTs) can provide lower on-resistance, faster switching speeds, and higher
temperature operation compared to silicon, enabling more efficient power conversion.
Several companies [14], [15], [16] have also published their research and developed
GaN-based fast charging systems. Xiaomi released a 100W GaN charger in 2019 that can
charge a 4000mAh battery in 17 minutes [14]. Anker uses GaN components in their fast
chargers like the PowerPort Atom PD 1 (60W) and PowerPort Atom III (100W) to enable
charging a laptop in 30 minutes [15]. Navitas Semiconductor developed GaNFast power
ICs used by Dell, HP, Lenovo, and others for laptop fast charging [16]. These cases show
GaN's ability to enable 50-100W power delivery in compact charger sizes. They also
demonstrate the capability of GaN electronic devices to fastly adapt and capture the
consumer electronics market starting with the major electronic companies like xiaomi.
Market forecasts show that cost and material quality remain to be among the main
challenges for GaN despite recent improvements. In 2015 Graham wrote that “Currently
GaN devices are 2 to 3 times the cost of their silicon counterpart with similar power
handling capability [17].” GaN substrates and epitaxial growth equipment are more
expensive than silicon. Defects in GaN like threading dislocations also must be reduced
to improve material quality. Grahams proceeds to comment that it is expected that GaN
electronics devices will reach parity with Silicon in the next 5 years. This study explains
the factors slowing down the growth of GaN market due to the costs of manufacturing the
devices.
Despite the challenges, experts are more than confident that GaN will likely enable
further innovations in fast charging for various applications [18]. Higher power density
means smaller, lighter chargers for electric vehicles, drones, robots and more. Faster
charging of 10-15 minutes is expected to be possible with higher power levels over
200W. Wireless charging and bi-directional charging can also benefit abundantly from
GaN's capabilities. The studies in this part provide the evidence that GaN will manage to
12
take over silicon-based electronics because of the beneficial features that come with the
GaN devices.
The research papers selected for the study of this project were ensured to be including the
discussion of Wide-Band gap semiconductors. The project also focused on the
implementation of power delivery, hence research papers on the use of other protocols
including QC, FCP were not selected and evaluated.
From the studies and research published concerning GaN power electronic devices, it can
be said that there is a good foundation already for GaN power electronics market to
flourish and dominate the silicon-based electronics market. This is the reason this project
aims to design and implement a fast charger which uses GaN and power delivery. It is
because GaN has the all the potential to power consumer electronic devices in the future.
This study will has a objective to design a charger with better efficiencies and capability
than then the commercially available chargers in the market.
1.3 Industrial Relevance;
Gallium nitride (GaN) is a semiconductor material that has recently gained significant
attention for its potential applications in fast charging technology. GaN-based fast
chargers are capable of handling higher charging powers than traditional chargers, which
allows them to charge electronic devices more quickly and efficiently. This can save time
of the user and it can improve the performance and lifespan of the device being charged.
In addition to fast charging, GaN has also been used in a variety of other applications,
including power electronics, LED lighting, and RF communication. It is also being
researched for potential use in renewable energy technologies, such as solar cells and fuel
cells.
13
Power delivery could be integrated into the fast chargers to as to ensure safety and not
cause any serious damage to devices that cannot handle higher voltages. This allows the
use of a single charging adapter to charger multiple devices. This implies that a user will
not need more than one charging adapter for his daily uses. With power delivery, the
amount of e-waste could drop drastically and would save significantly on the amount
needed in order to buy extra adapters.
14
Chapter 2
Methodology and Results
2.1 Methodology
As said earlier, the aim of this project is to design and implement a fast charger which
uses a DC-DC converter and integrates power delivery to its design in order to charge
devices faster and in a safe manner. The topology of previous USB-C models by the USB
implementors Forum will have to be taken into account to implement a design which is
within the required standards.
Data Flows and Power roles in USB C and USB Power Delivery;
The following are the data flows and power roles in USB C and USB power delivery
implementation as illustrated by the USB IF [19]. They are key in the understanding how
the topology works.
USB connections support three categories of data flow:
- The Downstream-Facing Port (DFP) transmits data downstream; it is typically
the port that devices connect to on a host or hub. A DFP can provide both VBUS
power (the power path between host and device) and VCONN power (to power
electronically marked cables). A docking station is an example of an application
that may include a DFP.
- The device or hub's Upstream-Facing Port (UFP), which connects to a host or
downstream-facing port (DFP) of a hub, receives data. Typically, these interfaces
sink VBUS. A display monitor is an example of an application that may include a
UFP.
- The Dual-Role data Port (DRD) can function as either a DFP (host) or a UFP
(device). The initial function of a port is determined by its power role at attach. A
source port assumes the role of a DFP, whereas a sink port assumes the role of a
15
UFP. Using USB PD data role exchange, the port's data role can be changed
dynamically. Laptops, tablets, and mobile phones are examples of devices that
may feature DRD interfaces.
Three kinds of power flow are present in a USB connection:

- A sink is a port that draws power from VBUS when it is affixed, and a sink is
typically a device. It could include USB-powered accessories such as a light or
fan.
- A source is a port that provides power over VBUS when connected. A common
source is a DFP host or gateway. A source application example is a USB Type-C
wall adapter.
- A dual-role power (DRP) port can function as a sink or a source and can switch
between these two states. When a DRP operates as a source for the first time, the
port assumes the data role of a DFP. When a DRP operates initially as a drain, the
port assumes the data role of a UFP. Using USB PD power role switch, the DRP's
power role can be changed dynamically. A laptop's DRP port, for instance, can
receive power to charge the laptop's battery, but it can also deliver power to
charge external accessories. In addition, there are two distinct subclasses of
DRPs:
o A sourcing device is equipped to provide power, but not as a DFP. A
monitor compatible with USB Type-C and USB PD that receives data
from a laptop's DFP and charges the laptop is an example of this subclass.
o A submerging host is able to consume power, but cannot function as a
UFP. The DFP of a hub that transmits data to an accessory while being
powered by the accessory is one example.
With the data flows and power flows well outlined, the previous implementations of USB
2.0, USB 3.0 and lastly USB 3.1 could then be illustrated with their block diagram
designs. The block diagram will later be utilized to design the circuit topology to be
simulated in LTspice.
16
Upstream-Facing Port USB 2.0 without USB PD:
Among the initial applications of USB C was the UFP USB 2.0 without USB PD. This
was the simplest and had the most applications since it only involved transfer of data and
power only up to 15 W. Common applications include anything USB-powered that does
not require SuperSpeed data, such as a mouse, keyboard, wearables, and other compact
electronic devices.
Figure 6:Block diagram of UFP type-C USB 2.0 without PD

The USB 2.0 physical layer (PHY) functions as the physical layer between the data from
USB's D+ and D– lines and the application processor-managed USB 2.0 Transceiver
Macrocell Interface (UTMI) plus low-pin interface (ULPI). USB 2.0 PHYs are typically
implemented into processors or microcontrollers, but discrete PHYs are also available for
integrating USB functionality into your design. In the USB Type-C specification, the
configuration channel (CC) logic block determines cable detection, cable orientation, and
current-carrying capacity.
- Cable detection takes place when one of the two CC lines descends (see Figure
3). A DFP's CC pins will be pulled up with resistor Rp, while a UFP's CC pins
will be pulled down with resistor Rd. As soon as a DFP processor detects that one
17
of its CC lines has been disconnected, the DFP will recognize that a connection
has been established.
- The orientation of a cable is determined by which CC line pulls down (if CC1
pulls down, the cable is not flipped; however, if CC2 pulls down, the cable is
reversed). For inactive cables, the remaining CC line remains open; for active
cables, it pulls down with Ra.
- The values of Rp determine the capacity to transport current. USB Type-C can
support 1.5 A or 3 A natively. A DFP can advertise its current-carrying capacity
with a pullup resistor of a specific value. A UFP has a pulldown resistor (Rd) with
a fixed value that, when connected, creates a voltage divider with Rp. By
monitoring the voltage at the voltage divider's center tap, a UFP can detect the
DFP's advertised current.
Figure 7: Termination of the CC logic pullup and pull down [11]

The final element is a USB 2.0 multiplexer, also referred to as a high-speed mux. Figure
2's dashed outline represents a discretionary block that is not mandated by the USB Type-
C specification. To comprehend the function of the mux, it is necessary to comprehend
how reversing the cable affects data transmission. There are two pairs of D+/D– lines for
a single USB 2.0 data channel in a USB Type-C receptacle. In one orientation,
information flows down one pair. In the inverted orientation, information travels down
the opposite pair. The USB Type-C specification permits connecting the pairs D+ to D+
and D– to D– to form a fragment. Although it is optional, some system designers choose
to include a USB 2.0 mux to enhance signal integrity.
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Downstream-Facing Port USB Type-C: USB 2.0 without USB PD:
This is another simple and common application of USB C. An example of its application
is in an AC/DC adapter or smartphone charger with outputs 5 V only.
The figure below shows block diagram the USB type-C DFP topology;
Figure 8: block diagram of DFP USB type-C USB 2.0 without PD
Observing the similarities to Figure 6, there are a few additional blocks added, while the
CC logic block remains unchanged. In the case of a DFP, the device presents Rp and
monitors for Rd-induced pulldown. Once Rp detects a pulldown, the DFP recognizes
there is a connected device and supplies 5 V. A new USB Type-C feature provides 5 V
19
on the VBUS line only after detecting a device (cold-plugging), as opposed to always
supplying 5 V [20]. The USB 2.0 ULPI PHY is identical to that described in the prior
section. For applications that do not involve data transmission, such as a 5-V wall
adapter, the USB 2.0 ULPI PHY can be omitted from the design. As USB Type-C
supports cold-plugging, a 5-V VBUS field-effect transistor (FET) is added. The design
therefore necessitates a switch for the 5-V rail.
In addition, the USB Type-C specification stipulates that all sources must monitor current
and safeguard themselves if a sink attempts to draw more than they can supply. The
overcurrent protection block comes into effect here. These two modules may be
incorporated into either the point-of-load power converter or the USB Type-C device.
Figure 8 contains the VBUS discharge block as well. When no device is connected,
VBUS must be at 0 V. USB Type-C requires a source to discharge VBUS within 650
milliseconds of a detachable sink. VBUS discharge is frequently implemented into USB
Type-C devices, but bleeder resistors can also be incorporated. By transferring 5 V onto
the unused CC line, VCONN can power passive electronically marked or active cables
(cables that support USB PD communication and provide a method for determining cable
characteristics). Figure 7 demonstrates that one CC line in a USB Type-C cable is
connected to Rp and Rd, while the other is left floating (passive cable) or dragged to
ground with Ra (passive electronically marked or active cable). VCONN is obligatory for
all applications that support USB 3.1 speeds or power delivery above 3 A. Active cables,
such as longer-distance cables that require signal conditioning with an integrated redriver
or retimer, also require the VCONN switch.
USB Type-C Dual-Role data Port USB 2.0 without USB PD:
This was the last implementation of USB 2.0 which did not feature USB PD.
The figure below shows the block diagram of the USB type C DRP/DRD USB 2.0
without USB PD.
20
Figure 9: Block diagram of USB type-C DRD USB 2.0

A common example is a port on a slower-speed laptop that can transmit power in either
direction - to charge or be charged - and function as either a host or a device. Tablets and
smartphones are a typical application for this system type.
The only significant difference from Figure 8 is the addition of the Rp/ Rd switch. A
DRP/DRD may masquerade as either a UFP or a DFP. In order to charge a dead battery,
this design must have a mechanism for pulling the CC lines up with Rp or down with Rd
which is the default.
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USB Type-C DRP/DRD: USB 2.0 with USB PD:
USB PD is needed in implementations with more complexity.

As mentioned earlier, systems with USB PD can support power transmissions of up to
20V and 5A, that is 100W. As shown in the illustration below, this can be done by
increasing the voltage on the VBUS while maintaining the maximum current of 3 A. As
soon after the maximum voltage of 20V is attained, the current can be increased up to
5 A.
Figure 10: USB PD profiles showing the power rails and maximum current [10]
From the figure, it can be noticed that;
- The distinct voltages levels required are 5 V, 9 V, 15 V, and 20 V (which were
later improved in USB PD specification version 3.0).
- The current can vary continuously, up to 3 A, based on the required power level.
- A source is required to support all previous voltages and power levels at any
particular power level.
A 60 W source, for example, must be able to provide 20 V at 3 A, 15 V at 3 A, 9 V at
3 A, and 5 V at 3 A. This revision to version 3.0 of the USB PD specification ensures that
higher-powered power supplies can support lower-powered devices. An adapter for a
laptop and phone is one example.
The figure below shows the block diagram for USB Type-C DRP/DRD: USB 2.0 with
USB PD;
22
Figure 11: block diagram for USB Type-C DRP/DRD: USB 2.0 with USB PD
Figure 8 illustrates four novel blocks that are utilized for USBPD applications. The
previously introduced VBUS FET is now capable of handling 5 V to 20 V (at discrete
levels depending on the desired power level) and up to 5 A (again, only when providing
20 V). Figure 8 also depicts the addition of a gate-driver block for the FET with the
greater power. Some devices include both a high-power FET and a gate driver for driving
an even higher-power external FET, while others include only the gate driver or neither.
USB PD PHY and USB PD manager are two more new elements in the block diagram in
figure 11. Together, these blocks transmit data packets across the CC lines, allowing the
23
DFP and UFP to communicate. This communication allows the source to make known
the power levels it can support, allowing the drain to request a supported power level.
Once the desired power level has been determined, the voltage and current levels are
adjusted.
It is essential to distinguish the roles of the USB PD manager and USB PD PHY, as some
USB Type-C devices may include only one of these components. A general-purpose
microcontroller, for instance, can serve as a USB PD manager but lacks the USB PD
PHY. The USB PD PHY is responsible for driving the CC lines, but it lacks intelligence.
The USB PD manager contains a complex state machine to facilitate USB PD negotiation
and manage the PHY. The USB PD manager accomplishes this by instructing the PHY
which packets to transmit, including packets for advertising the power level, requesting
the power level, and acknowledging the channel power level.
The most important conclusion is that if USB PD is required, a USB PD PHY and a USB
PD manager are required. A USB PD PHY and USB PD manager can be implemented by
using an integrated solution with the USB PD manager and USB PD PHY solution in the
same device, or by implementing a USB PD manager on a microcontroller and using a
distinct PHY with a USB Type-C port controller.
USB 3.1 Gen 1 (SuperSpeed) and Gen 2 (SuperSpeed+):
USB 3.1 gen 1 (superspeed) or Gen 2 (superspeed+) are needed in applications which
require transfer rates which are faster than 480 Mbps. Superspeed can offer data transfer
speeds up to 5 Gbps, meanwhile Superspeed+ offers up to 10 Gbps.
The USB type-C 3.1 block diagram can be seen below;
24
Figure 12: Block diagram of USB 3.1
To enable these higher transfer rates in a USB Type-C application, the design must
include a USB 3.1 PHY interface for the PCI Express (PCIe) (PIPE) PHY (Serial
Advanced Technology Attachment and USB architectures) and a USB 3.1-compatible
bidirectional differential switch, as depicted in Figure 12.
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2.1.1 LTspice Simulation:
LTspice was utilized in this project to design and simulate a DC-DC converter which will
be used to lower a high input DC voltage to a lower DC output voltage. In order to
increase its usefulness, the converter designed will be ensured to be capable of accepting
a wide range of input voltage so that it can be used in multiple scenarios including in a
DC home.
With the designs well explained the following block diagram could be outlined to
illustrate the functionalities which will be designed and simulated.
Figure 13: general block diagram of the USB-C adapter

The block diagram could be further expanded to reveal more elements including the
USB-C power delivery controller and the buck controller to be simulated as follows;
Figure 14: Expanded block diagram of the USB-C adapter
26
With considerations of the design implementations explained earlier, the following main
components were added to the block diagram, their functionalities in this particular
design are explained as follows;
- Low dropout regulators (LDOs)
These are used to lower the voltage from the input to safe levels which could be
used to run the controllers and chips inside the adapter. They can also be used to
power small electric components like LEDs to signal to the user what state the
adapter is on at the moment. The LDOs could be of various sizes to lower the
voltage to 5 V, 2.5 V and 3.3 V depending on which part it is aimed to power.
- The USB PD controller.
This is the brains of the adapter and it will be dealing with the power delivery
protocol messages transmission from the device it is connected to, and also it will
be sending messages to the physical layers PHY as explained earlier.
- The buck controller. This the main part which will lower the input voltage and
output either 5, 9, 15 or 20 V depending on the requirements of the device
connected, the output will depend on the signal from the PD controller.
Figure 15: Further expanded block diagram revealing the main components
27
The main components that will be simulated in LTspice will be the buck controller and
USB PD controller. The simulation aims to demonstrate the working of the adapter after
it is connected to the sink and communication has between the two PD controllers has
already taken place.
Figure 16: block diagram with direction of movement of signals and power
After the negotiation between the PD controllers is completed, the PD controllers sends
signals to the buck controller via the feedback control. Depending on the signal, the buck
controller will adjust its output to match the amount of voltage needed for the device to
be charged safely.
From an actual PD controller, the signals are usually in digitally encoded, the physical
layer PHY decodes the signals and then send the given result to the buck controller. In
this simulation, different amounts of small values of voltage will be used to differentiate
between the signals sent to the buck controller. The PD controller will be simulated using
a voltage source named ‘PDChip_output’ which will produce these small voltages. The
PDChip_output is set using the LTspice tools to produce the voltages of 0.625, 1.125,
1.875 and 2.5 volts.
These signals in terms of voltage will go through a universal opamp to be amplified.

Then they will be fed into the buck converter through its feedback channel. The converter
is set to output voltages of 5, 9, 15 and 20 volts respectively to the amount of signal
voltage that got in through the feedback channel.
28
Table 2: amount of signal from PD controller and the output voltage expected
Signal from PD controller (V) Intended output voltage (V)

0.625 5
1.125 9
1.875 15
2.5 20
Below is the outline of the circuit as designed in the LTspice software.
Figure 17: Circuit design simulated in LTspice
LTC7891 chip
The chip used in the simulated circuit is The LTC7891, which is a controller for step-
down dc-to-dc switching regulators, which is capable of driving all N-channel
synchronous gallium nitride (GaN) field effect transistor (FET) power stages from input
29
voltages of up to 100 V. The LTC7891 addresses many of the common challenges

associated with using GaN FETs, thereby simplifying the application design process.
Unlike a silicon metal-oxide semiconductor field effect transistor (MOSFET) solution,
the LTC7891 does not require any protection diodes or additional external components.
The internal smart bootstrap switch ensures that the BOOST pin to SW pin high-side
driver supplies do not overcharge during dead times, which protects the gate of the top
GaN FET. The LTC7891 optimizes the gate driver timing on both switching edges to
achieve smart near zero dead times, resulting in increased efficiency and allowing for
high frequency operation even at high input voltages. Additionally, the dead times can be
adjusted with external resistors as needed. The gate drive voltage of the LTC7891 can be
adjusted from 4 V to 5.5 V for optimal performance, and to enable the use of different
GaN FETs or logic level MOSFETs.
The LTC7891 converter has been extensively used in various applications including
industrial power systems, telecommunications power systems and military avionics and
medical systems.
A typical application circuit of the converter can be observed below;
30
Figure 18: Typical application circuit of the LTC7891

Working of the LTC7891 could be described as follows;
The LTC7891 is an electronic device that functions as a synchronous controller, utilizing
a constant frequency and peak current mode design. During its regular operation, the
external top FET is switched on by the clock signal, activating the set/reset (SR) latch and
causing the inductor current to rise. The main switch then turns off when the main current
comparator (ICMP) resets the SR latch. After each cycle, the top FET is turned off and
the bottom FET is turned on, resulting in a decrease in inductor current until the current
comparator (IR) detects either a reversal in the current or the start of the next clock cycle.
The magnitude of the peak inductor current at which ICMP trips and resets the latch is
determined by the voltage applied to the ITH pin. The ITH voltage is generated by the
output of an error amplifier (EA), which compares the feedback signal at the VFB pin to
the internal 0.8 V reference voltage. The VFB signal is generated by an external resistor
divider connected across the output voltage (VOUT) and ground. When the load current
31
increases, there is a slight decrease in the VFB signal relative to the reference, which
causes the EA to increase the ITH voltage until the average inductor current matches the
new load current.
Selection and calculation of external components in the simulation:
Figure 18 above shows the typical application circuit. The selection of external
components is largely determined by the load requirement and begins with selecting an
inductor, current sense components, operating frequency, and light load mode. Following
this, the remaining power stage components can be selected, including the capacitors at
the input and output and the power FETs. After that, feedback resistors are selected for
setting the desired output voltage. In the following steps, the remaining external
components are chosen, such as those for soft start, biasing, and loop compensation.
Across the output of the LTC7891, an external feedback resistor divider is used to set the
output voltages. To configure the power delivery, the signal voltages from the
PDChip_output are also fed through the same channel where the feedback resistors are
connected to. This way, the output voltage gets to be controlled and the amount of the
output voltage can get decided by the power delivery chip.
the calculation of the external components used in the simulation is shown below starting
with the operating frequency.
1. The operating frequency.
The frequency is not a predetermined setting that is stored inside. As a result, a
resistor with the value determined in the equation below is needed to connect the
FREQ pin to GND as follows:
37𝑀𝐻𝑧 37𝑀𝐻𝑧
𝑅𝐹𝑅𝐸𝑄(𝑘Ω) = = = 37𝑘Ω
𝑟𝑒𝑞𝑢𝑖𝑟𝑒𝑑 𝑓𝑟𝑒𝑞𝑢𝑒𝑛𝑐𝑦 1𝑀𝐻𝑧
The required frequency was set to 1MHz since this is the nominal switching
frequency of GaN semiconductors. The RFREQ in the simulation was set to 40k
ohms to ensure the frequency is above 1MHz throughout the simulation.
32
2. The value of the inductor.

A value was initially chosen based on a 30% inductor ripple current. The
following equation may then be used to obtain the inductor value as shown below:
𝑉𝑂𝑈𝑇 𝑉𝑂𝑈𝑇
𝐿= (1 − ) = 2.2𝜇𝐻
𝑓𝑆𝑊 𝑉𝐼𝑁
3. Make sure the 40 ns minimum on time is not being violated.
The following equation illustrates that VIN(MAX) is where the minimum on time
occurs.
𝑉𝑂𝑈𝑇
𝑇𝑂𝑁 =
𝑉𝐼𝑁 (𝑀𝐴𝑋)(𝑓𝑆𝑊 )
20
𝑡𝑂𝑁 (MIN) = = 416𝑛𝑠
48(1𝑀𝐻𝑧)
The minimum time is above 40ns, hence it is not violated. The LTC7891 misses
pulses at high input voltage if the minimum on time is not met, leading in lower
frequency operation and more than desirable inductor current ripple.
4. Choose the resistor value for RSENSE.

The highest DC output current plus half of the inductor ripple current equals the
peak inductor current, or in this simulation example, 3A (1 + 0.30/2) =3.45 A.
The value of the RSENSE resistor may then be determined using the following
equation’s lowest value for the maximum current sense threshold (7mV for
ILIM=float).
7𝑚𝑉
𝑅𝑠𝑒𝑛𝑠𝑒 ≤ ≅ 2𝑚Ω
3.45𝐴
5. A feedback resistor should be chosen.
High value feedback resistors can be utilized to reduce the current owing to the
feedback divider if light load efficiency is desired. However, a feedback divider
current of at least 10µ A and up to 100µ A is appropriate in the majority of
applications. In this simulation example, 80µ A was chosen.
0.8𝑉
𝑅𝐴 = = 10𝑘
80µ 𝐴
33
and the other resistor Rb could calculated as;

𝑉𝑂𝑈𝑇
𝑅𝐵 = 𝑅𝐴 ( − 1) = 625Ω
0.8𝑉
6. Deciding on the FETs.
Building and testing the circuit on a bench, aided by an LTC7891 evaluation
board, is the best approach to gauge FET performance in a specific application.
Nevertheless, to choose FETs initially, an informed assumption about the
application is useful. Since this simulation will involve low current load of up to
3 A and low output voltage. The FETs chosen and applied in the circuit will be
EPC2022 which is an Enhancement mode power transistor.
7. Choose the output and input capacitors.
The choice of CIN is made to have a minimum rms current rating of 1.5 A (IOUT/2,
with margin) at a particular temperature. Low output ripple is desired, hence COUT
with an ESR of 3m Ω is used. To lower the ESR to this level, many capacitors
linked in parallel may be needed. At the maximum input voltage is when the
output ripple in continuous mode becomes the greatest.
8. Identify the supply bias components.
The regulated output cannot be utilised to bias INTVCC since it is below the
EXTVCC switchover threshold. A 1 nF capacitor is chosen for the TRACK/SS
pin for a 0.45 ms soft start. The INTVCC capacitance is chosen as (CINTVCC) =
4.7 µF and CB = 0.1 µF as a first pass estimate for the bias components.
9. Determining and setting application specific parameters;
Because the converter is used in a light load condition of just 3 A and maximum
voltage of 20V. The MODE pin was connected to the INTVCC in order to set the
converter to a forced continuous operation mode. In forced continuous mode,
regardless of the load, the inductor current is permitted to reverse at low loads and
switches at the same frequency. The mode offers the benefit of reduced
interference with audio circuits and lower output voltage ripple. The output ripple
in forced continuous mode is not affected by the load current.
34
10. Connection of the LTC7891 chip with the power delivery controller.
After parameters for the LTC7891 chip were determined. A difference amplifier
and a network of resistors were used to make the connection. The resistors of the
amplifier were set to 100k so that it can achieve a gain of 1. The amplifier was set
with a 5V source to its V+ which will represent the 5V LDO from an actual
circuit. the amplifier’s V- was set to ground.
After the required parameters were determined and input into the LTspice simulation,
it was allowed to run and the results were recorded. Among the parameters measured
include the power input, the power output and the efficiencies of the simulation when
the output becomes stable.
2.2 Results
Three major parts of the results will be discussed in this section. First part involves the
results from testing a circuit board which was purchased. The circuit board features a
DC/DC converter with power delivery integrated into its design so as to enable fast
charging to devices with the capability. The second part comprises results from analyzing
and measuring parameters from commercial chargers which were also purchased. These
are the state of art chargers which use Gallium nitride inside them to supply significant
amount of power while maintaining a very small size. The third and the last part involves
the results from LTspice simulations which was done using the chip LTC3864 which was
then changed later to chip LTC7891 with much more efficiency.
2.2.1 The circuit board:
A circuit board which features a DC-DC converter was purchased in order to be

analyzed. The chips and the circuit topology were observed so as to understand the full
working of the board. the board features a DC-DC converter and power delivery chips.
35
Figure 19: The POV of the circuit board purchased
3 chips from the board can be identified easily;

• IP6538
• CSD18540
• Another CSD18540
IP6538
IP6538 is a Synchronous-Rectified Buck Converter which supports multiple fast charge

output standards with dual Type-C output ports and dual USB A output ports. It provides
solutions for car charger, fast charge adaptor and smart power strip.
36
The chip can support dual type C output ports or dual USB-A outports, or type C and
USB A output.
fast charging is supported on any of the single output ports.
It has an in-built MOFET, input voltage range is 4.5V-32V, output ranges from 3V to
20V with up to 45W of charger.
conversion efficiency of up to 96.5% at 5V/3A.
Figure 20: IP6538 Series product information
CSD18540
This is a NexFET™ power MOSFET. It is a high-performance semiconductor device

designed for power conversion applications. It features ultra-low Qg and Qgd, which are
important characteristics for minimizing switching losses and improving efficiency.
Additionally, the chip has low-thermal resistance, which enables it to operate at high
power levels without overheating. Its avalanche rating ensures reliable operation even
during transient voltage spikes.
The chip features lead-free terminal plating and is compliant with RoHS standards,
making it environmentally friendly. Furthermore, it is halogen-free, which makes it
suitable for use in applications where halogen emissions are not permitted.
37
The chip is housed in a SON 5-mm × 6-mm plastic package, which provides excellent
thermal performance and allows for easy integration into existing designs. This small
package size is ideal for space-constrained applications where size is a critical factor.
The CSD18540 is versatile and can be used in a variety of applications, including DC-DC
conversion, secondary side synchronous rectification, isolated converter primary side
switching, and motor control. With a low on-resistance of 1.8-mΩ and a maximum
voltage rating of 60 V, this chip is well-suited for high-power applications that require
efficient power conversion. Overall, the power MOSFET represents a high-performance,
reliable, and environmentally friendly solution for power conversion applications.
An n-channel mosfet is designed to minimize losses in power conversion applications.
To measure the important parameters which concern this board and other devices in this
project, the ChargerLAB POWER-Z KM003C was utilized. The KM003C is equipped
with numerous test capabilities, including voltage/current detection, capacity/energy test,
E-marker test, PDO test, and protocol test, among others.
Due to built-in load, the protocol auto detection in the KM003C tester now also supports
the following protocols: MTK-PE, VOOC, and SVOOC in addition to the previously
supported PD3.1, QC4&5, CP, FCP, AFC, VFCP, etc.
When the protocols in the circuit board were analyzed using the KM003C, it was found
out that it could support FCP, SCP, AFC, QC2.0 and apple2.4A on both of the 2 ports,
that is the USB-C port and the USB-A port.
When tested on its compatibility, it was noticed that the circuit board could accept an
input from 8.2V to the maximum of 20V. The board could output voltages of a
reasonable range from 3V up to 20V, they were adjustable depending on the fast-
charging protocol being implemented.
The KM003C was also used to test the efficiency of the circuit board and it was noticed
that at an input of 9V, the board had an efficiency of around 93.65%, meanwhile with an
input of 10V, the board was noticed to function with an efficiency of around 94.37%.
38
2.2.2 Commercial purchased chargers
Later, commercially available fast chargers were also purchased in order to be tested in
terms of their power delivery capability, efficiency, their protocols and their power
ratings
UGREEN GaN 140W PD3.1 Charger
This UGREEN 140W charger is equipped with 2 USB-C ports and 1 USB-A port.
The gadget has a capacity of 202.16 cubic centimetres and dimensions of around 76 by
76 by 35 millimetres (2.99 by 2.99 by 1.37 inches). It has a 0.69 Watts per cubic
centimetre power density. It has more ports while being smaller than Apple's 140W
charger with a single port.
There are two USB-C ports and one USB-A port on the UGREEN 140W gadget. When
the ChargerLAB KM003C USB tester was utilized, it was noticed that the USB-C1 of the
charger has the following protocols; FCP, SCP, AFC, QC3.0, PD3.0, PD3.1 and PPS.
The USB-C2 port could support all the above protocols except for the PD3.1.
The USB-A port could support FCP, SCP, AFC and QC3.0 protocols.
The charger features the most recent PD3.1 fast charging technology and can generate
140W at 28V/5A whilst also being compatible with 100W PD3.0. While the USB-A port
can charge up to 22.5W via a variety of protocols, the USB-C2 connector is optimised for
100W PD fast charging.
When two devices are connected through the USB-C, they both give out 65W of charger.
In case when 1 USB-C and the USB-A is in use, the charger distributes 65W to the USB-
C, and supplies 22.5 W.
39
When up to three devices are connected at the same time, the charger automatically
adjusts to offer 65W+45W on it’s 2 USB-C ports, and also provides 22.5W on it’s USB-
A port. This ensures users that it can fast charge a laptop, an android and also an iPhone.
The standby power consumption of the charger was tested and found out to be as follows;
The no-load power consumption of the charger is 0.221W at 240V 50Hz, which is about
1.93KW·h in one year, and 0.193W at 110V 60Hz, which is about 1.69KW·h in one year.
The charger's conversion efficiency was also tested by measuring the energy lost in the
process of converting AC to DC. The conversion efficiency varied from 82.97% to
92.43% at 240V 50Hz and from 84.75% to 89.97% at 110V 60Hz.
UGREEN 65 W GaN fast Charger
On the front of the box, it is printed as UGREEN GaNX 65W charger and four main
features printed on the front include: three-port, foldable, wide compatibility, and smart
protection. The charger model is CD244 and it supports wide-range input voltage. It has
two USB-C ports and one USB-A port, and can output up to 65W with a set of PPS.
The charger itself is a rectangular charger, which is black with the UGREEN logo and
65W printed on it. The prongs are foldable and it's very compact, measuring about
67x40x31mm (2.64x1.57x1.22 inches) and weighing about 119g (4.2 oz). The
chargerLAB POWER-Z KM003C was used to test the charger's protocol compatibility,
showing that the USB-C ports can support a wide range of protocols including
Apple2.4A, QC2.0, 3.0, QC4+, AFC, FCP, SCP, PD3.0 and PPS, while the USB-A port
supports Apple2.4A, QC2.0, 3.0, AFC, FCP, and SCP.
A compatibility test with different devices was done to reveal the following results. The
USB-C port can deliver up to about 60W to Android devices that support PPS protocol
(Samsung S22 was used in this case) and up to about 63W to MacBook Pro. The USB-A
40
port can deliver more than 20W to most Huawei devices (a Huawei mate 10 was used in
this case) with the SCP protocol, but a Huawei cable is necessary.
For most Android phones tested (Xiaomi, oppo, Huawei), the power is between 15-20W,
and for iPhones (X, 11 and 12), the power is around 12W. When using both USB-C ports
or USB-C1 and USB-A, the power is split between the devices.
- When we use USB-C1 and USB-C2 to charge two devices, the power will be
40W and 20W.
- When we use USB-C1 and USB-A to charge two devices, the power will be 40W
and 20W.
- When we use USB-C2 and USB-A to charge two devices, the power will be 10W
and 10W.
Testing the charger's full charging capability by charging a MacBook Pro 13". The
charging curve shows that the peak power was 44W at 48 minutes and it took about 2
hours and 23 minutes to fully charge the MacBook Pro. The charging was very stable,
reaching 34% in half an hour and 66% in an hour.
The standby power consumption of the charger was also tested using a power meter. The
no-load power consumption of the charger is 0.289W at 240V 50Hz, which is about
2.53KW·h in one year, and 0.233W at 110V 60Hz, which is about 2.04KW·h in one year.
The charger's conversion efficiency was also tested by measuring the energy lost in the
process of converting AC to DC. The conversion efficiency varied from 83.62% to
90.46% at 240V 50Hz and from 83.67% to 90.03% at 110V 60Hz.
Lastly, the ripple test was done, which measures the ripples in the output current. The
lower the ripple, the better the quality of the charger. When there was no-load and when
the output was 5V 0A, the highest ripple was 22 and 24mVp-p, and when the output was
12V 0A, the lowest ripple was 10 and 12mVp-p.
When it was loaded and when the output was 20V 3.25A, the highest ripple was 72 and
41
90mVp-p, and when the output was 5V 2A, the highest ripple was 53 and 62mVp-p.
Generally, the UGREEN GaNX 65W charger can be said to be reliable and efficient.
Both USB-C ports can support up to 65W. Since it also supports PPS and Huawei SCP
protocols, it can be compatible with many different devices. And you can charge up to
three devices at the same time.
UGREEN 65W Cube 7-in-1 GaN Charging Station
The Cube charging station features a cube design with three AC outlets on the top and
sides, two USB-C and two USB-A ports on the front, a switch button and cable junction
on the back, and two strip rubber pads at the bottom.
The charging station supported FCP, SCP, AFC, QC3.0, PD3.0, and PPS protocols, and
had a non-detachable power cord that was about 1.83m (6 ft) long. Its size was about 76 x
77 x 76mm (2.99 x 3.03 x 2.99 inches), the diameter of the power cord was about 9.6mm
(0.38 inches), and the total weight was 593g.
The charging compatibility of the charging station was tested and found to be as follows;
- The USB-C port could fast charge PD-compatible devices like Apple devices and
some notebooks, as well as some PPS devices such as Samsung galaxies.
- The USB-A port is mainly used to charge Android phones and low-power
devices, and the power is mostly around 15W. When charging with a USB-A and
a USB-C port, the power for the laptop is close to 45W using PD protocol, while
the smartphone is around 15W using QC3.0 protocol. When charging with dual
USB-C ports, the power is also close to 45W and 15W, and both devices adopt
the PD protocol. When charging with dual USB-A ports, the 15W output power
will be divided into 7W.
- When charging four devices at the same time, the total output power is close to
65W, with two USB-A ports at around 7W, and two USB-C ports at around 30W
and 20W, respectively.
42
When testing the performance of the charging station, it was found that it could fully
charge the 16 inches MacBook Pro with a voltage slightly below 20V and a maximum
charging power of about 64W, the maximum power lasted for about an hour and 4 mins.
It took 2 hours and 32 mins for the MacBook pro to be fully charged, and it could charge
the MacBook pro up to 29% in half an hour, 58% in an hour, and 100% in 2 hours and 32
mins.
When testing the standby power consumption, it was found to be around 0.195W at 240V
50Hz, and the conversion efficiency was observed to vary from 85.06% to 89.04% at
240V 50Hz and from 84.12% to 91.32% at 110V 60Hz, showing its excellent
performance.
When testing the ripple voltage and it can be noticed that the lower ripple means better
quality. The highest ripple was 61.6mVp-p when the output was 5V 3A, and the lowest
ripple was 18.4mVp-p when the output was 20V 3.25A, at 110V 60Hz with no load.
When the output was 20V 3.25A, the highest ripple was 31.6mVp-p when loaded, and the
lowest ripple was 15.36mVp-p when the output was 5V 3A.
UGREEN GaN 200W Desktop Charger
This is a 200W 6-in-1 desktop charger that can offer a charging experience that is well-
suited for all types of users.
This desktop charger had four USB-C ports and two USB-A ports on the front, as well as
a three-prong socket on the back. It also came with a thick power cord with a three-prong
plug for grounding, and a dual USB-C cable with a woven design. The charger could
support input of 100-240 V~50/60 HZ 2.5 A. The USB-C1/C2 could support up to
100 W, and the USB-C3/C4 supported up to 65 W. The USB-A1/A2 only supported up to
22.5 W.
The POWER-Z KM003C from ChargerLAB was used to test various aspects and it
showed that the USB-C1 supported SCP, AFC, QC3.0, PD3.0, QC5 and PPS protocols.
The supported protocols and PDOs of USB-C2 are the same as USB-C1. The USB-C3
supported all protocols of USB-C1/C2 and has an additional FCP. The supported
43
protocols and PDOs of USB-C4 are also the same as USB-C3. The USB-A1 supports
FCP, SCP, AFC, QC3.0 protocols, and USB-A2 was the same as USB-A1.
The Desktop Charger’s size was about 101 x 101 x 33mm (3.96 x 3.96 x 1.28 inches).
The power density was about 0.59W/cm³, and the weight was about 515g (1.17 lb).
In terms of charging compatibility, the USB-C1 and USB-C2 could support up to 100W,
making them ideal for charging laptops. The USB-C3/C4, on the other hand, was best
suited for charging mobile phones, and they could fast charge the REDMAGIC with PPS
at 54W. The USB-A1 could provide 20W for the Huawei phones.
The charger’s ability to charge multiple devices was also tested;
When charging 2 devices;
- When using the first two USB-C ports, the power can be divided into 100W and
94W.
- When using USB-C1 and USB-C3, the power can be divided into 94W and 65W.
- And when using USB-C3 and USB-C4, the power can be divided into 65W and
65W.
- When using USB-C1 and USB-A1, the power can be divided into 94W and 21W.
- When using USB-C3 and USB-A1, the power can be divided into 60W and 21W.
- When using both USB-A, the power can be divided into 10W and 10W.
- When using the first three USB-C ports, the power can be divided into 61W,
66W, and 50W.
- And when using USB-C1, USB-C2, and USB-A1, the power can be divided into
61W, 66W, and 21W.
- And when using USB-C3, USB-A1 and USB-A2, the power can be divided into
65W, 10W and 10W.
- When using all USB-C ports, the power can be divided into 60W, 45W, 46W and
18W. So, the actual power of USB-C2 is only 45W instead of the 65W on the
guideline.
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Just like the previous tests, adding the USB-A1/A2 port.

- When using the first three USB-C ports and USB-A1, the power can be divided
into 60W, 56W, 46W and 21W.
- And when using USB-C3, USB-C4, USB-A1 and USB-A2, the power can be
divided into 63W, 52W, 10W and 10W.
- Finally, when using all ports at the same time, the power can be divided into 65W,
40W, 31W, 20W, 10W and 7W.
When trying a Full Charging Test, the following details were found out;
On the 16 inches MacBook Pro 2021, the voltage was always around 20V.
The charging curve could be divided into three parts.
In the first part, the peak power stayed at 90W for the first 48 mins.
Then, the power gradually dropped to 72W and then to 47W in turn in the second part.
The final part begins at one hour and 15 mins, and the power slowly dropped to almost
zero.
Figure 21:Charging curve of the Macbook pro 16”

It took around two hours and 3 mins for the Macbook to be fully charged.
The charger could charge the 16 inches MacBook Pro to 44% in half an hour.
And it could reach 79% in an hour, 100% in two hours and 3 mins.
45
As for the standby power test;

- The power consumption at 240V 50Hz was 0.231W, and 0.047W at 110V 60Hz,
which is about 2.023 KW.h and 0.412 KW·h in one year, respectively.
In the conversion efficiency test.
- The conversion efficiency varied from 78.38% to 91.70% at 240V 50Hz. The
conversion efficiency varied from 79.43% to 90.23% at 110V 60Hz.
- Besides 5V 3A, the average efficiency can basically reach 90%, which was
excellent among other desktop chargers in the market.
On testing the ripple voltage, lower ripple signifies better quality of the charger.
Firstly, with no-load.
- When the output was 5V 0A, the highest ripple was 32mVp-p.
- When the output was in these 7 states, the lowest ripple was 16mVp-p.
Then, the ripple was tested when loaded.
- When the output was in these 12 states, the highest ripple was 32mVp-p.
- When the output was 20V 5A at 240V 50Hz, the lowest ripple was 16mVp-p.
2.2.3 Results from simulation
Results from first simulation with LTC3864:
In the working of this project, the first simulation which featured a DC/DC converter
with power delivery in the circuit used the converter chip LTC3864.
46
Figure 22:LTspice simulation with LTC3864

The chip did not allow a very wide range of input voltage, the maximum it allowed was
60V. Thus, the simulation was run with an input voltage of 28 volts only which is
considered the nominal, and various parameters including efficiency were measured when
the output was at 5, 9, 15 and 20 volts.
The following table could be outlined using the data obtained.
Table 3: input and output power and efficiencies of the LTC3864
output
output power output current Power Output
(W) voltage (V) (A) Power in (W) Efficiency (%)
15 5 3 18.7797 11.7366 62.49
27 9 3 29.4162 21.9757 74.7
45 15 3 46.6645 38.286 82.04
60 20 3 62.0036 52.6566 84.92
It can be noticed that the efficiency ranged from around 62.49% at 5 volts output to a
maximum of around 84.95% at 20 volts.
47
The efficiency was considered to be too low and thus a different chip was chosen and used
to run another simulation with other optimizations done in order to increase the efficiency.
Results from second simulation with LTC7891:
The second chip utilized was the LTC7891. It was paired up with the power delivery circuit
as explained in the methodology to give the following LTspice schematic.
Figure 23: The simulation with LTC7891
LTC7891 accepts a very wide range of input voltage from 4V to 100V, thus the
simulation was run and analyzed at different levels on input voltage of 24, 32, 48, 60, 80
and 100V.
When the circuit was simulated, the following parameters were obtained
At 24 V;
Table 4: input and output power and efficiencies of the LTC3864 at input voltage of
24V
output
output current
output power voltage intended Power input Power Output
intended (W) intended (V) (A) obtained obtained (W) Efficiency (%)
48
15 5 3 15.6664 14.9818 95.63

27 9 3 27.8936 26.9988 96.79
45 15 3 46.0586 45.0044 97.71
60 20 3 60.8786 60.0032 98.56
At 32 V;
32V
output
output current
15 5 3 15.8933 14.9812 94.26
27 9 3 28.2344 26.9966 95.62
45 15 3 46.4000 45.0022 96.99
60 20 3 61.3624 60.0042 97.78
At 48 V;
48V
output
output current
15 5 3 16.2633 14.9697 92.046
27 9 3 28.7617 26.9867 93.83
45 15 3 47.2660 44.9863 95.18
60 20 3 62.4832 59.9833 96.00
At 60 V;
49
60V
output
output current
15 5 3 16.6504 14.9771 89.95
27 9 3 29.2814 26.9940 92.19
45 15 3 48.0669 44.9975 93.61
60 20 3 63.5492 59.9968 94.41
At 80 V;
80V
output
output current
15 5 3 17.2888 14.9753 86.62
27 9 3 30.1492 26.9961 89.54
45 15 3 49.1520 44.9968 91.55
60 20 3 64.8660 59.9936 92.49
At 100 V;
100V
output
output current
15 5 3 17.8821 14.9766 83.75
27 9 3 31.2835 26.9931 86.28
45 15 3 50.8684 44.9983 88.46
60 20 3 67.0785 59.9970 89.44
50
When considering their efficiencies only, the following table could be outlined;
Table 10: Efficiencies of the simulation of chip LTC7891
IN\OUT (%) 5V 9V 15 V 20 V
24 V 95.63 96.79 97.71 98.56
32 V 94.26 95.61 96.98 97.78
48 V 92.04 93.82 95.17 95.99
60 V 89.95 92.18 93.61 94.41
80 V 86.61 89.54 91.54 92.49
100 V 83.75 86.28 88.46 89.44
2.3 Results Discussion
2.3.1 Efficiency comparison;
It can be noticed that, the commercial had the efficiencies ranging from an average of
around 83% to maximum of around 91% with 240V AC input. When tested with 110V
AC input which is the nominal is multiple countries, the efficiencies would range from an
average of around 83% to a maximum of around 90%. These are efficiencies which can
be tolerated in power electronics devices especially when it is considered the charger has
to convert high voltage AC around 240V to mid level voltage DC around 30 to 60V, and
then a DC/DC converter picks up the voltage in order to lower it to an amount needed in
order to charge particular device that is plugged in. All these conversions utilize power
and reduce the efficiency further.
51
It can also be observed that the circuit board which features the DC/DC converter part
only had efficiencies ranging from 93% to 94%. These are also acceptable values for the
efficiencies since the board has less conversions it has to perform in order to provide the
necessary amount power needed to charge the device that is plugged in. however, this can
be improved with the use of better chips and materials.
The first simulation in the LTspice which featured the LTC3864 demonstrated low
efficiencies of around 62% when the output was around 15 Watts, and the efficiencies got
up to around 84% at higher output voltages. These efficiencies were considered to be too
low for a DC/DC converter.
The second simulation featuring LTC7891 was able to demonstrate much better
efficiencies which ranged from the lowest of 84% at extreme input voltages of 100V to
the highest values of efficiencies of around 98% at the nominal voltages of 24V and 32V.
The second simulation can be considered to be successful because of the following
reasons;
- First, the efficiencies obtained with the nominal input values or around 24 and 32
were very high and more than the commercial circuit board that is present in the
market. The efficiency from the circuit board was around 93% to 94%,
Meanwhile the efficiencies from the simulations were around 98% with an input
of 24V and an output of 20V at around 60W showing a significant improvement.
- Second, the parts of the simulation which had lower efficiencies of around 84%
features very high input voltages of up to 100V. Being able to accept a wide of
input from 4V to 100V is huge advantage since it implies that it can be used in a
number of cases including a DC house whose plug ins output only Direct current
to power the electronics in the house. DC houses are considered to be more
efficient especially when they are powered by renewable sources since they do
not have to convert the Dc power from solar or wind mills into Ac again for it to
power the house. It reduces the number of conversions between AC and DC
electricity and hence saving a lot of power. So, even with the lower efficiency of
the converter from the simulation, it can still be used with a better overall
efficiency when connected to a house which uses DC voltage only. High input
52
DC/DC converters like this will be of great importance in the near future when
renewable sources of energy and smart grids will highly be encouraged in order to
reduce the carbon emissions which lead to global warming.
Generally, the design was able to perform better than the commercial chargers from
UGREEN and the circuit board which featured just the DC/DC converter. The design has
an advantage of very good efficiencies especially at nominal voltages of use. The circuit
design simulated also has an advantage of allowing very high input voltages hence
increasing its usableness.
53
Chapter 3
Conclusion and Future Work
3.1 Conclusion
Having highly efficient converters which feature power delivery is the key to the
production of effective smartphone and laptop chargers. Gallium Nitride will allow these
highly powerful converters to be implemented in small and portable sizes that could
carried almost anywhere without jeopardizing their efficiencies and capabilities. This
project was able to successfully demonstrate how a converter which utilizes Gallium
nitride technology could be used to output high output up to 60 Watts of electricity in DC
format in order to fast charge digital consumer electronics. The fast charger utilizes
power delivery to ensure safety whenever it is connected to small digital devices like
smart watches and ear pods which cannot accept very high amount of power without
getting destroyed.
The project can be considered to be successful since the charger designed and
implemented was using Gallium nitride and it featured power delivery.
The charger simulated demonstrated very high efficiencies at nominal voltages. The
efficiencies where higher than the current commercial converters and chargers present in
the market. The results in this improved simulation could empower the on-going research
on gallium nitride and power delivery.
The charger simulated could also successfully allow very high range of input voltages
from 4V up to 100 V. The implementation of this high input DC/DC converter ensures
that it’s practicability in applications which feature high input DC voltage like in a DC
home. DC homes and smart grid technology are among the field which are heavily being
researched on in the electrical engineering field. They expect to revolutionize the way we
distribute and transport electricity from one place to another. These technologies are key
to the efficient implementation of renewable energy resources in our grid systems.
54
3.2 Future Work
Due to time limit and the knowledge of the researcher, the project may not have been
able to reach it full potential. Future research into high input converters which use
gallium nitride is expected to focus on the improvement of the efficiency especially when
input is at extreme values of around 100V. The efficiencies could be raised to reach the
levels similar to when the input voltage is around the nominal of around 24 and 32V.
Future research could also research on how to reduce the starting time and lower the
ripple voltage in the outputs so as to make the whole system more efficient. The starting
time in the simulation run in this project was around 0.45milliseconds. And the output
voltage was observed to be considerably high.
Future research could also work on the physical implementation of the simulated board
with multiple ports. PCB outline of the simulation could be designed and the physical
board could be manufactured in order to test how it performs in real life scenario. The
multiple ports will allow multiple devices to be charged at the same time.
The multiple ports could also be optimized to provide the same maximum power so that
the user could be able to blindly connect to any port and still utilize the charger’s full
potential. Current commercial chargers limit the maximum power output to one of the
USB-C ports. With this optimization, the all the ports could be able to output the
maximum power regardless of which port the device is connected to.
55
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Available:
https://www.ti.com/lit/wp/slyy109b/slyy109b.pdf?ts=1683281797915&ref_url
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Ga NFast Chargers

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FINAL YEAR PROJECT SAT - GaN Fast Chargers

Preprint · July 2023

The user has requested enhancement of the downloaded file.

Gallium Nitride (GaN) Fast charger

Student Name : CHRISTOPHER GASPAR MSIGWA

2.3 Results Discussion ....................................................................................................51

Table 10: Efficiencies of the simulation of chip LTC7891 ...............................................51

Figure 3: Different material properties of various semiconductors .....................................6

Figure 5: USB-C pin arrangement .......................................................................................9

Figure 6:Block diagram of UFP type-C USB 2.0 without PD...........................................17

Figure 9: Block diagram of USB type-C DRD USB 2.0 ...................................................21

Figure 12: Block diagram of USB 3.1 ...............................................................................25

Figure 13: general block diagram of the USB-C adapter ..................................................26

Figure 14: Expanded block diagram of the USB-C adapter ..............................................26

Figure 17: Circuit design simulated in LTspice .................................................................29

Figure 18: Typical application circuit of the LTC7891 .....................................................31

Figure 19: The POV of the circuit board purchased ..........................................................36

Figure 20: IP6538 Series product information...................................................................37

Figure 21:Charging curve of the Macbook pro 16” ...........................................................45

Figure 22:LTspice simulation with LTC3864 ...................................................................47

Figure 23: The simulation with LTC7891 .........................................................................48

Term Initial components of the term (examples are below)

1.1 Motivation, Aims and Objective

1.1.1 Problem Description:

Increase of digital electronics usage:

Fast Charging technology:

Silicon is a semiconductor material with a bandgap of 0.7 eV that is commonly used in

Figure 3: Different material properties of various semiconductors

Figure 5: USB-C pin arrangement

1.1.2 Aims and objective

At the conclusion of this project, our hope is to gain a more comprehensive

1.2 Literature Review

Gallium nitride (GaN) is a binary III-V direct bandgap semiconductor material. It is a

1.3 Industrial Relevance;

Three kinds of power flow are present in a USB connection:

Upstream-Facing Port USB 2.0 without USB PD:

Figure 6:Block diagram of UFP type-C USB 2.0 without PD

Figure 7: Termination of the CC logic pullup and pull down [11]

Downstream-Facing Port USB Type-C: USB 2.0 without USB PD:

Figure 8: block diagram of DFP USB type-C USB 2.0 without PD

Figure 9: Block diagram of USB type-C DRD USB 2.0

USB Type-C DRP/DRD: USB 2.0 with USB PD:

USB PD is needed in implementations with more complexity.

USB 3.1 Gen 1 (SuperSpeed) and Gen 2 (SuperSpeed+):

Figure 12: Block diagram of USB 3.1

2.1.1 LTspice Simulation:

Figure 13: general block diagram of the USB-C adapter

Figure 14: Expanded block diagram of the USB-C adapter

These signals in terms of voltage will go through a universal opamp to be amplified.

Signal from PD controller (V) Intended output voltage (V)

Below is the outline of the circuit as designed in the LTspice software.

Figure 17: Circuit design simulated in LTspice

voltages of up to 100 V. The LTC7891 addresses many of the common challenges

Figure 18: Typical application circuit of the LTC7891

Selection and calculation of external components in the simulation:

2. The value of the inductor.

4. Choose the resistor value for RSENSE.

and the other resistor Rb could calculated as;

2.2.1 The circuit board:

A circuit board which features a DC-DC converter was purchased in order to be

Figure 19: The POV of the circuit board purchased

3 chips from the board can be identified easily;