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System Structure
System Structure
System Structure
Control,
CPU Reset, and ROM RAM
Decode
I/O
Interface
Clock
Power
Supply To all modules
O/P Keyboard
Control,
Real Time Local Bus
CPU Reset, and ROM RAM
Clock Control Composite
Decode
Local Bus
Clock
Power
Supply To all modules
AB
DB
Chip Selects
Clock CB Dec.
Interrupt Inputs
Reset Int.
Power Supply
8 MHz
Before
2x74LS04
74LS14
Pierce Oscillator 1 K 10 n 1 K
After
GND
GND
Bus
CPU
Cont