LECTURE NOTES

PHYS 347 ELECTRONICS I

2023/2024
PHYS 347 Electronics I
 FET ( Field Effect Transistor)
Few important advantages of FET over conventional Transistors
1. Unipolar device i. e. operation depends on only one type
of charge carriers (h or e)
2. Voltage controlled Device (gate voltage controls drain
current)
3. Very high input impedance (109-1012 )
4. Source and drain are interchangeable in most Low-
frequency applications
5. Low Voltage Low Current Operation is possible (Low-
power consumption)
6. Less Noisy as Compared to BJT
7. No minority carrier storage (Turn off is faster)
8. Self limiting device
9. Very small in size, occupies very small space in ICs
10. Low voltage low current operation is possible in MOSFETS
11. Zero temperature drift of out put is possible
PHYS 347 Electronics I
PHYS 347 Electronics I
PHYS 347 Electronics I
The Junction Field Effect Transistor (JFET)

Figure: n-Channel JFET.

 SYMBOLS

Drain Drain
Drain

Gate Gate
Gate

Source Source
Source

n-channel JFET p-channel JFET

n-channel JFET
Offset-gate symbol
PHYS 347 Electronics I
PHYS 347 Electronics I
 Biasing the JFET

Figure: n-Channel JFET and Biasing Circuit.

PHYS 347 Electronics I
 Operation of JFET at Various Gate Bias Potentials

Figure: The nonconductive depletion region becomes broader with increased reverse bias.
(Note: The two gate regions of each FET are connected to each other.)
 Operation of a JFET

Drain
-
N

Gate
+ +
P P
-

-
N
+
Source
 Output or Drain (VD-ID) Characteristics of n-JFET

Figure: Circuit for drain characteristics of the n-channel JFET and its Drain characteristics.

Non-saturation (Ohmic) Region: V 

V V 
DS  GS P 
2I  V2 
The drain current is given by I  DSS 
V 
 V V  DS 
DS V2  GS P  DS 2 
P 
 

Saturation (or Pinchoff) Region: V  V  V 
DS  GS P
I  2 2
  V 
I  DSS
 V V    
V2    and I I 1  GS
DS 

GS P
 DS DSS 
 V 

P  P 
Where, IDSS is the short circuit drain current, VP is the pinch off voltage
Simple Operation and Break down of n-Channel JFET

Figure: n-Channel FET for vGS = 0.

 N-Channel JFET Characteristics and Breakdown
Break Down Region

Figure: If vDG exceeds the breakdown voltage VB, drain current increases rapidly.
Transfer (Mutual) Characteristics of n-Channel JFET

2 IDSS
 V 
I I  1  GS 
DS DSS 
 V 
 P 

VGS (off)=VP

Figure: Transfer (or Mutual) Characteristics of n-Channel JFET

Also called the Transconductance Curve of a n-channel JFET
 JFET Transfer Curve
This graph shows the value of ID for a given
value of VGS
 PHYS 347 Electronics I
What is an Operational Amplifier (Op Amp)
• It is an electronic unit that behaves like a
voltage-controlled voltage source.
• It is an active circuit element designed to
perform mathematical operations of addition,
subtraction, multiplication, division,
differentiation and integration.

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 PHYS 347 Electronics I
Op amp symbol and equivalent circuit
Symbol
Noninverting +VCC
input
Output
Inverting
input -VEE
Equivalent circuit
Rout
v1 vo

vd Rin A(v1-v2) vd = v2 – v1 and

v2 vo = Avd = A(v2 –v1)21
 PHYS 347 Electronics I
Ideal Op Amp
Operational amplifier (Op-amp) is made of
many transistors, diodes, resistors and
capacitors in integrated circuit technology.

Ideal op-amp is characterized by:

Infinite input impedance
Infinite gain for differential input
Zero output impedance
Infinite frequency bandwidth
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 PHYS 347 Electronics I
• Infinite voltage gain
– a voltage difference at the two inputs is magnified infinitely
– in truth, something like 200,000
– means difference between + terminal and  terminal is
amplified by 200,000!
• Infinite input impedance
– no current flows into inputs
– in truth, about 1012  for FET input op-amps
• Zero output impedance
– rock-solid independent of load
– roughly true up to current maximum (usually 5–25 mA)
• Infinitely fast (infinite bandwidth)
– in truth, limited to few MHz range
– slew rate limited to 0.5–20 V/s
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 PHYS 347 Electronics I

Typical ranges for op amp parameters

Parameter Typical range Ideal values

Open-loop gain, A 105 to 108  ∞

Input resistance, Ri 105 to 1013  ∞

Output resistance, Ro 10 to 100  0

Supply voltage, VCC 5 to 24 V

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 PHYS 347 Electronics I
Op-Amp “Golden Rules”
• When an op-amp is configured in any negative-
feedback arrangement, it will obey the following
two rules:
1. No current flows into either input terminals
of the op amp. That is, (I+ = I- = 0).
2. The non-inverting input voltage (V+) is equal
to the inverting input voltage (V-) of the op
amp. That is, (V+ = V-).

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 PHYS 347 Electronics I
Inverting op amp

• The most basic op amp circuit

• Uses negative feedback to stabilize the
closed-loop voltage gain
• Closed-loop voltage gain equals feedback
resistance divided by input resistance

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 PHYS 347 Electronics I
Inverting op amp
Analysis
Since the gain is assumed infinite, if Vo is finite the input voltage must
be zero. Hence
V  V  0

Since the input resistance of the op-amp is  its input current must
be zero, and hence
Now
I1  I2
Vo  V Vo  0 Vo
I1   
R1 R1 R1

Vi  V Vi  0 Vi
I2   
R2 R2 R2 27
 PHYS 347 Electronics I
• Analysis (continued)
Therefore, since I1 = -I2

or, rearranging Vo Vi

R1 R2

Vo R1
A 
Vi R2

• Here V– is held at zero volts by the operation of the circuit, hence the
circuit is known as a virtual earth circuit or virtual ground circuit.
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 PHYS 347 Electronics I

Non-inverting op amp

• A basic op amp circuit

• Uses negative feedback to stabilize the
closed-loop gain
• Closed-loop voltage gain equals the
feedback resistance divided by the input
resistance plus 1

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 PHYS 347 Electronics I
The non-inverting amplifier
R2

R1

Vout
Vin +

The negative feedback produces a virtual short.

A virtual short is a short for voltage but an open for current.

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 PHYS 347 Electronics I

• A non-inverting amplifier
Analysis
Since the gain is assumed infinite, if Vo is finite then the input voltage
must be zero. Hence
V  V  Vi
and hence, since V– = V+ = Vi
R2
and V  Vo
R1  R2
R2
Vi  Vo
R1  R2

Vo R1  R2
A 
Vi R2 31
 PHYS 347 Electronics I
• A unity gain buffer amplifier
Analysis
This is a special case of the non-inverting amplifier with R1 = 0 and
R2 = 
Hence

R1  R2 R1 0
A  1  1  1
R2 R2 
Thus the circuit has a gain of unity

• At first sight this might not seem like a very useful circuit, however it
has a high input resistance and a low output resistance and is
therefore useful as a buffer amplifier
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 PHYS 347 Electronics I
• A differential amplifier (or subtractor)
R2 i1
i1 R1
v  v v1 v
- vo
v
v2 +
v1  v R1
i1  R2
R1
v  v0
i1 
R2
v1  v v  v0

R2 R1 R2
v  v2
R1  R2 R2 R2
v1  v2 v2  v0
R1  R2 R  R2
 1
R1 R2
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 PHYS 347 Electronics I
• A differential amplifier (or subtractor)
R2 i1
R2 R2
v1  v2 v2  v0
R1  R2 R1  R2
 i1 R1 v
R1 R2 v1 -
v vo
v2 +
R2 R2 R22 R1
v0   v1  v2  v2
R1 R1  R2 R1  R1  R2  R2

R2 R2  R2 
v0   v1   1   v2
R1 R1  R2  R1 

R2
v0   v2  v1 
R1
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 PHYS 347 Electronics I
• A summing amplifier
vo  k1vi1  k 2 vi 2  k n vin

For node N，

vS 3 vS 2 vS 1 vo
  
R3 R2 R1 Rf

Rf Rf Rf
v o  ( v S1  vS 2  vS 3 )
R1 R2 R3
Let R1  R2  R3
Rf R f  R1
vo   (vS 1  vS 2  vS 3 )  vo  (vS1  vS 2  vS 3 )
R1
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 PHYS 347 Electronics I
• A differentiator amplifier

C i2
Vin 
i1 Vout
+

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 PHYS 347 Electronics I
• A differentiator amplifier
Since the inverting input is at virtual ground
dvin
i1  C
dt
vo
i2 
R
Applying KCL at the inverting input
i1+i2 = 0
dvin v o
 C  0
dt R
dvin
 v o  RC
dt
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 PHYS 347 Electronics I
• A integrator amplifier

R i2
Vin 
i1 Vout
+

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 PHYS 347 Electronics I
• A integrator amplifier
Since the inverting input is at virtual ground
v in
i1 
R
dv
i2  C o
dt
Applying KCL at the inverting input
i1+i2 = 0
dvo vin
 C  0
dt R
1
 vo  
RC  vin dt  v o (initial)
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