G.

MADEGOWDA INSTITUTE OF
TECHNOLOGY
Bharathinagara (K.M.Doddi), Maddur Taluk, Mandya Dist. – 571422
DEPARTMENT OF COMPUTER SCIENCE AND ENGINEERING

SUBJECT NAME: DIGITAL DESIGN AND COMPUTER ORGANISATION

(BCS302)
IA I Sem I (CSE/AIML)
Instructions:
Faculty SUSHEELA N Date 11/01/2024
Answer at least one full
Max. 10.00 to 11.30
40 question from each part Time
Marks AM

Q.
Mark CO’ Bloom
No
s S s Level
.
PART- A
Define Boolean function? Implement Boolean function F1 and F2

a)

1. 10 4 L2

b) Define Binary logic? Explain three basic logic operations with

example? (5m)
OR
a). List and justify the basic theorems of Boolean algebra(5M)
2. b). Define logic gate? Explain logic gates with symbols and input- 10 2 L3
output signals(waveform) (5M)

PART- B
3. Simplify the following Boolean functions using K-Map 10 3 L2
a) f=∑ (0,2,4,5,6,7,8,10,13,15)
b) F=BC D +ABC +ACD
c) f=π (0,1,2,3,5,7,13,15)
 G. MADEGOWDA INSTITUTE OF
TECHNOLOGY
Bharathinagara (K.M.Doddi), Maddur Taluk, Mandya Dist. – 571422
DEPARTMENT OF COMPUTER SCIENCE AND ENGINEERING

d) S=∑ (1,2,3,7.,8) +∑d (0,4,5)

OR
4. 10 2 L2
PART- C
Draw the logic diagram of the digital circuit specified by the
following Verilog description

5. 10 4 L3

OR
Write HDL for the combinational logic model

6. 10 4 L3

PART- D
7. Implement 10 4 L2
a) Half adder and subtractor(5m)
b) Full adder and subtractor with truth table and circuit
 G. MADEGOWDA INSTITUTE OF
TECHNOLOGY
Bharathinagara (K.M.Doddi), Maddur Taluk, Mandya Dist. – 571422
DEPARTMENT OF COMPUTER SCIENCE AND ENGINEERING

diagram(5m)
OR

8. Define Combinational circuit? Design a BCD-to-Excess 3 code 10 4 L3

converter circuit