Reg.

No: 21BCE0309
Student Name: ADITYA SANTOSH PANDE
Course Code: BECE204P
Slot & Semester L19+L20 FALL ~ 2023-24
Course Name: Microprocessors and Microcontrollers Lab
Program Title: TASK-2
Date of Exp. 24-01-20214
Date of Submission: 10-02-2024
Faculty : Mr. Vivek Rajpoot
ALGORITHM:
Set ACC.0 and ACC.1.
Copy ACC.1 to the carry flag C.
Invert the carry flag C.
Perform a bitwise AND operation between the inverted carry flag C and ACC.0.
Store the result in ACC.2.
Copy ACC.0 to the carry flag C.
Invert the carry flag C.
Perform a bitwise AND operation between the inverted carry flag C and ACC.1.
Perform a bitwise OR operation between the result and ACC.2.
Store the final result in ACC.2.
Copy ACC.D to the carry flag C.
Perform a bitwise AND operation between the carry flag C and ACC.1.
Store the result in ACC.3.

FLOWCHART:
+---------------------+
| Start |
|---------------------|
| SETB ACC.0 |
| SETB ACC.1 |
+----------+----------+
|
v
+---------------------+
| MOV C, ACC.1 |
|---------------------|
| Copy ACC.1 to C |
+---------------------+
|
v
+---------------------+
| CPL C |
|---------------------|
| Invert the carry C |
+---------------------+
|
v
+---------------------+
| ANL C, ACC.0 |
|---------------------|
| Bitwise AND with ACC.0|
+---------------------+
|
v
+---------------------+
| MOV ACC.2, C |
|---------------------|
| Store in ACC.2 |
+---------------------+
|
v
+---------------------+
| MOV C, ACC.0 |
|---------------------|
| Copy ACC.0 to C |
+---------------------+
 |
v
+---------------------+
| CPL C |
|---------------------|
| Invert the carry C |
+---------------------+
|
v
+---------------------+
| ANL C, ACC.1 |
|---------------------|
| Bitwise AND with ACC.1|
+---------------------+
|
v
+---------------------+
| ORL C, ACC.2 |
|---------------------|
| Bitwise OR with ACC.2|
+---------------------+
|
v
+---------------------+
| MOV ACC.2, C |
|---------------------|
| Store in ACC.2 |
+---------------------+
|
v
+---------------------+
| MOV C, ACC.D |
|---------------------|
| Copy ACC.D to C |
+---------------------+
|
v
+---------------------+
| AND C, ACC.1 |
|---------------------|
| Bitwise AND with ACC.1|
+---------------------+
|
v
+---------------------+
| MOV ACC.3, C |
|---------------------|
| Store in ACC.3 |
+---------------------+
|
v
+---------------------+
| End |
+---------------------+

OUTPUT:
ALGORITHM:
Set ACC.0 and ACC.1.
Copy ACC.1 to the carry flag C.
Perform a bitwise AND operation between the carry flag C and ACC.0.
Set ACC.3.
Perform a bitwise OR operation between the carry flag C and ACC.3.
Copy ACC.1 to the carry flag C.
Invert the carry flag C.
Invert ACC.3.
Set ACC.4.
Perform a bitwise AND operation between ACC.4 and ACC.3.
Invert ACC.3.
Copy ACC.5 to ACC.3.
End the program.
FLOWCHART:
+---------------------+
| Start |
|---------------------|
| SETB ACC.0 |
| SETB ACC.1 |
+----------+----------+
|
v
+---------------------+
| MOV C, ACC.1 |
|---------------------|
| Copy ACC.1 to C |
+---------------------+
|
v
+---------------------+
| ANL C, ACC.0 |
|---------------------|
| Bitwise AND with ACC.0|
+---------------------+
|
v
+---------------------+
| SETB ACC.3 |
|---------------------|
| Set ACC.3 |
+---------------------+
|
v
+---------------------+
| ORL C, ACC.3 |
|---------------------|
| Bitwise OR with ACC.3|
+---------------------+
|
v
+---------------------+
| MOV C, ACC.1 |
|---------------------|
| Copy ACC.1 to C |
+---------------------+
|
v
+---------------------+
| CPL C |
|---------------------|
| Invert the carry C |
+---------------------+
|
v
+---------------------+
| CPL ACC.3 |
|---------------------|
| Invert ACC.3 |
+---------------------+
|
v
+---------------------+
| SETB ACC.4 |
|---------------------|
| Set ACC.4 |
+---------------------+
|
v
+---------------------+
| ANL ACC.4, ACC.3 |
|---------------------|
| Bitwise AND with ACC.3|
+---------------------+
|
v
+---------------------+
| CPL ACC.3 |
|---------------------|
| Invert ACC.3 |
+---------------------+
 |
v
+---------------------+
| MOV ACC.3, ACC.5 |
|---------------------|
| Copy ACC.5 to ACC.3 |
+---------------------+
|
v
+---------------------+
| END |
+---------------------+
ALGORITHM:
Start at the MAIN label with the ORG directive at address 0000H.
Initialize Port P1 as input and Port P2 as output.
Check each min-term sequentially using jump instructions (JB) based on the condition of the
corresponding bit in Port P1.
If a condition is met, set the corresponding bit in Port P2 to 1.
Jump to the END_OF_PROGRAM label after processing all min-terms.
For each min-term, set the corresponding bit in Port P2 to 1.
Jump to the END_OF_PROGRAM label to prevent execution of other min-terms.
END_OF_PROGRAM label marks the end of the program.
Q4: WAP for the min-term expression F = ∑m(4,5,7,8,10,11,13,14) + ∑d (0,1,2)

Q5: Write and assemble a program to toggle all the bits of P0, P1, and P2 continuously by sending
55H and AAH to these ports. Put a time delay between the "on" and "off" states. Then using the
simulator, single-step through the program and examine the ports. Do not single-step through the time
delay call.

ALGORITHM:
Initialize the program counter at the origin address (ORG 0000H).
Inside an infinite loop labeled HERE:
Set the values of ports P0, P1, and P2 to 55H.
Call the DELAY subroutine.
Set the values of ports P0, P1, and P2 to 0AAH.
Call the DELAY subroutine.
Jump back to the HERE label.
DELAY subroutine:
Initialize register R1 to 0FFH.
Use a decrement and jump if not zero (DJNZ) loop to create a delay.
Return from the subroutine.

FLOWCHART:
+---------------------+
| Start |
|---------------------|
| Initialize P0, P1, P2|
| Set to 55H |
+----------+----------+
|
v
+---------------------+
| CALL DELAY |
|---------------------|
| Execute DELAY |
+---------------------+
|
v
+---------------------+
| Initialize P0, P1, P2|
| Set to 0AAH |
+---------------------+
|
v
+---------------------+
| CALL DELAY |
|---------------------|
| Execute DELAY |
+---------------------+
|
v
+---------------------+
| SJMP HERE |
|---------------------|
| Jump back to HERE |
+---------------------+

+---------------------+
| DELAY |
|---------------------|
| Initialize R1 to 0FFH|
+----------+----------+
|
v
+---------------------+
| AGAIN |
|---------------------|
| DJNZ R1, AGAIN |
+---------------------+
|
v
+---------------------+
| RET |
|---------------------|
| Return from SUB |
+---------------------+
Q6: WAP to get the Data from Port P1 and Send it to Port P2, Note: P1 is the input Port and P2 is
Output Port.

ALGORITHM:
Move the data from Port P1 to accumulator A using the MOV A, P1 instruction.
Move the data from accumulator A to Port P2 using the MOV P2, A instruction.
+---------------------+
| Start |
|---------------------|
| MAIN Label |
+----------+----------+
|
v
+---------------------+
| MOV A, P1 |
|---------------------|
| Read data from P1 |
+---------------------+
|
v
+---------------------+
| MOV P2, A |
|---------------------|
| Send data to P2 |
+---------------------+
|
v
+---------------------+
| SJMP MAIN |
|---------------------|
| Jump back to MAIN |