LAB REPORT 1

Date: 6th March 2024

Submitted By: M Muneeb Ullah

Tariq

Reg-No: FA22-BEL-016
“To Identify the Responses of Different Logic Gates using Hardware
and Software Platforms”
Objectives:

• To identify the Basic Boolean Functions of Logic Gates • To identify various ICs used in
Proteus Software and to perform Basic Functionality of Logic Gates
Lab Task 1:
(NAND Gate)

A
(A.B)’
B

Inputs
Outputs
A B
0 0 1
0 1 1
1 0 1
1 1 0
(AND Gate)

A.B
B

Inputs
Outputs
A B
0 0 0
0 1 0
1 0 0
1 1 1
(NOT Gate)

A’

Input
Output
A
0 1
1 0

(NOR Gate)
 A
(A+B)’
B

Inputs
Outputs
A B
0 0 1
0 1 0
1 0 0
1 1 0

(OR Gate)
 A

B
A+B

Inputs
Outputs
A B
0 0 0
0 1 1
1 0 1
1 1 1
(XOR Gate)

A
A B
B

Inputs
Outputs
A B
0 0 0
0 1 1
1 0 1
1 1 0