EED102: Semiconductor

Devices
Dr. Venkatnarayan Hariharan
Dept of Electrical Engg., Shiv Nadar Univ., Delhi NCR

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 Agenda
• Power Semiconductor Devices

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Semiconductor Devices
• Till now we have focused on diodes, BJTs and
MOSFETs targeted at low voltage applications
(upto mA currents and upto a few tens of volts)
• For high power applications (Amperes to kilo-
amperes (KA) of currents and/or several
hundreds of volts to kilo-volts (KV) of voltage),
specially designed semiconductor device
structures are needed. These are called power
semiconductor devices
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 Power Semiconductor Devices

Source:
http://www.egr.unlv.edu/~eebag/EE-442-642-Power%20switching%20devices%20fall14.pdf
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Power Semiconductor Devices
• We will briefly discuss two important power
devices in this course, viz. SCRs and IGBTs
• Thyristors
• SCR: Silicon Controlled Rectifier (ie. Shockley diode
additionally with current-based gate control)
• Diac: Diode for AC (bidi Shockley diode)
• Triac: Triode for AC (bidi SCR)
• IGBT: Insulated Gate Bipolar Transistor
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 PNPN Structure
• A PNPN structure (also called a Shockley diode) is a key
structure of several power semiconductor devices. The
device cross-section and circuit symbol is shown below,
along with I-V characteristics

Notice that
there are 3 PN
junctions, viz. :
𝑗1 , 𝑗2 , 𝑗3 . We will
return to these
later
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 PNPN Structure
• It has 3 states:
• Reverse blocking: When reverse voltage (𝑣 < 0) is applied, there is no current
• Forward blocking: When forward voltage below the forward breakdown voltage 𝑉𝑃 (0 <
𝑣 < 𝑉𝑃 ) is applied, there is no current
• Forward conducting: When forward voltage above the forward breakdown voltage is
applied (𝑣 > 𝑉𝑃 ), it turns on (after a quick snapback)

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 PNPN Structure
• A quick look at the device structure gives the impression that such a
structure can never conduct current (discounting reverse breakdown),
else it’d mean that some PN junction is conducting current opposite to
the overall direction of current, which is not possible!
• The solution to this paradox is BJT transistor action, which we’ll see next

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 Operation of PNPN Structure
• A PNPN structure can be viewed as a PNP
BJT and NPN BJT connected as shown
• This circuit can be easily analyzed using the
generalized biasing Ebers-Moll model, to
yield:
𝐼𝐶𝑆1 + 𝐼𝐶𝑆2 − 𝛼𝐹1 𝛼𝑅1 𝐼𝐶𝑆1 + 𝛼𝐹2 𝛼𝑅2 𝐼𝐶𝑆2
𝑖=
1 − 𝛼𝐹1 + 𝛼𝐹2
where the model parameters:
• 𝛼𝐹1 and 𝛼𝐹2 are the 𝛼 values of the 2
respective BJTs in the forward-active mode
• 𝛼𝑅1 and 𝛼𝑅2 are the 𝛼 values of the 2
respective BJTs in the reverse-active mode
• 𝐼𝐶𝑆1 and 𝐼𝐶𝑆2 are the reverse saturation
currents of the collector junctions of the 2 BJTs
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 Operation of PNPN Structure
• A key underpinning of the specific BJT action at play in a PNPN structure,
is the variation of a BJT’s 𝛼 (and 𝛽) with collector current 𝐼𝐶 :
• Our BJT analysis till now neglected 2nd order effects like recombination-
generation (RG) in the depletion region, injection from base to emitter, etc; and
piggybacked on PN junction theory developed using low-level injection kinetics.
All these assumptions led us to believe that 𝛼 and 𝛽 are independent of bias.
However, such 2nd order effects do play a role and it turns out in reality that 𝛼
and 𝛽 are optimal (high) only in a range of 𝐼𝐶 values. They degrade at very low
𝐼𝐶 and very high 𝐼𝐶 values. This is qualitatively explained due to the following
reasons (taking a PNP BJT as a use-case):
• For very low injection, the assumption about negligible RG in the depletion region is
especially invalid in the BE junction, where even low rates of recombination degrades
the emitter injection efficiency 𝛾
• For very high injection, as the concentration of excess holes injected into the base
becomes large, the matching replenished electron concentration in the base also
becomes large (that need to recombine with the injected holes), so much so that it can
exceed the background basal electron concentration in the base. This can result in
significant electron injection into the emitter, resulting again in a decrease in 𝛾
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 Operation of PNPN Structure
• As can be seen from the equation on slide 8, when 𝛼𝐹1 and
𝛼𝐹2 are very small such 𝛼𝐹1 + 𝛼𝐹2 ≪ 1, the current 𝑖 is of
the order of 𝐼𝐶𝑆1 + 𝐼𝐶𝑆2 , which itself is very small (since
they’re reverse saturation currents)
• But if there is some mechanism by which 𝛼𝐹1 + 𝛼𝐹2 → 1,
then that’ll make the denominator reduce and the overall
fraction increase. The closer it gets to 1, the higher 𝑖
becomes
• Note: The equation on slide 8 is valid as long as 𝛼𝐹1 + 𝛼𝐹2 < 1 and
loses validity when any of the BJTs get saturated, but yet it is
illustrative in predicting trends of current 𝑖 for minor excursions in
𝛼𝐹1 and 𝛼𝐹2 , after which a self-regenerative process takes over as
we’ll see
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 Operation of PNPN Structure
a) Forward-blocking state (0 <
𝑣 < 𝑉𝑃 ): Junctions 𝑗1 and 𝑗3
are forward biased (FB) while
junction 𝑗2 is reverse biased
(RB, notice wider depletion
region). Even though the PNP
transistor formed by 𝑗1 and 𝑗2
is thus in forward active
mode, the base current is
negligible, because there is no
way to replenish the electrons
in region 𝑛1 (other than
negligible EHP generated
within diffusion length 𝐿𝑛 of
𝑗2 ). Hence, there is no
transistor action and current
passing through 𝑗1 is
identically equal to the
reverse saturation current of
𝑗2 . Hence 𝑖 is very small

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b)
Operation of PNPN Structure
Forward-conducting state (𝑣 >
𝑉𝑃 and then snaps back): All 3
junctions are FB (notice the
narrow depletion regions), ie.
both BJTs saturated. This can
happen if by some mechanism
(we’ll soon see how), 𝛼𝐹1 +
𝛼𝐹2 → 1. Such an uptick in 𝛼
implies that many holes
injected from 𝑝1 across 𝑗1
survive and go across 𝑗2 into
𝑝2 . This helps feed/replenish
the recombination in 𝑝2 (for
the NPN xtor action) and to
support the injection of holes
into 𝑛2 . Similarly, the transistor
action of electrons injected
from 𝑛2 across 𝑗3 and collected
at 𝑗2 feeds/replenishes
electrons for recombination in
𝑛1 . Thus current increases.
That in turn increases 𝛼, and
the process is regenerative and
self-sustained
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 Operation of PNPN Structure
c) Reverse-blocking state (𝑣 < 0):
Junction 𝑗2 is FB while 𝑗1 and 𝑗3
are RB (notice wider depletion
regions). In this situation, even if
we model it as the 2 transistors
in forward active mode with the
central regions serving as the
respective emitters, it is clear
that there can be no current
(other than reverse saturation
currents). For instance, if NPN
emitter 𝑛1 is injecting electrons
across 𝑗2 into 𝑝2 , it’ll soon
exhaust electrons because being
an internal, non-contacted
region, it doesn’t have an
inexhaustible supply. Ditto
argument for the PNP emitter 𝑝2
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 Operation of PNPN Structure
• Triggering mechanism to increase 𝛼 (ie. switching from Fig (a) to Fig (b))
1. Voltage triggering: In Fig (a), much of the reverse voltage falls across 𝑗2 , due
to which a combination of both of the following happen:
a) Avalanche multiplication in the RB junction 𝑗2 . When the reverse voltage across 𝑗2 is
sufficiently high, it triggers avalanche EHP creation in 𝑗2 , which get swept appropriately
and serve to replenish carriers, as needed to kickstart the regenerative process
b) Base-width-narrowing: As the reverse voltage across 𝑗2 is increased, its depletion width
increases, thereby narrowing the bases of both transistors. This in turn improves 𝛼, and
kickstarts the regenerative process
2. 𝑑𝑣 Τ𝑑𝑡 triggering (undesirable!): When in forward-blocking state, if the FB
across a PNPN structure is suddenly increased, then the sudden change in
depletion width of the RB 𝑗2 and the accompanying sudden change in junction
capacitance as also the reverse bias voltage across that junction, results in a
significant displacement current, which can be large enough to elevate 𝛼𝐹1
and 𝛼𝐹2 enough to trigger it into forward conducting state

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Operation of PNPN Structure
• The minimum current 𝑖𝐴𝐾 that will cause the PNPN
structure to snapback and reach the forward-
conduction state as it switches from forward-blocking
state is called the latching current 𝐼𝐿
• Once in the forward conducting state, if the forward
current is sufficiently high, the PNPN structure is said
to be latched-on and can be turned-off only when
forward current falls below a threshold called the
holding current 𝑰𝑯
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 SCR: Silicon Controlled Rectifier
• Figure below shows the device structure (along with the
external gate circuit), circuit schematic, and I-V
characteristics

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 SCR: Silicon Controlled Rectifier
• In an SCR, the forward breakdown voltage 𝑉𝑃 is reduced using a gate
trigger current, so as to turn it on even at lower 𝑣𝐴𝐾
• Providing a gate current helps feed/replenish the majority carriers in the
NPN base, and helps kickstart the regenerative transistor action discussed
earlier
• Once in the forward conducting state, the SCR will turn-off only when
the forward current falls below the holding current. But some
carefully designed SCR's have a gate-turn-off (GTO) feature where the
gate terminal can be used to reverse the gate current (suck out
carriers) so that SCR goes into blocking state again
• It is not necessary to maintain the gate current once the SCR switches
to the conducting state; in fact, the gate essentially loses control of
the device after regenerative transistor action is initiated (the gate
current pulse height and duration is a specification in the device
datasheet)
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•
IGBT
Figure shows the device structure and circuit
schematic. I-V curves are somewhat similar
to a DMOS MOSFET
• It is a mixture of MOSFET and PNPN structures
• The IGBT’s MOSFET’s channel length is
determined not by the lithography of the gate
as in a conventional MOSFETs, but +
rather by
the suitable diffusion of 𝑝 and 𝑛 regions. Such
a MOSFET is called a double-diffused MOSFET
(DMOS)
• The main part of the IGBT is the 𝑛− region
(also called the epitaxial drift region), which
acts as the drain of the DMOS device. This is
generally a thick (≈ 50 𝜇𝑚) epitaxial region
with a low doping grown on a heavily doped
𝑝 substrate that forms the anode. The 𝑛−
+
region being lightly doped, can support a large
blocking voltage in the OFF state
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 IGBT Operation
• When the MOS gate is not triggered, the IGBT
works as a regular PNPN structure, with its
concepts of 𝑉𝑃 , 𝐼𝐿 and 𝐼𝐻
• Note: A forward conducting state in an untriggered
IGBT is normally avoided since it is usually desirable
to retain gate control. Thus, the device is usually
switched ON/OFF from/to the forward blocking
state by using the DMOS gate, with the channel
supplying/sucking-out
−
base recombination
electrons in the 𝑛 region
• When the MOS gate inverts its channel, it still
works as a MOSFET except that the MOSFET 𝐼𝐷𝑆
is hugely amplified by a PNP BJT’s 𝛽
• The equivalent circuit of a IGBT when it is in the
forward conducting state, is shown alongside
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 IGBT Operation With Gate On
• 𝐼𝑀𝑂𝑆 comprises electrons coming from
the cathode into the device along the
DMOS channel, where they serve to
recombine with the holes of the P+NP
transistor injected by the 𝑝+ substrate.
This recombination occurs in the 𝑛−
region, which is the base of the P+NP
transistor. Hence it constitutes the
base recombination current of the
P+NP transistor
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 IGBT Operation With Gate On
• The hole current injected from the 𝑝+ substrate (ie.
the P+NP emitter) meanwhile goes all the way to the
𝑝 collector, from where it gets injected to the n+
cathode (since in forward blocking state, junctions 𝑗1
and 𝑗3 are FB, see+
Fig (a) on slide 11). Thus, the total
current at the 𝑛 cathode comprises 𝐼ℎ hole current
as well as 𝐼𝑀𝑂𝑆 electron current. A simple circuit
analysis yields:
𝐼𝐴𝐾 = 1 + 𝛽𝑝𝑛𝑝 𝐼𝑀𝑂𝑆
• It is worth pondering: Since all junctions are FB, why is
there
+
no electron current in+the NPN transistor from
𝑛 cathode all−the way to 𝑝 substrate? Probably
because the 𝑛 region is lightly doped and too large in
volume, thereby reducing electron volume
concentration
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IGBT Summary
• The IGBT has the best features of MOSFETs and BJTs:
• Like a MOSFET, it has a high input impedance 𝑍𝑖𝑛 and low
input capacitance
• In the ON state, it has a low resistance 𝑅𝑂𝑁 and high
current-handling capability, like a BJT or an SCR
• In addition, because of its ease in turning off, the
IGBT is replacing the SCR as the power device of
choice

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 Optimal Applications – VCF Space
• How to read this
graphic:
• Power MOSFETs: Apt for
operation at low voltage
(V), low current (C) and
high frequency (F)
• Thyristors: Apt for
highest V and C, but
lowest frequency (due
to poor switching speed)
• IGBTs: Apt for moderate
V and C, with excellent
switching speed
Note: In the arena of power devices, a few hundred
volts are considered low voltages
Source:
http://www.egr.unlv.edu/~eebag/EE-442-642-Power%20switching%20devices%20fall14.pdf

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END OF LECTURE

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