Experiment # 5

Aim: Design of common bus, logic unit and shift unit.

Exercise#1: Design 4-bit common bus system using in-built block of multiplexer which shares

data to the output from four sources as given in the table. Use inputs and outputs as individual bits

and selection lines in the form of bus.

Exercise#2: Design 4-bit logic unit using in-built block of multiplexer which performs four logical
operations as given in the table. Use all inputs, outputs and selection lines in the form of bus.

Kriti Chhavi(221B165)
 Exercise#3: Design 4-bit shift circuit in using in-built block of multiplexer which performs four shift
operations as given in the table. Use all inputs, outputs and selection lines in the form of bus.

Experiment # 6

Exercise#1: Design 4-bit, 8-operations (given in Table) Arithmetic Logic Shift Unit as shown in block
diagram of figure-2 using initial carry (Cin) as LSB of the control lines of multiplexers. Use control signals
and input/output signals in the form of bus.

Arithmetic Unit :-

Kriti Chhavi(221B165)
Logical Unit :-

Shift Unit :-

ALSU :-

Experiment # 7
Kriti Chhavi(221B165)
Exercise#1: Design D and JK flip-flops with Enable, Clear and Preset control lines. Verify the designs with
in-blocks of these flip-flops.

D-FF :-

JK-FF :-

Exercise#2: Design and verify 4-bit bi-directional shift register using D flip-flops as sub-circuit.
Kriti Chhavi(221B165)
Exercise#3: Design and verify 4-bit universal shift register using in-built blocks

Kriti Chhavi(221B165)