MM - ASSIGNMENT-1

(ANSWERS)

1. Differentiate Microprocessor and Microcontroller

describing minimum any seven major differences.(7M)
Here's a breakdown of the key differences between microprocessors and
microcontrollers, highlighting at least seven crucial aspects:

1. Components:
 Microprocessor (µP): Contains only the Central Processing Unit (CPU). It

relies on external components for memory (RAM, ROM) and input/output

(I/O) functionalities.
 Microcontroller (µC): Integrates the CPU, memory (RAM, ROM), and I/O

peripherals onto a single chip. It's a self-contained system.

2. Complexity:
 Microprocessor: More complex due to external connections needed for

memory, I/O, and other components. This complexity can lead to bulkier
designs.
 Microcontroller: Simpler design as everything is on a single chip. This

makes them more compact and easier to implement.

3. Cost:
 Microprocessor: Generally less expensive due to simpler manufacturing

process (CPU only). However, the need for additional external components
can increase the overall system cost.
 Microcontroller: Slightly costlier due to the integration of multiple

functionalities on a single chip. But, since they eliminate the need for
external components, the overall system cost can be lower.

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4. Power Consumption:
 Microprocessor: Higher power consumption because of the complexity

and need to drive external components.

 Microcontroller: Lower power consumption due to simpler design and

focus on efficient embedded applications.

5. Processing Power:
 Microprocessor: Designed for high processing power to handle

demanding tasks in computers.

 Microcontroller: Optimized for lower processing power but sufficient for

specific tasks in embedded systems.

6. Applications:
 Microprocessor: Used in personal computers, workstations, and servers

where high performance is crucial.

 Microcontroller: Ideal for embedded systems like washing machines,

robots, toys, and industrial control systems where size, cost, and low power
consumption are important.
7. Scalability:
 Microprocessor: More scalable. You can upgrade components like RAM

or graphics card for increased performance.

 Microcontroller: Limited scalability as most components are integrated on

the chip. Upgrading usually involves replacing the entire microcontroller.

2. Explain the Pin Diagram of the 8085 microprocessor.(7M)

The 8085 microprocessor is a 40-pin Dual In-Line Package (DIP) integrated
circuit. Here's a breakdown of the different categories of pins and their
functionalities:

1. Address Bus (A0 - A15):

 16 unidirectional output pins (A0 being the least significant and A15 the
most significant)
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 Used to specify the memory address during read or write operations with
external memory devices.
2. Data Bus (AD0 - AD7):
 8 bidirectional pins (AD0 being the least significant and AD7 the most
significant)
 Used for transferring data between the microprocessor and memory or I/O
devices during read/write operations.
3. Control and Status Signals:
 READ (RD'): Active LOW signal indicating a read operation from memory
or Input/Output (I/O).
 WRITE (WR'): Active LOW signal indicating a write operation to memory or
I/O.
 HOLD: Input signal used by an external device to request the 8085 to halt
its operation temporarily.
 HLDA: Output signal acknowledging the HOLD request, indicating the
8085 is holding its operation.
 READY: Input signal used by external devices to indicate they are ready to
transfer data.
 ALE (Address Latch Enable): Positive-going pulse generated at the
beginning of a machine cycle to latch the lower order address onto the
address bus.
 S1 and S0 (Status signals): These two output signals indicate the type of
operation being performed (fetch, read, write, etc.) and are used for
additional control purposes.
 INT (Interrupt Request): Input signal used by external devices to request
an interrupt from the 8085.
4. Power Supply and Frequency:
 Vcc (+5V): Power supply voltage pin providing +5V for the
microprocessor's operation.

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 X1 and X2: Input pins for an external crystal (or RC/LC network) that sets
the internal clock frequency. The frequency is divided by 2 internally.
 CLK OUT: Output signal providing the system clock for devices connected
to the 8085.
5. Reset Signals:
 RESET IN: Active LOW signal used to reset the microprocessor to its initial
state.
 TRAP (non-maskable interrupt): Highest priority interrupt, cannot be
disabled by software.
6. DMA Signals (Optional):
 DREQ (DMA Request): Input signal used by a Direct Memory Access
(DMA) controller to request control of the data bus.
 DACK (DMA Acknowledge): Output signal acknowledging the DMA
request, granting control of the data bus to the DMA controller.
7. Serial Input/Output Ports (Optional):
 SID: Serial Input Data used for receiving serial data.
 SOD: Serial Output Data used for transmitting serial data.

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 3. Draw the functional block diagram of internal
architecture of IC 8085 and explain it’s working. (7M)
8085 Microprocessor Functional Block Diagram and Explanation

The 8085 microprocessor is an 8-bit processor with a classical von

Neumann architecture. Here's a breakdown of its functional blocks and how
they work together:

Blocks:
1. Arithmetic Logic Unit (ALU):
o Performs arithmetic (addition, subtraction, etc.) and logical (AND, OR, etc.)
operations on 8-bit data.
o Receives data from the accumulator and registers.
o Sends the results back to the accumulator or other registers.
2. Accumulator (A):
o An 8-bit register that holds the main data operand for ALU operations.
o Most frequently used register in the 8085.
3. General Purpose Registers (B, C, D, E, H, L):
o Six 8-bit registers used for temporary data storage and addressing.
o Registers B and C, D and E, and H and L can be paired to form 16-bit
register pairs (BC, DE, and HL) for memory addressing.
4. Program Counter (PC):
o A 16-bit register that keeps track of the memory address of the next
instruction to be fetched.
o Incremented by the control unit after each instruction fetch.
5. Stack Pointer (SP):
o A 16-bit register that points to the top of the Last In, First Out (LIFO) stack
in memory.
o Used for subroutine calls, interrupt handling, and temporary data storage.
6. Control Unit (CU):
o Decodes instructions fetched from memory by the PC.
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o Generates control signals to coordinate data flow between various units
and memory.
o Manages the overall execution flow of the program.

7. Instruction Register (IR):

o Holds the instruction currently being decoded by the control unit.

8. Data Bus (8-bit):

o Bi-directional bus for transferring data between registers, ALU, and

memory.

9. Address Bus (16-bit):

o Specifies the memory location for data transfer operations (read/write).

10. Input/Output (I/O) Unit:

o Manages communication with external devices through I/O ports.

o Transfers data between the processor and peripherals.

Working:
1. The program counter (PC) fetches an instruction byte from memory.
2. The instruction is loaded into the instruction register (IR).
3. The control unit decodes the instruction and generates control signals.
4. Based on the instruction, data operands may be fetched from memory or
registers using the address bus and data bus.
5. The ALU performs the required arithmetic or logical operation on the data.
6. The result is stored back in the accumulator or another register.
7. The program counter is updated to point to the next instruction, and the
cycle repeats.

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 4. Explain the following instruction with example. (4M)
1.ORI 32H
2. INX D
3. SBB B
1. ORI 32H
 Instruction: OR Immediate (ORI)
 Operation: Performs a logical OR operation between the Accumulator (A)
and an immediate operand (32H in this case).
 Example:
o Let's assume the initial value in the Accumulator (A) is 4AH (hexadecimal
for 74 in decimal).
o When ORI 32H is executed, the bitwise OR operation is performed
between A (4AH) and 32H:
A 4A (decimal: 74) 0100 1010 (binary)
32H 32 (decimal: 50) 0011 0010 (binary)
-------------------------------------------------------------
Result 7EH (decimal: 126) 0111 1110 (binary)

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o The result (7EH) is stored back in the Accumulator (A), replacing its
previous value.
2. INX D
 Instruction: Increment Register Pair (INX)
 Operation: Increments the 16-bit value stored in the DE register pair by 1.
 Example:
o Let's assume the initial value in the DE register pair is 2000H (hexadecimal
for 8192 in decimal).
o When INX D is executed, 1 is added to the DE register pair:
Initial DE: 2000H (decimal: 8192)
After INX D: DE = 2001H (decimal: 8193)
o The incremented value (2001H) is stored back in the DE register pair.
3. SBB B
 Instruction: Subtract with Borrow (SBB)
 Operation: Subtracts the content of register B from the Accumulator (A),
considering the Carry flag (CY) as a borrow.
 Example:
o Let's assume the initial values are:
 Accumulator (A): 5AH (decimal: 90)
 Register B: 3BH (decimal: 59)
 Carry flag (CY): 0 (not set)
o When SBB B is executed, the subtraction considers the borrow (CY):
Borrow (CY): 0 (not set)
A 5A (decimal: 90) 0101 1010 (binary)
-B 3B (decimal: 59) 0011 1011 (binary)
Borrow ----- (add 0 for no borrow)
----------------------------------------------------------------------------
Result 1F (decimal: 31) 0001 1111 (binary)
o The result (1FH) is stored in the Accumulator (A), replacing its previous
value.
o The Carry flag (CY) is set to 0 because the subtraction did not require
borrowing from the next higher-order bit.

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 5. Explain architecture of the 8051 microcontroller.(7M)
The 8051 microcontroller, a popular 8-bit device, has a Harvard
architecture and features elements like a central processing unit (CPU),
memory, and input/output (I/O) ports. Here's a breakdown of its key
architectural components:

CPU:
 Based on Reduced Instruction Set Computing (RISC) architecture for
efficiency.
 8-bit data bus for processing 8-bit data at a time.
 16-bit program counter to keep track of instructions in program memory.
 Single accumulator, a special register for storing data during operations.
Memory:
 Harvard architecture separates program and data memory.
 4KB of on-chip ROM (Read-Only Memory) to store program instructions.
(Some variants may have EPROM or Flash memory)
 128 bytes of on-chip RAM (Random-Access Memory) for data storage
during program execution.
 Special Function Registers (SFRs) within the first 128 bytes of RAM for
controlling peripherals like timers and I/O ports.
I/O Ports:
 Four 8-bit I/O ports (P0, P1, P2, and P3) for interfacing with external
devices.
 Each port can be individually configured as input or output.
 Port 1 has built-in pull-up resistors for input operations.
Other components:
 16-bit timers/counters for timing and pulse-width modulation tasks.
 Serial communication interface for data transmission and reception.
 Interrupt controller to handle events and prioritize tasks.

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 System Bus: A network connecting CPU, memory, I/O ports, and
peripherals using separate data, address, and control lines.

This architecture allows the 8051 to perform various control tasks in

embedded systems applications.

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