PERSONAL INFORMATION

Full Name (Full Name as in

DIVYANSHU ANGRAM
Pan card application) :
Date of Birth (DD-MM-YY) 14-07-2001

Permanent Address VILLAGE BAHLOLPUR POST BAHLOLPUR DISTRICT BULANDSHAHR

Temporary Address MNIT JAIPUR, JLN MARG MALVIYA NAGAR JAIPUR

Mobile contact number 8630374503

Home Contact number 8534048901

Email Address 2023PEV5327

EDUCATION
Post Graduate Degree Mtech College Name MNIT JAIPUR
(Mtech/M.E./M.Sc/MCA/MBA)

Branch VLSI DESIGN

CGPA (avg till last 9.00 (I SEM)
sem)
Current year & Sem (eg PG Start Date
1ST YEAR,2ND SEM 08/23
3rd year, 5th Sem) (MM/YY)
A GM/ID METHODOLOGY FOR DESIGNING COMMON SOURCE
AMPLIFIER BY USING 180 NM TECHNOLOGY
(Simulated this amplifier using Cadence Virtuoso and analyzed
different graphs like Id/w, gain, bandwidth, Gm/id vs Vgs.)
Project Details (if any) IMPLEMENTED 8-BIT CARRY LOOK-AHEAD ADDER USING VERILOG
(Fastest addition performed without taking the previous stage carry
input.)

Graduate Degree RAJKIYA ENGINEERING COLLEGE

Btech College Name
(Btech/B.E./B.Sc/BCA) (BANDA)
ELECTRICAL CGPA (avg till last
Branch 8.35
ENGINEERING sem)
Current year & Sem (eg Grad Start
08/2018
3rd year, 5th Sem) Date(MM/YY)
SMART LOCKING SYSTEM (PATENTED PROJECT)
PATENTED BY REPUBLIC OF SOUTH AFRICA
(A smart IoT-based security system, providing multi-layered security
for authorized users and remotely monitor the system to give access to
Project Details (if any) other unauthorized users after proper authentication.)
REAL TIME SIMULATION
(Collection of power requirements of a hostel during a season and
estimating the cost per unit of electricity by using the best resources of
electricity available.)
 UP Year of
10th (Percentage) Board Name
88.16 BOARD Passing 2016
UP Year of
12th (Percentage) Board Name
89 BOARD Passing 2018
Technical Certifications/Trainings/Skills
• Tools: Cadence virtuoso, Xilinx Vivado
• Hardware Description Language: Verilog
• Computer Programming Language: Basics of C
• Courses studied: Digital Electronics, Digital CMOS ICs.,
• Basics of STA

SCHOLARSHIPS/AWARDS/PUBLICATIONS/ACHIEVEMENTS
• Awarded with District Aligarh Ratna prize and “Medhavi Chhatra Puruskar” by UP Chief •
Minister for being topper of the Mathematics group in Class XII (2018).
• Top 5th student of my department in B.Tech.
• Research paper published on Smart Locking System based on Arduino and Raspberry Pi and
project patented.

Any Former Internship Experience/Prior Work Experience

• Coordinator of the Cultural Organizing Committee of the college
• Vice Chairperson of the IEEE student chapter (2020-2022)