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Combinational Digital Logic
Combinational Digital Logic
Combinational Digital Logic
+ Lecture 4
Combinational Logic
© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.
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Topics
• Adders
• Half Adder
• Full Adder
• Decoders
• Multiplexers
2
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Combinational Logic
X Our circuit
with X+Y•Z
Y
details
Z hidden
• This new “device” can now be used along with gates and other
devices in circuits. 3
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Combinational Logic
7
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Combinational Logic
X Sum
H/A
Y Carry 8
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Combinational Logic
X Sum Sum
X Sum X
H/A H/A
? Carry
Y
Y Carry
? Y Carry
Carry In
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Combinational Logic
• To determine how to
establish the value of the
carry we note from the
truth table
• Carry Out is 1 whenever
there is a Carry from either
the first part of the addition
OR the second part.
• We therefore generate the
Carry Out from the Full
Adder by OR’ing the Carry
from each Half Adder in
our circuit.
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Combinational Logic
X Sum Sum
X Sum X
H/A H/A
Y Y
Y Carry Carry
Carry In Carry
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Combinational Logic
This is a block
diagram for a
decoder.
If x = 0 and y = 1,
which output line
is enabled?
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Combinational Logic
I0 00 The value
I1 2-to4 01 on this wire
Active Hi will be 1 if
10
Decoder I0=1; I1=0
11
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Combinational Logic
S0 S1 Out
01 Out
4-Way 0 0 A OR B
MUX
0 1 B
10
1 0 NOT A
1 1 Sum(A,B)
1-bit f4(A,B)
11
Adder
S0 S1
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Combinational Logic
◼ An n-bit ALU can be made using n 1-bit
ALUs just as a n-bit Adder is made
4 4
◼ The block diagram at right is for a 4-bit
ALU Carry In 4 function F0
F1
◼ The slash and number beside each line ALU
says that the line really represents 4 wires
4
◼ The wires F0 and F1 are set to select one ZNCV
operation Out
◼ The Z, N, C,V wires output special status
information from the ALU at the end of the
operation
◼ For example the wire labeled C is the Carry
Out from the ALU
◼ The wire labeled V carries a 1 when there is a
2’s complement overflow
◼ We will discuss these status wires more when
we study micro-architectures.
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Combinational Logic
◼ Adders
◼ Half Adder
◼ Full Adder
◼ Decoders
◼ Multiplexers