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Chapter 2: Using Global Clock Resources

Global Clock Resources

The global clock resources consist of three connected components: GCLK Global Clock
input pads, BUFGMUX Global Clock Multiplexers, and Global Clock routing. See
Figure 2-1.

GCLK BUFGMUX
Pad Clocks
Global
DCM Routing

Double
Lines
UG331_c2_01_100209

Figure 2-1: Overall View of Clock Connections

The primary clock path is shown with bold lines, with a dedicated clock pad (GCLK)
driving a global clock buffer (BUFGMUX) that connects through global routing resources
to clock inputs on flip-flops and other clocked elements. The GCLK pads can be used as
general-purpose I/O, and include the LHCLK and RHCLK inputs described later. A DCM
can be inserted into the path between the clock pad and clock buffer to manipulate the
clock, or the DCM can acquire the clock signal from general-purpose resources. The
BUFGMUX can multiplex between two clock sources or be used as a simple BUFG clock
buffer. The clock buffer can only drive the clock routing resources, which in turn can only
drive clock inputs. However, clock inputs on flip-flops can also come from general-
purpose routing, although their use is not recommended due to higher skew.

Clocking Infrastructure
The detailed Spartan-3E and Extended Spartan-3A family clocking infrastructure is shown
in Figure 2-2.

46 www.xilinx.com Spartan-3 Generation FPGA User Guide

UG331 (v1.8) June 13, 2011