R

DCM Primitive

Table 3-6: DCM Connection Ports (Cont’d)

Functional Unit
Port Direction Description
DLL PS DFS
CLKFX Clock Synthesized clock output, controlled by the CLKFX_MULTIPLY 
Output and CLKFX_DIVIDE attributes. Always has a 50% duty cycle. If
the CLKFX or CLKFX180 clock outputs are used standalone, then
no clock feedback is required. See “Frequency Synthesizer
(CLKFX, CLKFX180),” and “Half-Period Phase Shifted Outputs.”
CLKFX_MULTIPLY
F CLKFX = F CLKIN • ---------------------------------------------------------
CLKFX_DIVIDE

CLKFX180 Clock Synthesized clock output CLKFX, phase shifted by 180° (appears 
Output to be an inverted version of CLKFX). Always has a 50% duty
cycle. If only CLKFX or CLKFX180 clock outputs are used on the
DCM, then no feedback loop is required. See “Frequency
Synthesizer (CLKFX, CLKFX180),” and “Half-Period Phase
Shifted Outputs.”
STATUS[0] Output Variable Phase Shift Overflow. Control output for “Variable Fine 
Phase Shifting.” The Variable Phase Shifter has reached its
minimum or maximum limit value. The limit value is either ±255
or a lesser value if the phase shifter reached the end of the delay
line. See “Variable Fine Phase Shifting,” page 123.
Note: This function is not supported in the Spartan-3E family.
In the Spartan-3 family, STATUS[0] also indicates overflow for a
fixed phase shift selection.

0 The Phase Shifter has not yet reached its limit value.
1 The Phase Shifter has reached its limit value.

STATUS[1] Output CLKIN Input Stopped Indicator. Available only when the CLKFB   
feedback input is connected. Held in reset until the LOCKED
output is asserted. Requires at least one CLKIN cycle to become
active. Never asserted if CLKIN never toggles.

0 CLKIN input is toggling.

1 CLKIN input is not toggling, even though the
LOCKED output might still be High. See
“Momentarily Stopping CLKIN”.

STATUS[2] Output CLKFX or CLKFX180 Output Stopped Indicator. See Frequency 

Synthesizer (CLKFX, CLKFX180).

0 CLKFX and CLKFX180 outputs are toggling.

1 CLKFX and CLKFX180 outputs are not toggling,
even though the LOCKED output might still be
High. See “Momentarily Stopping CLKIN”.

STATUS[7:3] Output Reserved

Spartan-3 Generation FPGA User Guide www.xilinx.com 75

UG331 (v1.8) June 13, 2011