Vishwajeet Singh (21104112)

Sanyam Arora (21104096)

Himanshu Kumar (21104045) Submitted to:-

Mehtab singh (2110458) Submitted to : Kumar
Dr. Kundan
Dr Kundan Kumar
Table of Contents
Abstract: ........................................................................................................................................................ 1
Introduction: ................................................................................................................................................. 3
Block Diagram of Arithmetic Logic Unit: ................................................................................................... 4
Methodology............................................................................................................................................. 5
Code: ......................................................................................................................................................... 6
Result: ..................................................................................................................................................... 18
Discussion: .............................................................................................................................................. 21
Limitations: ............................................................................................................................................. 22
Future scope : ......................................................................................................................................... 25
Conclusion: .............................................................................................................................................. 24

Reference: ................................................................................................................................................... 25
Abstract:

This project explores the creation and utilization of an Arithmetic Logic Unit (ALU) within the framework
of an 8086 Emulator. By thoroughly understanding the architecture of the 8086, identifying ALU
operations, and meticulously implementing control logic within the emulator environment, this
endeavor addresses challenges posed by the emulator's limited instruction set and the need for
emulation accuracy. Its significance lies in its educational value, providing practical insights into historic
architectures and fundamental principles of computer science. By surmounting the constraints of the
8086 Emulator, this project lays the groundwork for future developments in ALU design and
collaborative research endeavors. Its ultimate goal is to enhance comprehension of ALU functionality
and enrich the broader field of computer science and engineering.
Introduction:

The Arithmetic Logic Unit (ALU) is a fundamental component of a computer's central processing unit
(CPU) responsible for performing arithmetic and logic operations. The 8086 emulator is a software tool
that emulates the functionality of the 8086 microprocessor, providing a platform for understanding and
experimenting with ALU design principles in a simulated environment.
This report aims to provide a comprehensive examination of ALU design using the 8086 emulator. It will
delve into the fundamental principles of ALU design, the functionality of the 8086 emulator, and the
interconnection between the two.
EMULATOR

The 8086 Emulator stands as a virtual environment crafted to replicate the intricate workings of
the Intel 8086 microprocessor, offering users the ability to execute software designed for this
architecture on contemporary computing systems. Key features of the 8086 Emulator encompass a
spectrum of essential functionalities:

• Comprehensive Instruction Set Simulation

• Dynamic Memory Management Capabilities

• Emulation of Peripheral Devices

• Robust Debugger and Tracing Tools

• Seamless Integration with Development Environments

This emulation platform serves as a vital tool for software developers and enthusiasts alike,
facilitating exploration, experimentation, and analysis within the realm of legacy computing
architectures.
Block Diagram of Arithmetic Logic Unit:
Methodology

The basic methodology for designing an ALU using an 8086 Emulator involves following steps:

•Understanding 8086 Architecture: The familiarization with the architecture of 8086 microprocessor
helps in understanding how the CPU operates that will provide assistance to design ALU that integrates
seamlessly with processor.

•Identify ALU Operations: Determine the arithmetic and logical operations that the ALU needs to
support based on the requirements of your application.

•Design ALU Control Logic: Define the control logic for selecting and executing the appropriate
operation based on instruction opcode and operands which involves designing a Finite State Machine

•Implement ALU Operations: Write Code to implement each ALU operation using Assembly Language
Programming. For each operation, you will need to handle different operand types and produce correct
result based on the operation code.

•Test and Debug: Test each ALU operation thoroughly to ensure accuracy and debug any issues
encountered during testing to refine the ALU Implementation.

•Integrate with Emulator: Integrate ALU implementation into 8086 Emulator environment, ensuring
compatibility

with emulator’s memory layout, instruction execution flow, and register usage

•Documentation and Maintenance.

Code:

; You may customize this and other start-up templates;

; The location of this template is c:\emu8086\inc\0_com_template.txt

INCLUDE EMU8086.INC ;Including Library

org 100h

.data ;Data Segment

msg_intro db ' 1. Addition', 0dh,0ah, ' 2. Subtration', 0dh,0ah, ' 3. Multiplication', 0dh,0ah, ' 4. Division',
0dh,0ah, ' 5. Negation', 0dh,0ah, ' 6. OR', 0dh,0ah, ' 7. AND ', 0dh,0ah, ' 8. XOR', 0dh,0ah, ' 9.
NOT',0dh,0ah, ' 10. Modulus',0dh,0ah, ' 0. EXIT', '$'

msg_A db 'The SUM of two Numbers = $', 0dh,0ah ;Printing Strings

msg_S db 'The SUBTRACTION of two Numbers = $', 0dh,0ah

msg_M db 'The MULTIPLICATION of two Numbers = $', 0dh,0ah

msg_D db 'The DIVISION of two Numbers = $', 0dh,0ah

msg_N db 'The NEG numue of Number = $', 0dh,0ah

msg_OR db 'The OR operation of two Number = $', 0dh,0ah

msg_AND db 'The AND operation of two Number = $', 0dh,0ah

msg_XOR db 'The XOR operation of two Number = $', 0dh,0ah

msg_NOT db 'The NOT of Number = $', 0dh,0ah

msg_MD db 'The MODULUS of Two Numbers = $', 0dh,0ah

cont db 10,13,'Do you want to continue? $'

bye db ' Exit $'

num1 dw ? ;Uninitialize

num2 dw ? ;Uninitialize

res dw ?

agn dw ?

.code ;Code Segment

MAIN PROC

MOV AX, @data

MOV DS, AX
Start: ;Start Lable

print ' Arithmatic and Logical Operations '

printn ;New Line

printn

MOV AH,9

MOV DX, OFFSET msg_intro

INT 21h

printn

printn

print 'Choose the Operation: '

CALL scan_num

printn

printn

CMP CX, 0

JE _Bye ;Jumps to Exit Func if input is equal to 0

CMP CX, 1

JE Addition ;Jumps to Addition Func if input is equal to 1

CMP CX, 2

JE Subtraction ;Jumps to Substraction Func if input is equal to 2

CMP CX, 3

JE Multiplication ;Jumps to Multiplication Func if input is equal to 3

CMP CX, 4

JE Division ;Jumps to Division Func if input is equal to 4

CMP CX, 5

JE Negation ;Jumps to Absolute Func if input is equal to 5

CMP CX, 6

JE _OR ;Jumps to _OR Func if input is equal to 6

CMP CX, 7

JE _AND ;Jumps to _AND Func if input is equal to 7

CMP CX, 8
JE _XOR ;Jumps to _NOT Func if input is equal to 8

CMP CX, 9

JE _NOT ;Jumps to _NOT Func if input is equal to 9

CMP CX, 10

JE Modulus ;Jumps to Modulus Func if input is equal to 10

;FUNCTIONS

Addition: ;Addition Func

print ' --Addition--'

printn

printn

print 'Enter First Number: '

CALL scan_num ;First no. input

MOV num1, CX ;Moving first no. to num1

printn ;New Line

print 'Enter Second Number: '

CALL scan_num ;Second no. input

MOV num2, CX ;Moving second no. to num2

printn

MOV AX, num1 ;Moving num1 to AX reg

ADD AX, num2 ;Adding AX to num2

MOV res, AX ;Storing AX in res

printn

MOV AH,9

MOV DX, OFFSET msg_A ;Displaying Message

INT 21h ;Calling Interrupt

MOV AX, res ;Moving res to AX

CALL print_num ;Printing AX reg

JMP Con ;Goes to Con Func

Subtraction: ;Subtraction Func

print ' --Subtraction--'

printn

printn

print 'Enter First Number: '

CALL scan_num ;First no. input

MOV num1, CX ;Moving first no. to num1

printn ;New Line

print 'Enter Second Number: '

CALL scan_num ;Second no. input

MOV num2, CX ;Moving second no. to num2

printn

MOV AX, num1 ;Moving num1 to AX reg

SUB AX, num2 ;Subtracting AX with num2

MOV res, AX ;Storing AX in res

printn

MOV AH,9

MOV DX, OFFSET msg_S ;Displaying Message

INT 21h ;Calling Interrupt

MOV AX, res ;Moving res to AX

CALL print_num ;Printing AX reg

JMP Con ;Goes to Con Func

Multiplication: ;Multiplication Func

print ' --Multiplication--'

printn

printn

print 'Enter First Number: '

CALL scan_num ;First no. input

MOV num1, CX ;Moving first no. to num1

printn ;New Line

print 'Enter Second Number: '

CALL scan_num ;Second no. input

MOV num2, CX ;Moving second no. to num2

printn

MOV AX, num1 ;`Moving num1 to AX reg

MUL num2 ;Multiplying AX with num2

MOV res, AX ;Storing AX in res

printn

MOV AH,9

MOV DX, OFFSET msg_M ;Displaying Message

INT 21h ;Calling Interrupt

MOV AX, res ;Moving res to AX

CALL print_num ;Printing AX reg

JMP Con ;Goes to Con Func

Division: ;Division Func

print ' --Division--'

printn

printn

print 'Enter First Number: '

CALL scan_num ;First no. input

MOV num1, CX ;Moving first no. to num1

MOV AX, num1 ;Moving num1 to AX reg

printn ;New Line

print 'Enter Second Number: '

CALL scan_num ;Second no. input

MOV num2, CX ;Moving second no. to num2

MOV BX, num2

printn

CMP BX, 0 ;if divisor = 2

JE Error ;overflow

MOV DX, 0 ;Moving 0 in DX to avoid overflow

DIV BX ;Dividing AX with num2

MOV res, AX ;Storing AX in res

printn

MOV AH,9

MOV DX, OFFSET msg_D ;Displaying Message

INT 21h ;Calling Interrupt

MOV AX, res ;Moving res to AX

CALL print_num ;Printing AX reg

JMP Con ;Goes to Con Func

Negation: ;Negation Func

print ' --Negation--'

printn

printn

print 'Enter Number: '

CALL scan_num ;First no. input

MOV num1, CX ;Moving first no. to num1

printn ;New Line

MOV AX, num1 ;Moving num1 to AX reg

NOT AX ;Taking Neg of AX

MOV res, AX ;Storing AX in res

printn

MOV AH,9

MOV DX, OFFSET msg_N ;Displaying Message

INT 21h ;Calling Interrupt

MOV AX, res ;Moving res to AX

CALL print_num ;Printing AX reg

JMP Con ;Goes to Con Func

Modulus:
print ' --Modulus--'

printn

printn

print 'Enter First Number: '

CALL scan_num ;First no. input

MOV num1, CX ;Moving first no. to num1

MOV AX, num1 ;Moving num1 to AX reg

printn ;New Line

print 'Enter Second Number: '

CALL scan_num ;Second no. input

MOV num2, CX ;Moving second no. to num2

MOV BX, num2

printn

MOV DX, 0 ;Moving 0 in DX to avoid overflow

DIV BX ;Dividing AX with num2

MOV res, DX ;Storing AX in res

printn

MOV AH,9

MOV DX, OFFSET msg_MD ;Displaying Message

INT 21h ;Calling Interrupt

MOV AX, res ;Moving res to AX

CALL print_num ;Printing AX reg

JMP Con ;Goes to Con Func

_OR: ;OR Func

print ' --Binary OR--'

printn

printn

print 'Enter First Number: '

CALL scan_num ;First no. input

MOV num1, CX ;Moving first no. to num1

printn ;New Line

print 'Enter Second Number: '

CALL scan_num ;Second no. input

MOV num2, CX ;Moving second no. to num2

printn

MOV AX, num1

OR AX, num2

MOV res, AX

printn

MOV AH,9

MOV DX, OFFSET msg_OR ;Displaying Message

INT 21h ;Calling Interrupt

MOV AX, res

CALL print_num ;Prints on screen

JMP Con

_AND: ;AND Func

print ' --Binary AND--'

printn

printn

print 'Enter First Number: '

CALL scan_num ;First no. input

MOV num1, CX ;Moving first no. to num1

printn ;New Line

print 'Enter Second Number: '

CALL scan_num ;Second no. input

MOV num2, CX ;Moving second no. to num2

printn

MOV AX, num1

AND AX, num2

MOV res, AX

printn

MOV AH,9

MOV DX, OFFSET msg_AND ;Displaying Message

INT 21h ;Calling Interrupt

MOV AX, res

CALL print_num ;Prints on screen

JMP Con

_XOR: ;XOR Func

print ' --Binary XOR--'

printn

printn

print 'Enter First Number: '

CALL scan_num ;First no. input

MOV num1, CX ;Moving first no. to num1

printn ;New Line

print 'Enter Second Number: '

CALL scan_num ;Second no. input

MOV num2, CX ;Moving second no. to num2

printn

MOV AX, num1

XOR AX, num2

MOV res, AX

printn

MOV AH,9

MOV DX, OFFSET msg_XOR ;Displaying Message

INT 21h ;Calling Interrupt

MOV AX, res

CALL print_num ;Prints on screen

JMP Con
_NOT: ;NOT Func

print ' --Binary NOT--'

printn

printn

print 'Enter Number: '

CALL scan_num ;First no. input

MOV num1, CX ;Moving first no. to num1

printn ;New Line

MOV AX, num1

NOT AX

MOV res, AX

printn

MOV AH,9

MOV DX, OFFSET msg_NOT ;Displaying Message

INT 21h ;Calling Interrupt

MOV AX, res

CALL print_num

JMP Con

Error:

printn

print 'Cannot be divided by 0. '

printn

print 'Undefined Math Error'

printn

printn

JMP Division

Con: ;Continue Func

printn

MOV AH,9
MOV DX, OFFSET cont ;Displaying Message

INT 21h ;Calling Interrupt

print '(Yes = 1 / No = 0) : '

CALL scan_num ;Enter 1 for Yes and 0 for No

MOV agn, CX

printn

printn

CMP agn, 1

JE Start ;Jumps to Start Func if input is equal to 1

CMP agn, 0

JE _Bye ;Jumps to Bye Func if input is equal to 0

printn

_Bye: ;EXIT Func

printn

printn

MOV AH,9

MOV DX, OFFSET bye ;Displaying Message

INT 21h

MAIN ENDP

DEFINE_SCAN_NUM

DEFINE_PRINT_NUM

DEFINE_PRINT_NUM_UNS

END main

HLT ;Halting

ret ;Return
Results:

1. Addition:

2. Subtraction:
 3. Multiplication:

4. Division:
 5. OR 6. AND

7. TRAFFIC LIGHT
DISCUSSION:
The 8086 microprocessor represents a legacy architecture characterized by its distinctive
features and limitations. Crafting an ALU within the confines of this architecture demands a
profound understanding of its complexities. It entails navigating segmented memory, a
constrained instruction set, and diverse addressing modes, presenting both challenges and
intellectual opportunities.

While the 8086 Emulator serves as a valuable platform for ALU development and testing, it also
opens avenues for the incorporation of contemporary tools and methodologies. Leveraging
high-level programming languages for prototyping and testing can expedite the development
process.

Furthermore, it is essential to consider the compatibility and adaptability of the ALU design
across various 8086 emulator implementations. Although the fundamental architecture of the
8086 remains standardized, individual emulators may exhibit slight discrepancies in behaviour
or feature support. Designing the ALU with compatibility in mind ensures seamless integration
into diverse emulator environments, minimizing the need for extensive modifications.
LIMITATIONS:

• Restricted Instruction Set and Segmented Memory Model: The constrained instruction set imposes
limitations on the variety of operations the ALU can perform, often necessitating optimization efforts to
achieve desired functionality. Additionally, the segmented memory model introduces complexities in
memory access, adding overhead and hindering the efficiency of memory-intensive ALU operations.

• Resource Scarcity: Within the 8086 architecture, scarcity of resources such as registers, memory, and
processing capabilities presents significant challenges to ALU design and implementation.

• Emulation Fidelity: While 8086 Emulators endeavor to faithfully replicate the behavior of the original
hardware, discrepancies or limitations in emulation accuracy may arise, impacting the reliability of ALU
operations.

• Performance Bottlenecks: Overhead associated with emulation, latency in memory access, and other
performance constraints can impede the speed and efficiency of ALU operations, constraining the
scalability of the design.
FUTURE SCOPE:
• While the 8086 architecture is characterized by a limited instruction set, future advancements may
entail expanding the instruction set to accommodate additional operations and functionalities.

• Exploring hardware acceleration methods and coprocessing architectures can significantly enhance the
performance and efficiency of the ALU design. Integration of the ALU with specialized hardware
accelerators, such as FPGA-based coprocessors or GPU accelerators, has the potential to optimize
compute-intensive tasks and enhance overall system performance.

• Implementing parallelism and vectorization techniques within the emulator environment can enable
the ALU to process multiple data elements concurrently, resulting in substantial speed improvements
for computation-intensive operations.

• The ALU design developed within the 8086 Emulator framework serves as a robust foundation for
further exploration and experimentation in computer architecture, digital logic design, and
microprocessor systems research.
CONCLUSION:
In conclusion, crafting an Arithmetic Logic Unit (ALU) within the framework of an 8086 emulator
presents both challenges and rewards, offering profound insights into computer architecture, digital
logic design, and microprocessor systems. This endeavor empowers developers with hands-on
experience, immersing them in legacy architectures and reinforcing fundamental computing concepts.

Despite the 8086's classification as outdated, the enduring principles and concepts inherent in its design
retain relevance in contemporary computing landscapes. Creating an ALU under the constraints of the
8086 emulator environment cultivates creativity, sharpens problem-solving skills, and nurtures critical
thinking abilities applicable to a broad spectrum of computational tasks.
References

• https://github.com/sasaber/alu- assembly/blob/master/CS47_proj_alu_logical.asm

• https://github.com/ibrahimansari/MIPS-ALU- Implementation

• https://github.com/Haseeeb21/Calculator- Assembly/blob/main/Calculator.asm

• https://github.com/yousefkotp/8086-Assembly-Projects

• https://github.com/Mati365/ts-c-compiler