MPI PartA ComprehensiveExam 2020

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siit2024 Microprocessors and Interfacing Exam - Part A Microprocessors and Interfacing Exam - PartA 1. Email address * 2. Name 3. ID Number 4, 1. The- ---- flag selects either the increment or decrement mode for 3 points the Dl and/or SI registers during string instructions. Mark only one oval. Auxiliary D carry direction sign parity hitpssldocs. google. comvformsdwl8i2t1ajFARJWPhoPUNSQgxT2cMNPZUBN3e3 XVedt syw2021 Mleroprocessors an interfacing Exam - Part A 5. 2. Identify the addressing mode used in the instruction, MOV [BX], CL 3 points Mark only one oval. ) Register indirect OD Register Direct () Indexed -) Immediate 6. 3. The contents of the destination register or destination memory location 3 points change for all instructions except ---- and ----- instructions. Mark only one oval. CMP, INT cop, TEST (Test, INT ©) emp, sus 7. 4, IfBL= 12H and DL = 02H and when XADD BL, DL instruction is executed, 3 points. the BL register contains the value ----- and DL will have the value ~ 8. 5. The instruction -: is a combination of a decrement CX and the JNZ 3 points conditional jump. 9. 6. The instruction -------- performs a far CALL except that it not only pushes 3 points CS and IP onto the stack, but also pushes the flags onto the stack. hitpssldocs. google. comvformsdwl8i2t1ajFARJWPhoPUNSQgxT2cMNPZUBN3e3 XVedt 218 siit2024 10. n 12, Microprocessors ang Interfacing Exam - Part A 7. Which mode of operation of programmable interval used to generate a square wave? er 8253/8254 is Mark only one oval. (CD Mode 0 ) Mode 1 —) Mode 2 ( Mode 3 8, Which of the counters of 8253 are up counters? Mark only one oval. counter 0 Counter 1 D counter 2 (None of these 9. What is the size of data buffer that interfaces the internal circuit of 8253 to Microprocessor system bus? Mark only one oval. adits CO spits ©) 12 bits ©) 16 bits hitpssdocs. google comvformsewl8iZt1ajFARJWPhaPUNSOgxT2cMNPZUBN3e3 XVedt 3 points 3 points 3 points as siit2024 13, 14, 15, 16, Microprocessors ang Interfacing Exam - Part A 10. After the data are stored by a PUSH, the contents of the SP register- 3points o--= by 2. Mark only one oval. © mnerement ) decrement No change (None of the above 11. When the stack area is initialized , we need to load both the: 3points register and register 12. When NEG CH instruction is executed, the CH is 3points Mark only one oval. (—) One's complemented (—) Two's complemented Negated C_) Cleared 18. The pin activates external data bus buffers in 8086. 3points Mark only one oval. ae —) veN © sre (CO HLDA hitpssdocs. google comvformsewl8iZt1ajFARJWPhaPUNSOgxT2cMNPZUBN3e3 XVedt 46 siit2024 Microprocessors an¢ Interfacing Exam - Part A 17. 14. Ifa segment register contains 3000H, and the last address is t address of the segment points 18. 15. The instruction -: result into a BCD result. follows the ADD or ADC instruction to adjust the 3 points Mark only one oval. das C DAA This content is neither cteated nor endorsed ty Google. hitpssldocs. google. comvformsdwl8i2t1ajFARJWPhoPUNSQgxT2cMNPZUBN3e3 XVedt

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