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Topic-II

8086 Microprocessor & it’s

Architecture

T1. Barry B. Brey, The Intel Microprocessors. Pearson, Eight Ed. 2009. Chapter 2
R1. Douglas V Hall, Microprocessor and Interfacing, TMH, Second Edition. Chapter 2

Lecture 4

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16-bit and 32-bit Microprocessor

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Variations of 8086 - 8088

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Characteristics of the x86 family

• CISC
• Instructions are broken up into micro-operations
• Complex instruction decoder

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8086 Microprocessor

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Bus Interface Unit (BIU)

• Handles all transfers of data and addresses on the buses for
the execution unit

Execution Unit (EU)

• Actual function is performed here

- instructs BIU from where to fetch an instruction
- decodes it,
- executes it

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8086 Microprocessor

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Block diagram of 8086

Address bus (20 bits)
AH AL
General purpose
BH BL register 
CH CL
Execution Unit
DH DL
(EU) Data bus
SP CS (16 bits)
Segment
BP register DS
SI SS
DI ALU Data bus ES
(16 bits)
IP

Bus
control
ALU Instruction Queue External bus
EU
control
Flag register
Bus Interface Unit (BIU)
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x86 -ISA
Register Organisation

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8086 Register Organization

• General purpose Registers.
- AX, BX, CX, DX

• Segment Registers.
- CS, DS, SS, ES

• Pointer and Index Registers.

- IP, BP, SP
-SI, DI

• Flag Registers
-FLAGS

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Function wise 8086 Register

organization

• Multipurpose Registers.
- AX, BX, CX, DX, BP, DI, SI

• Special Purpose Registers.

- IP, SP, FLAGS

• Segment Registers.
- CS, DS, SS, ES

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8086 Register organization

IP : INSTRUCTION POINTER

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General Purpose Registers

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Pointer and Index Registers

IP : INSTRUCTION POINTER

SP Stack Pointer

BP Base Pointer
Pointer and
Index Group
SI Source Index

DI Destination Index

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Pointer and Index Registers

Pointer (IP, BP, SP): Contains offset within a particular segment
for forming physical address.
IP contain offset within Code segment.
BP and SP contain offset with Stack segment.

Index (SI, DI) : Used as general purpose as well as contain offset

with Data and Extra segment respectively.

Index registers are useful for string manipulation.

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16 bit Flag Register in 8086

 Flag register contains information reflecting the current status of a
microprocessor. It also contains information which controls the
operation of the microprocessor.
15 0
   OF DF IF TF SF ZF  AF  PF  CF

 Control Flags  Status Flags

CF: Carry flag
IF: Interrupt enable flag PF: Parity flag
DF: Direction flag AF: Auxiliary carry flag
TF: Trap flag ZF: Zero flag
SF: Sign flag
OF: Overflow flag 3-16
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Flags

Conditional/ status Flags: They are set/reset by the processor to indicate

certain condition that arises during the execution of a program. (the lower
byte of 16 bit along with overflow flag.)

- Reflects the result of operation performed by CPU.

Control Flags: they are deliberately set/reset by the programmer to control

certain operations of the processor. (higher byte of excluding overflow)

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Status Flags

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Control Flags

IF: Interrupt enable flag (If IF is set, IF=1 CPU will

serve the interrupts from external device)

DF: Direction flag used for string manipulation of

instructions. (If DF is set, DF=1, string will process
from highest towards lowest address) (opposite of little
endian format)

TF: Trap flag (If TF is set, TF =1, processors enter

into single step execution ) This flag normally is used
for debugging of program.
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End of Lecture 4

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