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Lecture 5 25th Jan 2024
Lecture 5 25th Jan 2024
Topic-II
T1. Barry B. Brey, The Intel Microprocessors. Pearson, Eight Ed. 2009. Chapter 2
R1. Douglas V Hall, Microprocessor and Interfacing, TMH, Second Edition. Chapter 2
Lecture 5
Segment Registers
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Stack Segment
The CPU use the stack for temporarily
storing important data. For example the
content of register that will be require
at later stage.
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3
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3-29
Segmentation
3-30
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Programmer’s Model
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Segmentation
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Physical Address
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Advantage of Segmentation
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x86 -ISA
8086-80486 Programmer’s Model
BIU
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Memory Addressing
• Real
- Access only 1MB of memory
- Only 20 Address lines required.
• Protected
- support multitasking
- memory management protection enabled
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End of Lecture 5
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