Instruction Sets Arithmetic 16th-25th Feb 2023 For Lecture

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Topic-IV

80X86 Instruction Sets and


ALP

T1. Barry B Brey, The Intel Microprocessors .Pearson, Eight Ed. 2009. Chapter 4-6, 8

Feb 16th – 25th 2023

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Types of Instructions

• Instructions with two operands (source and destination)


-(R R, R M, R Idata, M Idata, but not M M)

• Instructions with one operand (source or destination)


-(R , M, but not Idata)

• Instructions without any operand

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Types of Instructions

• Arithmetic Instructions

• Logical Instructions

• Data Transfer Instructions

• Branch and Program control Instructions

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Arithmetic Instructions

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2. Arithmetic Instructions

• The arithmetic instructions include :

 addition, subtraction, multiplication, division, (+, -, x, /)

 comparison, increment, and decrement. (~, ↑, ↓)

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Addition
• ADD: Addition without carry
• ADC : Add-with-carry instruction.

• Note: The only types of addition not allowed are memory-to-


memory and segment register.

– segment registers can only be moved, pushed,


or popped

• Increment instruction: INC is a special type of addition that


adds 1 to a number.

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Addition
ADD Destination, Source

(Destination) (Source) + (Destination)

Source: immediate number or a register or a memory location


specified by any one of the addressing methods.

Destination may be a register or a memory location

Both source and destination in an instruction cannot be memory


locations

Source and Destination must be of same size


All Flags Affected.
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Addition

MOV CL, 73H


MOV BL, 4FH
ADD CL, BL

Result in CL = C2H 11000010

CF = 0, PF = 0, AF = 1, ZF = 0, SF = 1, OF = 1

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Addition with carry
ADC DESTINATION, SOURCE

(SOURCE) + ( DESTINATION) + CF (DESTINATION)

Useful for multibyte addition of data

Ex: ADD AX, CX

ADC BX, DX

32 bit addition.

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Addition

Addition-with-carry showing how the carry flag (C) links the two
16-bit additions into one 32-bit addition.

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Add 2 –6 byte nos. stored in location 20000H and
21000H. Store the result starting from location 21000H
MOV AX, 2000H
MOV DS, AX
MOV SI, 0000H
MOV DI, 1000H
MOV CL, 06H
MOV BL, 00
CLC
X1: MOV AL, [SI]
ADC [DI], AL
INC SI
INC DI
DEC CL
JNZ X1
JNC X2
INC BL
X2: MOV [DI], BL

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Subtraction

SUB DESINATION, SOURCE

(DESTINATION) – (SOURCE) ( DESTINATION)

SBB DESTINATION, SOURCE

(DESTINATION) - (SOURCE) – CF (DESTINATION)

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Subtraction-with-borrow showing how the carry flag (C) propagates the
borrow.

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Compare Instruction
 Compare instruction is a subtraction that changes only
the flag bits.
 CMP Destination, Source

CF ZF SF
Equal 0 1 0
dest > source 0 0 0
dest < source 1 0 1

Ex: CMP CL, [BX]


CMP AX, 2000H
CMP [DI], CH

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 Destination operand never changes
 Useful for checking the contents of a register or a memory location
against another value.
 A CMP is normally followed by a conditional jump instruction,
which tests the condition of the flag bits.

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Multiplication
• Performed on bytes, words

– can be signed (IMUL) or unsigned integer (MUL)

• Product after a multiplication always a double-width product.

– two 8-bit numbers multiplied generate a 16-bit product; two 16-


bit numbers generate a 32-bit;

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8-Bit Multiplication
• With 8-bit multiplication, the multiplicand is always in the AL
register, signed or unsigned.

– multiplier can be any 8-bit register or memory location

• Immediate multiplication is not allowed unless the special signed


immediate multiplication ( in 80186) instruction appears in a
program.

• The multiplication instruction contains one operand because it


always multiplies the operand times the contents of register AL.

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16-Bit Multiplication
• Word multiplication is very similar to byte multiplication.
• AX contains the multiplicand instead of AL.
– 32-bit product appears in DX–AX instead of AX
• The DX register always contains the most significant 16 bits of
the product; AX contains the least significant 16 bits.
• As with 8-bit multiplication, the choice of the multiplier is up
to the programmer.

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Division
• Occurs on 8- or 16-bit numbers.
– signed (IDIV) or unsigned (DIV) integers
• Dividend is always a double-width dividend, divided by the
operand.
• There is no immediate division instruction available to any
microprocessor.

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• A division can result in two types of errors:
– attempt to divide by zero
– other is a divide overflow, which occurs when a small
number divides into a large number
• In either case, the microprocessor generates an interrupt if a
divide error occurs.
• In most systems, a divide error interrupt displays an error
message on the video screen.

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8-Bit Division
• Uses AX to store the dividend divided by the contents of any 8-bit
register or memory location.

• Quotient moves into AL after the division with AH containing a


whole number remainder.

– quotient is positive or negative; remainder always assumes sign


of the dividend; always an integer

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• Numbers usually 8 bits wide in 8-bit division .
– the dividend must be converted to a 16-bit wide number in
AX ; accomplished differently for signed and unsigned
numbers

• CBW/CWD (convert byte to word) instruction performs this


sign conversion.

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16-Bit Division
• Sixteen-bit division is similar to 8-bit division
– instead of dividing into AX, the 16-bit number is divided into
DX–AX, a 32-bit dividend

• As with 8-bit division, numbers must often be converted to the


proper form for the dividend.
– if a 16-bit unsigned number is placed in AX, DX must be
cleared to zero

• In the 80386 and above, the number is zero-extended by using


the MOVZX instruction.

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16-Bit Division

Example: MOVZX CX, BL


Assume BL= 80H
After execution of MOVZX
instruction
BL=80H
CX= CH CL
CL=80H = 1000 0000
CH= 0000 00000=00H
Thus CX= 0080H

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Increment
• The INC instruction adds 1 to any register or memory location,
except a segment register.

• The size of the data must be described by using the BYTE PTR,
WORD PTR directives.

• The assembler program cannot determine if the INC [DI]


instruction is a byte-, word-sized increment.

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Increment

• INC Destination
Ex: INC CX ; Add 1 to the contents of CX.
EX: INC BYTEPTR [BX] ; Increments the byte pointed to
by the contents of BX.

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INC Destination

Destination –Register or memory location ( specified in 24 diff


ways)

•( AF, OF, PF, SF, ZF affected, CF not affected)

•INC BL

•INC BX

•INC EDX

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DEC Destination

Destination –Register or memory location ( specified in 24 diff


ways)

•( AF, OF, PF, SF, ZF affected, CF not affected)

•DEC BL

•DEC BX

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INC/DEC the contents of a Memory
location
 Specify the data size in memory

use directive
• BYTE PTR, WORD PTR, DWORD PTR
• INC WORD PTR [BX]
• INC BYTE PTR[BX]
• BX-1000H DS-2000H

After execution of After execution of


Consider INC WORD PTR INC BYTE PTR [BX]
[BX]

21000 FF 21000 00 21000 00


21001 00 21001 01 21001 00
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BCD and ASCII Arithmetic
• The microprocessor allows arithmetic manipulation of both
BCD (binary-coded decimal) and ASCII (American
Standard Code for Information Interchange) data.

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BCD Arithmetic
• Two arithmetic techniques operate with BCD data:
• addition and subtraction.
• DAA (decimal adjust after addition) instruction follows BCD
addition,
• DAS (decimal adjust after subtraction) follows BCD
subtraction.
– both correct the result of addition or subtraction
so it is a BCD number

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DAA
• DAA follows the ADD or ADC instruction to adjust the result into
a BCD result.
• After adding the AL and BL registers, the result is adjusted with a
DAA instruction before being stored.
• Ex: before execution let AL =0101 1001=59 BCD and
BL= 0011 0101= 35 BCD
ADD AL,BL ; AL =1000 1110= 8EH
DAA ; Add 0110 because 1110 > 9
; AL= 1001 0100= 94 BCD
AF,CF,PF and ZF are affected. OF is undefined after DAA
instruction.

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 Ex: up counter can be implemented as follows.

MOV COUNT,00H ; COUNT=00H


MOV AL,COUNT ;AL=00H
ADD AL,01H ;AL=01H
DAA ; decimal adjust the result
MOV COUNT,AL ; put decimal result back in
memory

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DAS Instruction
• Functions as does DAA instruction, except it follows a subtraction
instead of an addition.
• Ex: AL=1000 0110 =86 BCD
BH= 0101 0111 =57 BCD
SUB AL,BH ; AL= 0010 1111 =2FH,CF=0
DAS ; lower nibble=1111>9 So,DAS
subtracts 0000 0110 to give
AL=0010 1001 =29 BCD

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ASCII Arithmetic
• ASCII arithmetic instructions function with coded numbers, value
30H to 39H for 0–9.
• Four instructions in ASCII arithmetic operations:
– AAA (ASCII adjust after addition)
– AAD (ASCII adjust before division)
– AAM (ASCII adjust after multiplication)
– AAS (ASCII adjust after subtraction)
• These instructions use register AX as the source and as the
destination.

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AAA Instruction
• Addition of two one-digit ASCII-coded numbers will not result in
any useful data.
• Ex: Before: AL= 0011 0001 , ASCII 1;
BL= 0011 1001,ASCII 9
ADD AL,BL ; Result : AL=0110 1110 = 6AH,
; which is incorrect BCD
AAA ;
ADD AX, 3030

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 The lower order byte( lower nibble )of AL is unpacked and
Higher nibble is zeroed.
 The AAA instruction works only on the AL register.
 The AAA instruction updates AF and CF but OF,PF,SF and ZF
are left undefined.

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AAD(BCD to Binary convert before Division)

• Appears before a division.


• The AAD instruction requires the AX register contain a two-digit
unpacked BCD number (not ASCII) before executing.
• Ex: AX= 0607H unpacked BCD for 67 decimal
CH=09 H , now adjust to binary
AAD ; result: AX=0043=43H= 67 decimal
DIV CH ; Divide AX by unpacked BCD in CH
; quotient : AL=07 unpacked BCD
; Remainder : AH=04 unpacked BCD
; Flags undefined after DIV

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AAM (BCD Adjust after multiply)
• Follows multiplication instruction after multiplying two one-digit
unpacked BCD numbers.
• AAM converts from binary to unpacked BCD.
• Ex: AL= 00000101 =unpacked BCD 5
BH=00001001 = unpacked BCD 9
MUL BH ; AL X BH, result in AX
; AX =00000000 00101101 =002DH
AAM ; AX=0000 0100 00000101= 0405H
; which is unpacked BCD for 45.

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; if ASCII codes for the result are desired, use
next instruction.

ADD AX,3030H ; put 3 in upper nibble of each byte.


; AX=00110100 00110101 =3435H
; which is ASCII code for 45

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AAS Instruction
• AAS adjusts the AX register after an ASCII subtraction.
• Ex1: AL=00111001 =39H =ASCII 9
BL= 00110101 =35H= ASCII 5
SUB AL,BL ;Result: AL= 00000100= BCD 04
and CF=0
AAS ; result: AL=00000100 = BCD 04
and CF=0, no borrow required.
ASCII 5 - ASCII 9(5-9)

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Ex2: AL= 00110101 =35H
BL= 00111001 =39H
SUB AL,BL ; Result : AL= 11111100 = -4 in 2’s
; complement and CF=1
AAS ; Result: AL=00000100 =BCD 04
; and CF=1, borrow needed

 The AAS instruction leaves the correct unpacked BCD result in


the lower nibble of AL and resets the upper nibble of AL to all
0’s

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XADD Instruction

XADD dest, source Exchange (content of operands) and add

XADD BL, CL

After execution both the operand content will change.

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Logical Instructions

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3. Logical Instructions

The logic instructions include


• AND
• OR
• Exclusive-OR
• NOT
• NEG
• Shifts
• Rotates
• TEST (logical compare).

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BASIC LOGIC INSTRUCTIONS

• Include AND, OR, Exclusive-OR, and NOT.

– TEST is a special form of the AND instruction


– NEG similar to the NOT instruction

• Logic operations provide binary bit control in low-level software.


– allow bits to be set, cleared, or complemented

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• All logic instructions affect the flag bits.

• When binary data are manipulated in a register or a memory


location, the rightmost bit position is always numbered bit 0.

• position numbers increase from bit 0 to the left, to bit 7 for a


byte
• bit 0 to bit 15 for a word
• bit 0 to bit 31 for doubleword (32 bits) uses as its leftmost bit
• For a quadword (64-bits) upto position 63.

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AND Destination, Source
ANDs each bit in the source with the corresponding bit in the
destination

 CF and OF both become zero

 PF, SF and ZF affected

 AF undefined

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• AND clears bits of a binary number.
– called masking
• AND uses any mode except memory-to-memory and segment
register addressing.
• An ASCII number can be converted to BCD by using AND to
mask off the leftmost four binary bit positions.

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 Ex1:

AND CX,[SI] ; AND word in DS at offset [SI]with word in CX


register
; result in CX register

 Ex2: BX= 10110011 01011110

AND BX, 00FFH ; Mask out upper 8 bits of BX


; Result :BX=00000000 01011110
; CF,OF,PF,SF,ZF=0

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OR Destination, Source
ORs each bit in the source with the corresponding bit in the
destination

CF and OF both become zero


PF, SF and ZF affected
AF undefined

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The operation of the OR function showing how bits of a number
are set to one.

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 Ex: CX=00111101 10100101
OR CX, FF00H ; Result in
; CX= 11111111 10100101
; The upper byte now all 1’s and lower byte
not changed.

CF =OF =0
PF=1, SF=1, ZF=0

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Exclusive-OR
• If inputs of the Exclusive-OR function are both 0 or both 1, the
output is 0; if the inputs are different, the output is 1.
• Exclusive-OR is sometimes called a comparator.
• XOR uses any addressing mode except segment register
addressing.
• Exclusive-OR is useful if some bits of a register or memory
location must be inverted
• A common use for the Exclusive-OR instruction is to clear a
register to zero

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The operation of the Exclusive-OR function showing how bits of a
number are inverted.

Ex1: BX= 00111101 01101001


CX= 00000000 11111111
XOR BX,CX ; Result: BX= 00111101 10010110
; bits in the lower byte are inverted.

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Ex2: XOR WORDPTR [BX],00FFH
; XOR the immediate number 00FFH with word at offset
[BX] in data segment .Result in memory location [BX].

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TEST

TEST Destination,source
• TEST performs the AND operation.
– only affects the condition of the flag register,
which indicates the result of the test
– functions the same manner as a CMP

• Usually the followed by either the JZ (jump if zero) or JNZ


(jump if not zero) instruction.
• The destination operand is normally tested against immediate
data.

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 Ex: AL= 01010001
TEST AL, 80H ;AND immediate 80H with AL to test if
MSB of AL is 1or 0.
; AL = 01010001 (unchanged)
; PF=0,SF=0,
;ZF=1 because ANDing produced 00H

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NOT and NEG
• NOT and NEG can use any addressing
mode except segment register addressing.
• The NOT instruction inverts all bits of a byte, word, or double
word.
• NEG two’s complements a number.
– the arithmetic sign of a signed number changes from positive to
negative or negative to positive

• The NOT function is considered logical


• NEG function is considered an arithmetic operation.

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NOT and NEG

 NOT Destination ; Invert each bit of operand


 Ex: NOT BX ; complement the contents of BX register
 NOT BYTEPTR [SI]

 NEG Destination ; Form 2’s complement


Ex: NEG BX ; Replace the contents in BX with it’s 2’s complement

 This instruction forms the 2’s complement by subtracting the word


or byte indicated in destination from zero.

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Shift and Rotate
• Shift and rotate instructions manipulate binary numbers at the
binary bit level.

– as did AND, OR, Exclusive-OR, and NOT

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Shift
• Position or move numbers to the left or right within a register or
memory location.

• The microprocessor’s instruction set contains four different shift


instructions:

– two are logical (SHL, SHR);


– two are arithmetic shifts (SAL, SAR)

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SAL/SHL Destination, count

 Ex: CF=0 , BX= 11100101 11010011


SAL BX,1 ;Shift BX register contents 1 bit position left
CF=1 , BX= 11001011 10100110

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SAL/SHL Destination, count
SAL BX, 1

MOV CL, 05
SAL BP, CL

SAL BYTE PTR[BX], 1

SAL EAX,12

•Flags Affected : CF, ZF,SF


•OF –If MSB changes –single bit rotate
•PF -Affected –but has meaning only if 8-bit operation
•AF -Undefined
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SAL/SHL Destination, count
SAL/SHL or two mnemonics for the same operation

Shifts each bit in the specified destination some number of bit


positions to the left

As bit shifted out of LSB 0 is put in LSB, MSB shifted to CF

SAL/SHL destination, count

•Count in CL if count greater than 1


(except in 386 and above)

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Shift

– also perform simple arithmetic as multiplication


by powers of 2+n (left shift) and division by powers of 2-n (right
shift).

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SAR
Shift Operand Bits Right.
New MSB == OLD MSB

SAR Destination, Count

Ex: SAR DI, 1

MOV CL, 02H

SAR WORD PTR[BP], CL

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SAR & SHR

 Ex: CF=0 , BX= 11100101 11010011


SAR BX,1 ;Shift BX register contents 1 bit position right,
keeping MSB same
; CF=1 , BX=11110010 11101001

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SHR
Shift Operand bits right. Put Zero in MSBs

SHR Destination, Count

 Ex: CF=0 , BX= 11100101 11010011


SHR BX,1 ;Shift BX register contents 1 bit position right,
keeping MSB same
; CF=1 , BX=01110010 11101001

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Rotate
• Positions binary data by rotating information in a register or
memory location, either from one end to another or through the
carry flag.
– used to shift/position numbers wider than 16 bits

• With either type of instruction, the programmer can select either a


left or a right rotate.

• Addressing modes used with rotate are the same as those used
with shifts.

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Rotate

 Ex: CF=0 , BX= 11100101 11010011


 ROL BX,1 ;rotate BX register contents 1 bit position left
; CF=1 , BX= 11001011 10100111
ROR BX,1 ;rotate BX register contents 1 bit position right
; CF=1 , BX= 11110010 11101001
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Rotate through Carry

RCL

RCR

 Ex: BX= 11100101 11010011, CF=0

RCR BX,1 ;rotate BX register contents 1 bit position right


; BX=01110010 11101001, CF=1
RCL BX,1 ;rotate BX register contents 1 bit position left
; CF=1 , BX= 11001011 10100110
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Rotate
• ROL Destination, count
• ROR Destination, count

• Use CL for count greater than 1.


• (In 80386 onwards count greater than 1 can be directly given)

• ROL AX,1
• ROR BYTEPTR [SI], 1
• MOV CL, 04H
• ROL AX, CL
• ROL BYTEPTR [SI], CL
• ROL ECX, 12H 80386
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Rotate

Flags Affected : CF
OF –If MSB changes –single bit rotate

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Rotate

ASSUME BX=1111 0000 1001 1100, Swap the bytes of the


BX register

MOV CL, 08H


ROL BX, CL

MOV CL, 08H


ROR BX, CL

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The rotate instructions showing the direction and operation of each
rotate.

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WRITE A PROGRAM THAT COUNTS THE NUMBER OF 1’S IN A BYTE
IN LOCATION DATA1 AND WRITES IT INTO LOCATION RES1

.Model Tiny
.data
DATA1 DB 0A7H
RES1 DB ?
.code
.startup
SUB BL, BL ;clear BL
MOV CL, 8 ;rotate total of 8 times
MOV AL,DATA1
AGAIN: ROL AL,1 ;rotate it once
JNC NEXT ;check for 1
INC BL ;if CF=1 then inc count
NEXT: DEC CL ;go through this 8 times
JNZ AGAIN ;if not finished go back
MOV RES1, BL
.exit
end
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STRING COMPARISONS

• String instructions are powerful because they allow the


programmer to manipulate large blocks of data with relative ease.

• Block data manipulation occurs with MOVS, LODS, STOS, INS,


and OUTS.

• Additional string instructions allow a section of memory to be


tested against a constant or against another section of memory.

– SCAS (string scan); CMPS (string compare)

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SCAS
Compares the AL with a byte of data in memory
Compares the AX with a word of data in memory
Compares the EAX with a doubleword of data in memory

Memory is ES: DI
Operands not affected flags affected(subtraction)

SCASB
SCASW
SCASD

Can be used with prefix


REPNE SCASB

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• SCAS uses direction flag (D) to select auto- increment or auto-
decrement operation for DI.

also repeat if prefixed by conditional repeat prefix

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Write an ALP to find the displacement at which the data
0DH is present from an array of data stored from location
DAT 1. The number of bytes of data in the array is 80.

. MODEL TINY
.DATA
DAT1 DB 80 DUP (?)
.CODE
.STARTUP
MOV DI, OFFSET TEST STRING
MOV AL, 0DH
MOV CX, 50H • Scanning is repeated as
CLD long as bytes are not
REPNE SCASB equal or the end of the
.EXIT string not reached.
END
• If 0DH is found DI will
point to the next address
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CMPS / CMPSB/ CMPSW

• Compares a byte in one string with a byte in another string or a


word in one string with a word in another string

DS: SI with ES: DI

• Flags affected
• Direction flag used for auto increment or decrement
• Can be used with Prefix

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Ex:
MOV SI, OFFSET STRING FIRST
MOV DI, OFFSET STRING SECOND
CLD
MOV CX, 100
REPE CMPSB

• Repeat until end of string or until compared bytes are equal

• REPE CMPSB
• REPNE CMPSB

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