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# PRIMETIME ECO ROLE COMMANDS #
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implement_eco -max_displacement_in_site_rows

report_eco_scenarios -num_live_view

strat_eco_scenarios #its strat prime eco fixing

####### ECO FLOWS and fixing violations ########

update_timing

update_power

### pt_checks ###


report_constraint -max_cap/tran/fanout

report_noise

report_cell_em_violation

report_si_bottleneck

report_global_timing

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fix_eco_timng -physical_mode open_site # open_site only add buffer when there is a


room for the change

# Setup fixing honors DRC and alters hold slack if needed; hold fixing honors setup
slack and DRC

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# Cell em violation analisys process in PT #
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## Cell electromigration effects occur inside logic gates when excessive current
densities cause a gradual displacement of metal atoms which can eventually cause a
short or open in the metal structure. The PrimePower tool uses a combination of
library data, design data, and switching activity data (and physical data, if
available) to identify and report high risk cells as electromigration DRC
violations ##

#report_cell_em_violation

# perform power/electromigration analysis

set_app_var power_enable_analysis true


set_app_var power_enable_em_analysis true

update_power

# report cell EM violations

report_cell_em_violation

# fix cell EM violations

fix_eco_drc -type cell_em -methods {size_cell insert_buffer}

## The cell_em fixing type can use the sizing and buffering methods to fix cell
electromigration violations.The cell_em fixing type supports only a single
iteration. To fix additional violations, run the update_power command, then rerun
the fix_eco_drc -type cell_em command again ##

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# Fix_eco_power #
# leakage_recovery and area #
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#This command recover power and area by downsizing cells in paths by positive slack
or remove buffers in paths with +ve slack.

#### For all of the cell replacement methods, replacement occurs only when the
following conditions are met:

# The change does not introduce or worsen any timing violations or DRC violations

# The replacement cell has the same logical function as the original cell and meets
any usage restrictions defined by the eco_alternative_cell_attribute_restrictions
and/or eco_alternative_cell_instance_based_restrictions variables

# The replacement cell is preferred over the original cell in one of the following
ways depending on the option settings: less area, smaller power attribute value,
higher#priority name or attribute string, or less power based on PrimePo

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# Fix_eco_wire #
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# Does not introduce new timing or DRC violations.


PENDING
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proirty or order of doing eco fixes


1 drc
2 timing [1st setup and then hold]

### imp ###

# *if you have more eco changes in design fix_eco_timing and drc need to be done at
a time [1 eco go ] so it is easy im role up in icc2 for eco_route . "look for
changes made by big violations and fix them first "

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