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1562 Fa
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TYPICAL APPLICATIO
Amplitude Response
Dual 4th Order 100kHz Butterworth Lowpass Filter 10
RIN2, 10k 0
RIN1
10k 20 –10
1
VIN2 INV B INV C
RQ1, 5.62k 2 19 RQ2, 13k –20
V1 B V1 C
GAIN (dB)
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PACKAGE/ORDER I FOR ATIO
TOP VIEW ORDER PART TOP VIEW
ORDER PART
INV B 1 20 INV C NUMBER NUMBER
V1 B 2 19 V1 C INV B 1 16 INV C
V2 B 3 18 V2 C V1 B 2 15 V1 C
V –* 4 17 V –* LTC1562CG LTC1562CN
V+ 5 16 V– V2 B 3 14 V2 C
SHDN 6 15 AGND LTC1562ACG V+ 4 13 V –
V –* 7 14 V –* LTC1562IG
V2 A 8 13 V2 D SHDN 5 12 AGND
V1 A 9 12 V1 D LTC1562AIG V2 A 6 11 V2 D
INV A 10 11 INV D
V1 A 7 10 V1 D
G PACKAGE
INV A 8 9 INV D
20-LEAD PLASTIC SSOP
*G PACKAGE PINS 4, 7, 14, 17 ARE N PACKAGE
SUBSTRATE/SHIELD CONNECTIONS 16-LEAD PDIP
AND MUST BE TIED TO V –
TJMAX = 150°C, θJA = 90°C/W
TJMAX = 150°C, θJA = 136°C/W
Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS The ● denotes the specifications that apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VS = ±5V, outputs unloaded, SHDN pin to logic “low”,
unless otherwise noted. AC specs are for a single 2nd order section, RIN = R2 = RQ =10k ±0.1%, fO = 100kHz, unless noted.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VS Total Supply Voltage 4.75 10.5 V
IS Supply Current VS = ±2.375V, RL = 5k, CL = 30pF, Outputs at 0V 17.3 19.5 mA
VS = ±5V, RL = 5k, CL = 30pF, Outputs at 0V 19 21.5 mA
VS = ±2.375V, RL = 5k, CL = 30pF, Outputs at 0V ● 23.5 mA
VS = ±5V, RL = 5k, CL = 30pF, Outputs at 0V ● 25.5 mA
Output Voltage Swing VS = ±2.375V, RL = 5k, CL = 30pF ● 4.0 4.6 VP-P
VS = ±5V, RL = 5k, CL = 30pF ● 9.3 9.8 VP-P
VOS DC Offset Magnitude, V2 Outputs VS = ±2.375V, Input at AGND Voltage ● 3 15 mV
(Lowpass Response) VS = ±5V, Input at AGND Voltage ● 3 15 mV
DC AGND Reference Point VS = Single 5V Supply 2.5 V
Center Frequency (f O) Error (Note 2)
LTC1562 (SSOP) VS = ±5V, V2 Output Has RL = 5k, CL = 30pF 0.5 1.0 %
LTC1562A (SSOP) VS = ±5V, V2 Output Has RL = 5k, CL = 30pF 0.3 0.6 %
LTC1562 (PDIP) VS = ±5V, V2 Output Has RL = 5k, CL = 30pF 0.6 1.5 %
HL LP Passband Gain (V2 Output) VS = ±2.375V, fIN = 10kHz, ● 0 + 0.05 + 0.1 dB
V2 Output Has RL = 5k, CL = 30pF
HB BP Passband Gain (V1 Output) VS = ±2.375V, fIN = fO, ● + 0.2 + 0.5 dB
V2 Output Has RL = 5k, CL = 30pF
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LTC1562
ELECTRICAL CHARACTERISTICS The ● denotes the specifications that apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VS = ±5V, outputs unloaded, SHDN pin to logic “low”,
unless otherwise noted. AC specs are for a single 2nd order section, RIN = R2 = RQ =10k ±0.1%, fO = 100kHz, unless noted.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
Q Error VS = ±2.375V, LP Output Has RL = 5k, CL = 30pF +3 %
Wideband Output Noise, VS = ±2.375V, BW = 200kHz, Input AC GND 24 µVRMS
Lowpass Response (V2 Output) VS = ±5V, BW = 200kHz, Input AC GND 24 µVRMS
Input-Referred Noise, Gain = 100 BW = 200kHz, f O = 100kHz, Q = 1, Input AC GND 4.5 µVRMS
THD Total Harmonic Distortion, fIN = 20kHz, 2.8VP-P, V1 and V2 Outputs Have – 96 dB
Lowpass Response (V2 Output) RL = 5k, CL = 30pF
fIN = 100kHz, 2.8VP-P, V1 and V2 Outputs Have – 78 dB
RL = 5k, CL = 30pF
Shutdown Supply Current SHDN Pin to V + 1.5 15 µA
SHDN Pin to V +, VS = ±2.375V 1.0 µA
Shutdown-Input Logic Threshold 2.5 V
Shutdown-Input Bias Current SHDN Pin to 0V – 10 – 20 µA
Shutdown Delay SHDN Pin Steps from 0V to V + 20 µs
Shutdown Recovery Delay SHDN Pin Steps from V + to 0V 100 µs
Inverting Input Bias Current, Each Biquad 5 pA
Note 1: Absolute Maximum Ratings are those values beyond which the life Note 2: fO change from ±5V to ±2.375 supplies is – 0.15% typical,
of a device may be impaired. fO temperature coefficient, – 40°C to 85°C, is –25ppm/°C typical.
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TYPICAL PERFOR A CE CHARACTERISTICS
fO Error vs Nominal fO (VS = ±5V) fO Error vs Nominal fO (VS = ±2.5V) Q Error vs Nominal fO (VS = ±5V)
1.50 1.50 35
TA = 70°C
1.25 1.25 TA = 25°C
30
1.00 1.00 RIN = RQ
Q=5 Q=5
0.75 0.75 25
Q = 2.5 Q = 10
0.50 0.50
fO ERROR (%)
fO ERROR (%)
Q ERROR (%)
Q = 2.5 20
0.25 0.25
0 0 15 Q=5
– 0.25 – 0.25
10
– 0.50 – 0.50 Q = 2.5
Q=1 Q=1
– 0.75 – 0.75 5
–1.00 –1.00
0 Q=1
–1.25 –1.25
–1.50 –1.50 –5
50 60 70 80 90 100 110 120 130 140 150 50 60 70 80 90 100 110 120 130 140 150 50 60 70 80 90 100 110 120 130 140 150
NOMINAL fO (kHz) NOMINAL fO (kHz) NOMINAL fO (kHz)
1562 G01 1562 G02 1562 G03
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20
1.5 1.5 Q=5
15 Q=5
1.0 1.0
10 Q = 2.5 Q = 2.5
Q = 2.5
0.5 0.5
5
Q=1 Q=1 Q=1
0 0 0
–5 – 0.5 – 0.5
50 60 70 80 90 100 110 120 130 140 150 50 60 70 80 90 100 110 120 130 140 150 50 60 70 80 90 100 110 120 130 140 150
NOMINAL fO (kHz) NOMINAL fO (kHz) NOMINAL fO (kHz)
1562 G04 1562 G5 1562 G6
Q=5 Q=5
NOISE (µVRMS)
40 40 – 40
35 35 – 50
Q = 2.5
30 30 Q = 2.5 – 60
25 Q=1 25 –70
20 20 Q=1
– 80 fIN = 50kHz
15 15 – 90 fIN = 20kHz
10 10 –100
60 70 80 90 100 110 120 130 140 60 70 80 90 100 110 120 130 140 10k 5k 2k 1k
NOMINAL fO (kHz) NOMINAL fO (kHz) EXTERNAL LOAD RESISTANCE (Ω)
1562 G07 1562 G08 1562 G09
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PI FU CTIO S
Power Supply Pins: The V + and V – pins should be Analog Ground (AGND): The AGND pin is the midpoint of
bypassed with 0.1µF capacitors to an adequate analog an internal resistive voltage divider, developing a potential
ground or ground plane. These capacitors should be halfway between the V + and V – pins, with an equivalent
connected as closely as possible to the supply pins. In the series resistance nominally 7kΩ. This serves as an inter-
20-lead SSOP package, the additional pins 4, 7, 14 and 17 nal ground reference. Filter performance will reflect the
are internally connected to V – (Pin 16) and should also be quality of the analog signal ground and an analog ground
tied to the same point as Pin 16 for best shielding. Low plane surrounding the package is recommended. The
noise linear supplies are recommended. Switching sup- analog ground plane should be connected to any digital
plies are not recommended as they will lower the filter ground at a single point. For dual supply operation, the
dynamic range. AGND pin should be connected to the ground plane
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LTC1562
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PIN FUNCTIONS
(Figure 1). For single supply operation, the AGND pin package does not have the four substrate pins (Pins 4, 7,
should be bypassed to the ground plane with at least a 14, 17 in the 20-pin package).
0.1µF capacitor (at least 1µF for best AC performance)
Shutdown (SHDN): When the SHDN input goes high or is
(Figure 2). These figures show 20-pin package connec- open-circuited, the LTC1562 enters a “zero-power” shut-
tions. The same principles apply to the 16-pin package down state and only junction leakage currents flow. The
with allowance for its different pin numbers. The 16-pin AGND pin and the amplifier outputs (see Figure 3) assume
ANALOG
a high impedance state and the amplifiers effectively
GROUND
PLANE
1 20 disappear from the circuit. (If an input signal is applied to
2 19 a complete filter circuit while the LTC1562 is in shutdown,
3 18 some signal will normally flow to the output through
V–
4 17
0.1µF
passive components around the inactive op amps.)
5 16
V+ LTC1562 A small pull-up current source at the SHDN input defaults
0.1µF 6 20-PIN SSOP 15
the LTC1562 to the shutdown state if the SHDN pin is left
7 14
floating. Therefore, the user must connect the SHDN pin
to a logic “low” (0V for ±5V supplies, V – for 5V total
8 13
9 12
supply) for normal operation of the LTC1562. (This con-
10 11
vention permits true “zero-power” shutdown since not
even the driving logic must deliver current while the part
SINGLE-POINT is in shutdown.) With a single supply voltage, use V – for
SYSTEM GROUND DIGITAL
GROUND PLANE
logic “low”— do not connect SHDN to the AGND pin.
(IF ANY)
ANALOG
GROUND 1 20 –
PLANE
2 19
3 18 +
4 17
5 16
V+ LTC1562
20-PIN SSOP V2 INV V1
0.1µF 6 15 R2 RQ
1562 F01
7 14
1µF
8 13 ZIN
9 12
+ VIN
10 11
V +/2 –
REFERENCE
IN EACH CASE,
( )
RESPONSE RESPONSE
SINGLE-POINT ZIN TYPE AT V1 AT V2 10kΩ
fO = (100kHz)
SYSTEM GROUND DIGITAL R BANDPASS LOWPASS R2
GROUND PLANE
(IF ANY)
C HIGHPASS BANDPASS
( )
Q = RQ 100kHz
R2 fO
1562 F01
Figure 3. Equivalent Circuit of a Single 2nd Order Section
Figure 2. Single Supply Ground Plane Connection (Inside Dashed Line) Shown in Typical Connection. Form of ZIN
(Including Substrate Pins 4, 7, 14, 17) Determines Response Types at the Two Outputs (See Table)
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BLOCK DIAGRA
INV V1 V2 INV V1 V2
A B
– C – C
V+ ∫ ∫
V+ + +
SHUTDOWN
SWITCH
V–
SHUTDOWN D C
AGND
SHDN SWITCH
+ +
V– ∫ ∫
– –
C C
1562 BD
INV V1 V2 INV V1 V2
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LTC1562
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APPLICATIONS INFORMATION
Functional Description Setting fO and Q
The LTC1562 contains four matched, 2nd order, 3-termi- Each of the four 2nd order sections in the LTC1562 can be
nal universal continuous-time filter blocks, each with a programmed for a standard filter function (lowpass, band-
virtual-ground input node (INV) and two rail-to-rail out- pass or highpass) when configured as in Figure 3 with a
puts (V1, V2). In the most basic applications, one such resistor or capacitor for ZIN. These transfer functions all
block and three external resistors provide 2nd order have the same denominator, a complex pole pair with
lowpass and bandpass responses simultaneously (Figure center frequency ωO = 2πfO and quality parameter Q. (The
3, with a resistor for ZIN). The three external resistors set numerators depend on the response type as described
standard 2nd order filter parameters fO, Q and gain. A below.) External resistors R2 and RQ set fO and Q as
combination of internal precision components and exter- follows:
nal resistor R2 sets the center frequency fO of each 2nd
order block. The LTC1562 is trimmed at manufacture so 1 10kΩ
that fO will be 100kHz ±0.5% (±0.6% typical for PDIP fO = = (100kHz)
2πC (R1)R2 R2
package) if the external resistor R2 is exactly 10k.
However, lowpass/bandpass filtering is only one specific RQ RQ R 100kHz
Q = = = Q
application for the 2nd order building blocks in the LTC1562. (R1)R2 (10kΩ)R2 R2 fO
Highpass response results if the external impedance ZIN in
Figure 3 becomes a capacitor CIN (whose value sets only R1 = 10k and C = 159pF are internal to the LTC1562 while
gain, not critical frequencies) as described below. R2 and RQ are external.
Responses with zeroes are available through other con- A typical design procedure proceeds from the desired fO
nections (see Notches and Elliptic Responses). Moreover, and Q as follows, using finite-tolerance fixed resistors.
the virtual-ground input gives each 2nd order section the First find the ideal R2 value for the desired fO:
built-in capability for analog operations such as gain
2
(preamplification), summing and weighting of multiple 100kHz
inputs, handling input voltages beyond the power supplies R2(Ideal) = (10kΩ)
fO
or accepting current or charge signals directly. These
Operational FilterTM frequency-selective building blocks Then select a practical R2 value from the available finite-
are nearly as versatile as op amps. tolerance resistors. Use the actual R2 value to find the
The user who is not copying exactly one of the Typical desired RQ, which also will be approximated with finite
Applications schematics shown later in this data sheet is tolerance:
urged to read carefully the next few sections through at RQ = Q (10kΩ)R2
least Signal Swings, for orientation about the LTC1562,
before attempting to design custom application circuits. The fO range is approximately 10kHz to 150kHz, limited
Also available free from LTC, and recommended for de- mainly by the magnitudes of the external resistors
signing custom filters, is the general-purpose analog filter required. As shown above, R2 varies with the inverse
design software FilterCADTM for Windows®. This software square of fO. This relationship desensitizes fO to R2’s
includes tools for finding the necessary f0, Q and gain Operational Filter and FilterCAD are trademarks of Linear Technology Corporation.
parameters to meet target filter specifications such as Windows is a registered trademark of Microsoft Corporation.
frequency response.
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GAIN (V/V)
GAIN (V/V)
HB HP HP
HL HH
0.707 HB 0.707 HL 0.707 HH
fL fO fH fP fC fC fP
f (LOG SCALE) f (LOG SCALE) f (LOG SCALE)
fO –1
Q= ; fO = fL fH 1 1
2 2
fH – fL fC = fO 1 – + 1– 2 + 1 1 1
2Q2 2Q fC = fO 1 – + 1– + 1
2Q 2Q2
2 2
1
–1
fL = fO + + 1 1
2Q 2Q fP = fO 1 – –1
2Q2 1
fP = fO 1 –
2Q2
1 1
2
fH = fO + + 1 1
2Q 2Q HP = HL
1 1
1
HP = HH
1–
Q 4Q2 1
1
1–
Q 4Q2
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LTC1562
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APPLICATIONS INFORMATION
at frequency fO, and for Q > 0.707, a gain peak occurs at Parameters ωO = 2πfO and Q are set by R2 and RQ as
a frequency below fO, as shown in Figure 4. above. The highpass gain parameter is HH = CIN/159pF.
For a 2nd order highpass response the gain magnitude at
Basic Bandpass frequency fO is QHH, and approaches HH at high frequen-
There are two different ways to obtain a bandpass function cies (f >> fO). For Q > 0.707, a gain peak occurs at a
in Figure 3, both of which give the following transfer frequency above fO as shown in Figure 4. The transfer
function form: function includes a sign inversion.
HBP (s) =
(
– HB ω O / Q s ) CIN
( )
VIN
2
s2 + ω O / Q s + ω O RQ R2
VOUT
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Low Level or Wide Range Input Signals The final issue to be addressed with beyond-the-supply
inputs is current and voltage limits. Current entering the
The LTC1562 contains a built-in capability for low noise virtual ground INV input flows eventually through the
amplification of low level signals. The ZIN impedance in output circuitry that drives V1 and V2. The input current
each 2nd order section controls the block’s gain. When set magnitude (VIN/ZIN in Figure 3) should be limited by
for unity passband gain, a 2nd order section can deliver an design to less than 1mA for good distortion performance.
output signal more than 100dB above the noise level. If low On the other hand, the input voltage VIN appears across the
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LTC1562
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APPLICATIONS INFORMATION
external component ZIN, usually a resistor or capacitor. A practical limitation of this technique is that the CT capaci-
This component must of course be rated to sustain the tor values that tend to be required (hundreds or thousands
magnitude of voltage imposed on it. of pF) can destabilize the op amp in Figure 3 if RINB is too
small, leading to AC errors such as Q enhancement. For this
Lowpass “T” Input Circuit reason, when RINA and RINB are unequal, preferably the
The virtual ground INV input in the Operational Filter block larger of the two should be placed in the RINB position.
provides a means for adding an “extra” lowpass pole to Highpass “T” Input Circuit
any resistor-input application (such as the basic lowpass,
Figure 5, or bandpass, Figure 6a). The resistor that would A method similar to the preceding technique adds an
otherwise form ZIN is split into two parts and a capacitor “extra” highpass pole to any capacitor-input application
to ground added, forming an R-C-R “T” network (Figure (such as the bandpass of Figure 6b or the highpass of
9). This adds an extra, independent real pole at a fre- Figure 7). This method splits the input capacitance CIN into
quency: two series parts CINA and CINB, with a resistor RT to ground
between them (Figure 10). This adds an extra 1st order
1
fP = highpass corner with a zero at DC and a pole at the
2πRPCT frequency:
where CT is the new external capacitor and RP is the 1
parallel combination of the two input resistors RINA and fP =
2πRTCP
RINB. This pair of resistors must normally have a pre-
scribed series total value RIN to set the filter’s gain as where CP = CINA + CINB is the parallel combination of the
described above. The parallel value RP can however be set two capacitors. At the same time, the total series capaci-
arbitrarily (to RIN/4 or less) which allows choosing a tance CIN will control the filter’s gain parameter (HH in
convenient standard capacitor value for CT and fine tuning Basic Highpass). For a given series value CIN, the parallel
the new pole with RP. value CP can still be set arbitrarily (to 4CIN or greater).
CINA CINB
RINA RINB
VIN VIN
CT RQ R2 RT RQ R2
INV V1 V2 INV V1 V2
2nd ORDER 2nd ORDER
1/4 LTC1562 1/4 LTC1562
1562 F09 1562 F10
Figure 9. Lowpass “T” Input Circuit Figure 10. Highpass “T” Input Circuit
The procedure therefore is to begin with the target extra The procedure then is to begin with the target corner (pole)
pole frequency fP. Determine the series value RIN from the frequency fP. Determine the series value CIN from the gain
gain requirement. Select a capacitor value CT such that RP requirement (for example, CIN = HH(159pF) for a highpass).
= 1/(2πfPCT) is no greater than RIN/4, and then choose Select a resistor value RT such that CP = 1/(2πRTfP) is at
RINA and RINB that will simultaneously have the parallel least 4CIN, and select CINA and CINB that will simultaneously
value RP and the series value RIN. Such RINA and RINB can have the parallel value CP and the series value CIN. Such
be found directly from the expression: CINA and CINB can be found directly from the expression:
RIN2 – (4RINRP)
1 1
RIN ± 1
CP ±
1
CP2 – (4CINCP)
2 2 2 2
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• The frequency where a bandpass response has peak 100kHz + 0.6% + 0.6% + 0.1% + 0.1%
gain 140kHz + 0.8% + 0.8% + 0.15% + 0.15%
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LTC1562
U
TYPICAL APPLICATIONS (Basic)
VOUT1 VOUT2
10
RIN1A RIN1B RIN2B RIN2A f– 3dB = 100kHz
1 20
VIN1 INV B INV C VIN2 0
RQ1 19 RQ2
CIN1 2 CIN2
V1 B V1 C
R21 3 18 R22 –10
V2 B V2 C
5 16
GAIN (dB)
5V V + LTC1562 V– –5V –20
0.1µF 6 15 0.1µF
SHDN AGND –30
R23 8 13 R24
V2 A V2 D
9 12 –40
V1 A V1 D
RIN3A RIN3B RQ3 10 11 RQ4 RIN4B RIN4A
VIN3 INV A INV D VIN4 –50
CIN3 CIN4
VOUT3 VOUT4 –60
1562 TA05a 10k 100k 1M
SCHEMATIC INCLUDES PIN NUMBERS FOR 20-PIN PACKAGE. FREQUENCY (Hz)
PINS 4, 7, 14, 17 (NOT SHOWN) ALSO CONNECT TO V –
1562 TA05b
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RIN2 10
BUTTERWORTH
RIN1 0 f – 3dB = 100kHz
1 20
VIN2 INV B INV C
RQ1 2 19 RQ2 –10
V1 B V1 C
R21 3 18 R22 –20
V2 B V2 C
GAIN (dB)
5 16 VOUT2 –30
5V V + LTC1562 V– –5V
0.1µF 6 15 0.1µF –40
SHDN AGND
8 13 VOUT1 –50
V2 A V2 D
R23 9 12 R24 –60
V1 A V1 D
RIN3 RQ3 10 11 RQ4 –70
VIN1 INV A INV D
RIN4 1562 TA03a –80
10k 100k 1M
FREQUENCY (Hz)
SCHEMATIC INCLUDES PIN NUMBERS FOR 20-PIN PACKAGE.
PINS 4, 7, 14, 17 (NOT SHOWN) ALSO CONNECT TO V – 1562 TA03b
2 2 2
100kHz 100kHz 100kHz
R21, R23, RIN1, RIN3 = 10k 14.24k 3.951k
ƒC ƒC ƒC
2 2 2
100kHz 100kHz 100kHz
R22, R24, RIN2, RIN4 = 10k 7.097k 4.966k
ƒC ƒC ƒC
Notes: fC is the cutoff frequency: For Butterworth and Bessel, response is 3dB down at fC. For Chebyshev filters with
± 0.1dB passband ripple up to 0.95 fC, use LTC1562 “A” grade.
Example: Butterworth response, fC = 50kHz. from the formulas above, R21 = R23 = RIN1 = RIN3 = 10k(100kHz/50kHz)2
= 40k. RQ1 = RQ3 = 5.412k(100kHz/50kHz) = 10.82k. R22 = R24 = RIN2 = RIN4 = 10k(100kHz/50kHz)2 = 40k.
RQ2 = RQ4 = 13.07k(100kHz/50kHz) = 26.14k. Use nearest 1% values. 1562 TA03 TABLE
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LTC1562
U
TYPICAL APPLICATIONS (Basic)
RIN2 10
CHEBYSHEV
RIN1 0 fC = 100kHz
1 20
VIN INV B INV C –10
RQ1 RQ2
2 19
V1 B V1 C –20
R21 3 18 R22
V2 B V2 C –30
GAIN (dB)
5 16
5V V + LTC1562 V– –5V –40
0.1µF 6 15 0.1µF
SHDN AGND –50
R23 8 13 R24
V2 A V2 D –60
9 12
V1 A V1 D –70
RQ3 10 11 RQ4
INV A INV D –80
RIN4 –90
10k 100k 500k
VOUT
RIN3 FREQUENCY (Hz)
1562 TA04a 1562 TA04b
Notes: fC is the cutoff frequency: For Butterworth and Bessel, response is 3dB down at fC. For Chebyshev filters with
± 0.1dB passband ripple up to 0.95 fC, use LTC1562 “A” grade. *The resistor values marked with an asterisk (*) in the
Chebyshev formulas (R21 and R24) should be rounded to the nearest standard finite-tolerance value before computing
the values dependent on them (RIN1 and RIN4 respectively).
Example: Chebyshev response, fC = 100kHz. The formulas above give R21 = 7.51k, nearest standard 1% value 7.50k.
Using this 1% value gives RIN1 = 16.5k, already a standard 1% value. RQ1 = 18.075k, nearest 1% value 18.2k.
R22 = RIN2 = 14.99k, nearest 1% value 15k. RQ2 = 11.02k, nearest 1% value 11k. R23 = RIN3 = 7.15k, already a
standard 1% value. RQ3 = 18.75k, nearest 1% value 18.7k. R24 = 26.7k, already a standard 1% value. This gives
RIN4 = 12.14k, nearest 1% value 12.1k. RQ4 = 8.75k, nearest 1% value 8.66k. 1562 TA04 TABLE
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GAIN (dB)
V2 B
5 16
5V V + LTC1562 V– – 40
0.1µF 6 15 1µF
SHDN AGND – 50
R23 8 13 R24
V2 D – 60
V2 A
9 12 –70
V1 A V1 D
RQ3 10 11 RQ4 – 80
INV A INV D
VOUT – 90
RIN4 40 48 56 64 72 80 88 96 104 112 120
CIN3
FREQUENCY (kHz)
1562 TA07a 1562 TA07b
Quick Design Formulas for Center Frequency fC (Recommended Range 40kHz to 140kHz):
2
100kHz 100kHz 100kHz
R21 = R23 = 10.6k RQ1 = RQ3 = 164.6k
ƒC ƒC ƒC + 319kHz
2
100kHz 100kHz 100kHz
R22 = R24 = 9.7k RQ2 = RQ4 = 143.2k
ƒC ƒC ƒC + 294kHz
Notes: RQ1, R22 and CIN1 should be rounded to the nearest standard finite-tolerance value before using these
values in the later formulas.
Example: Center frequency fC of 80kHz. The formulas give R21 = R23 = 16.56k, nearest standard 1% value 16.5k.
RQ1 = RQ3 = 51.56k, nearest 1% value 51.1k. R22 = R24 = 15.15k, nearest 1% value 15k. RQ2 = RQ4 = 47.86k,
nearest 1% value 47.5k. CIN1 = CIN2 = 31.11pF using 51.1k for RQ1, nearest standard 5% capacitor value 33pF.
This and the 1% value R22 = 15k also go into the calculation for RIN2 = RIN4 = 65.20k, nearest 1% value 64.9k.
1562 TA07 TABLE
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16
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LTC1562
U
TYPICAL APPLICATIONS (Basic)
RIN2 10
fCENTER = 100kHz
RIN1 0
1 20
VIN INV B INV C
RQ1 RQ2 –10
2 19
V1 B V1 C
R22 – 20
R21 3 18
V2 B V2 C – 30
GAIN (dB)
5 – 16
5V V + LTC1562 V – 40
0.1µF 6 15 1µF
SHDN AGND – 50
R23 8 13 R24
V2 A V2 D – 60
9 12
V1 A V1 D –70
RQ3 10 11 RQ4
INV A INV D – 80
RIN4 VOUT – 90
60 68 76 84 92 100 108 116 124 132 140
RIN3 FREQUENCY (kHz)
1562 TA06a
1562 TA06b
Quick Design Formulas for a Center Frequency fC (Recommended Range 50kHz to 120kHz):
100kHz
2 ƒC + 1736kHz R21 100kHz 100kHz
R21 = R23 = 11.7k RIN1 = RIN3 = RQ1 = RQ3 = 215.5k
ƒC 100kHz 2.56 ƒC ƒC + 229kHz
100kHz
2
ƒC + 634kHz RQ2 100kHz 100kHz
R22 = R24 = 8.66k RIN2 = RIN4 = RQ2 = RQ4 = 286.2k
ƒC 100kHz 14.36 ƒC ƒC + 351kHz
Notes: R21 and RQ2 should be rounded to the nearest standard finite-tolerance value before using these values in
the later formulas. For fC < 100kHz, the maximum peak-to-peak passband input level is (fC /100kHz)5V. Use
LTC1562A for minimum variation of passband gain.
Example: Center frequency fC of 100kHz. The formulas give R21 = R23 = 11.7k, nearest standard 1% value 11.5k.
This value gives RIN1 = RIN3 = 82.46k, nearest 1% value 82.5k. RQ1 = RQ3 = 65.5k, nearest 1% value 64.9k.
R22 = R24 = 8.66k, already a standard 1% value. This gives RIN2 = RIN4 = 32.4k (again already a standard 1% value).
RQ2 = RQ4 = 63.45k, nearest 1% value 63.4k. If LTC1562A is used, resistor tolerances tighter than 1% will further
improve the passband gain accuracy. 1562 TA06 TABLE
1562fa
GAIN (dB)
5 16
V+ V + LTC1562 V
– V– – 20
0.1µF 6 15 0.1µF
SHDN AGND – 30
R23 8 13 R24
V2 A V2 D – 40
9 12
V1 A V1 D – 50
RQ3 10 11 RQ4
INV A INV D – 60
RIN4 – 70
VOUT 40 60 80 100 120 140 160 180
RIN3 FREQUENCY (kHz)
1562 TA08a
1562 TA08b
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LTC1562
U
TYPICAL APPLICATIONS (Basic)
8th Order Wideband Bandpass Filter
fCENTER = 50kHz, – 3dB BW 40kHz to 60kHz Amplitude Response
RIN2 10
CIN1 69.8k
22pF 0
1 20
VIN INV B INV C
RQ1 59k RQ2 48.7k – 10
2 19
V1 B V1 C
GAIN (dB)
R21 56.2k 3 18 R22 34.8k – 20
V2 B V2 C
V+
5 – 16
V + LTC1562 V V– – 30
0.1µF 6 15 1µF
SHDN AGND
– 40
8 13
V2 A V2 D
R23 63.4k 9 12 R24 28.7k – 50
V1 A V1 D
RQ3 82.5k 10 11 RQ4 100k
INV A INV D – 60
20 100
CIN3 VOUT FREQUENCY (kHz)
27pF
1562 TA09b
CIN4 47pF
1562 TA09a
8th Order Highpass 0.05dB Ripple Chebyshev Filter fCUTOFF = 30kHz Amplitude Response
CIN1 10
150pF 0
1 20
CIN INV B INV C
RQ1, 10.2k RQ2, 22.1k –10
2 19
V1 B V1 C CIN2
–20
R21, 35.7k 3 18 R22, 66.5k 150pF
V2 B V2 C –30
GAIN (dB)
5 16
5V V + LTC1562 V– –5V –40
0.1µF 6 15 0.1µF
SHDN AGND –50
8 13
V2 A V2 D –60
CIN3 R23, 107k 9 12 R24, 127k CIN4
150pF V1 A V1 D 150pF –70
RQ3, 54.9k 10 11 RQ4, 98.9k
INV A INV D –80
1562 TA10a –90
VOUT 1k 10k 100k 1M
SCHEMATIC INCLUDES PIN NUMBERS FOR 20-PIN PACKAGE. FREQUENCY (Hz)
PINS 4, 7, 14, 17 (NOT SHOWN) ALSO CONNECT TO V – 1562 TA10b
2nd Order 30kHz Highpass Cascaded with 6th Order 138kHz Lowpass Amplitude Response
CIN1 RIN2, 5.23k 20
150pF
1 20 10
VIN INV B INV C
RQ1, 30.1k 19 RQ2, 5.11k 0
2
V1 B V1 C
R21, 110k 3 18 R22, 5.23k –10
V2 B V2 C
–20
GAIN (dB)
5 – 16
5V V + LTC1562 V –5V
0.1µF 0.1µF –30
6 15
SHDN AGND
–40
8 13
V2 A V2 D –50
R23, 5.23k 9 12 R24, 5.23k
V1 A V1 D –60
RQ3, 14k 10 11 RQ4, 3.74k
INV A INV D –70
VOUT –80
RIN3, 8.06k RIN4, 3.4k 10 100 400
1562 TA11a
FREQUENCY (kHz)
SCHEMATIC INCLUDES PIN NUMBERS FOR 20-PIN PACKAGE. 1562 TA11b
HBR(s) =
(
– HN s2 + ω N2 ) Elementary Feedforward Notches
s2 + (ω O / Q)s + ω 2O A “textbook” method to get a 180° phase difference at
frequency fN for a notch is to dedicate a bandpass 2nd
with parameters ωN = 2πfN and HN set by component order section (described earlier under Basic Bandpass),
values as described below. (ω0 = 2πf0 and Q are set for the which gives 180° phase shift at the section’s center
Operational Filter block by its R2 and RQ resistors as frequency fO (Figure 11, with CIN1 = 0), so that fN = fO. The
described earlier in Setting f0 and Q). Characteristically, bandpass section of Figure 6a, at its center frequency fO,
the gain magnitude |HBR(j2πf)| has the value HN(fN2/f02) at has a phase shift of 180° and a gain magnitude of HB =
DC (f = 0) and HN at high frequencies (f >> fN), so in RQ /RIN. A notch results in Figure 11 if the paths summed
addition to the notch, the gain changes by a factor: into virtual ground have the same gains at the 180°
High Frequency Gain ƒ 2O frequency (then IO = 0). This requires a constraint on the
= 2 resistor values:
DC Gain ƒN
RIN2 RQ1
=
The common principle in the following circuit methods is RFF2 RIN1
to add a signal to a filtered replica of itself having equal gain
and 180° phase difference at the desired notch frequency
CIN1
RIN1
VIN
RQ1 R21 IO
RIN2 RGAIN
INV V1 V2 –
VIRTUAL
2nd ORDER GROUND
1/4 LTC1562 VOUT
RFF2 +
1562 F11
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20
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LTC1562
U U W U
APPLICATIONS INFORMATION
Note that the depth of the notch depends on the accuracy Feedforward Notches for fN > f0
of this resistor ratioing. The virtual-ground summing When CIN1 ≠ 0 in Figure 11, the notch frequency fN is above
point in Figure 11 may be from an op amp as shown, or in the center frequency f0 and the response has a lowpass
a practical cascaded filter, the INV input of another Opera- shape as well as a notch (Figure 13). CIN1 contributes
tional Filter block. The transfer function in Figure 11 with phase lead, which increases the notch frequency above
CIN1 = 0 is a “pure” notch (fN = f0) of the HBR(s) form above, the center frequency of the 2nd order Operational Filter
and the parameters are:
block. The resistor constraint from the previous section
ƒN = ƒ O also applies here and the HBR(s) parameters become:
R
H N = GAIN 1
RFF2 ƒN = ƒ O
RIN1CIN1
1–
Because fN = f0 in this case, the gain magnitude both at DC RQ1C
and at high frequencies (f >> fN) is the same, HN (assuming
RGAIN ƒ 2O
that the op amp in Figure 11 adds no significant frequency HN =
response). Figure 12 shows this. Such a notch is ineffi- RFF2 ƒN2
cient as a cascaded part of a highpass, lowpass or band-
pass filter (the most common uses for notches). Varia- C is the internal capacitor value in the Operational Filter
tions of Figure 11 can add a highpass or lowpass shape to block (in the LTC1562, 159pF).
the notch, without using more Operational Filter blocks. The configuration of Figure 11 is most useful for a
The key to doing so is to decouple the notch frequency fN stopband notch in a lowpass filter or as an upper stopband
from the center frequency f0 of the Operational Filter block notch in a bandpass filter, since the two resistors R IN2 and
(this is shown in Figures 13 and 15). The next two sections RFF2 can replace the input resistor RIN of either a lowpass
summarize two variations of Figure 11 with this highpass/ section (Figure 5) or a resistor-input bandpass section
lowpass shaping, and the remaining section shows a (Figure 6a) built from a second Operational Filter block.
different approach to building notches.
0 20
–20
DC GAIN = HN ( )
fN2
fO2
0
HIGH FREQ
GAIN = HN
– 40
GAIN (dB)
GAIN (dB)
–20
– 60
– 40 fO = 100kHz
– 80
fN = fO = 100kHz fN = 200kHz
HN = 1 Q=1
Q=1 DC GAIN = 0dB
–100 – 60
10 100 1000 10 100 1000
FREQUENCY (kHz) FREQUENCY (kHz)
AN54 • TA18 1562 F13
Figure 12. Notch Response with fN = fO Figure 13. Notch Response with fN > fO
1562fa
fed-forward input signal. Capacitor CIN1 shifts the result- HIGH FREQ
( )
GAIN = HN
ing notch frequency, fN, up from zero, giving a low 0 fN2
DC GAIN = HN
frequency notch with a highpass shape (Figure 15). The fO2
–20
R1 C R21
ƒN = ƒ O 1 – – 40
RQ1 CIN1 RIN1
fO = 100kHz
fN = 50kHz
Q=1
RGAIN HIGH FREQ GAIN = 0dB
HN = – 60
10k 100k 1M
RFF2 FREQUENCY (Hz)
1562 F15
CIN1
RIN1
VIN
RQ1 R21 IO
RIN2 RGAIN
INV V1 V2 –
VIRTUAL
2nd ORDER GROUND
1/4 LTC1562 VOUT
RFF2 +
1562 F14
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22
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LTC1562
U U W U
APPLICATIONS INFORMATION
R-C Universal Notches R R21
DC Gain = GAIN
A different way to get 180° phase shift for a notch is to use RIN1 RN
the built-in 90° phase difference between the two Opera-
tional Filter block outputs along with a further 90° from an ƒ 2O High Frequency Gain RN CN
external capacitor. This method achieves deep notches = =
ƒN2 DC Gain R21C
independent of component matching, unlike the previous
techniques, and it is convenient for cascaded highpass as
R1 and C are the internal precision components (in the
well as lowpass and bandpass filters.
LTC1562, 10k and 159pF respectively) as described above
The V2 output of an Operational Filter block is a time- in Setting f0 and Q.
integrated version of V1 (see Figure 3), and therefore lags
Unlike the notch methods of Figures 11 and 14, notch
V1 by 90° over a wide range of frequencies. In Figure 16,
depth from Figure 16 is inherent, not derived from compo-
a notch response occurs when a 2nd order section drives
nent matching. Errors in the RN or CN values alter the notch
a virtual-ground input through two paths, one through a
frequency, fN, rather than the degree of cancellation at fN.
capacitor and one through a resistor. Again, the virtual
Also, the notch frequency, fN, is independent of the section’s
ground may come from an op amp as shown, or from
center frequency f0, so fN can freely be equal to, higher
another Operational Filter block’s INV input. Capacitor CN
than or lower than f0 (Figures 12, 13 or 15, respectively)
adds a further 90° to the 90° difference between V1 and
without changing the configuration. The chief drawback of
V2, producing a wideband 180° phase difference, but
Figure 16 compared to the previous methods is a very
frequency-dependent amplitude ratio, between currents
practical one—the CN capacitor value directly scales HN
IR and IC. At the frequency where IR and IC have equal
(and therefore the high frequency gain). Capacitor values
magnitude, IO becomes zero and a notch occurs. This
are generally not available in increments or tolerances as
gives a net transfer function from VIN to VOUT in the form
fine as those of resistors, and this configuration lacks the
of HBR(s) as above, with parameters:
property of the previous two configurations that sensitiv-
1 ity to the capacitor value falls as fN approaches f0. Unlike
ƒN = the previous notch circuits, this one is also noninverting at
2π RN CNR1C
DC.
R C
HN = – GAIN N
RIN1 C
RIN1
VIN
RQ1 R21 IR IO
RN RGAIN
VIRTUAL –
INV V1 V2
GROUND
2nd ORDER CN VOUT
IC
1/4 LTC1562 +
1562 F16
Figure 16. The R-C Universal Notch Configuration for an Operational Filter Block
1562fa
CIN2 24pF
GAIN (dB)
5 16 – 40
5V V+ LTC1562 V– – 5V
0.1µF 0.1µF
6 15 – 60
SHDN AGND
8 13
V2A V2D –80
R23 31.6k R24 32.4k
9 12
V1A V1D –100
RQ3 34k
10 11 RQ4 11.5k
INVA INVD
VOUT –120
RIN4 32.4k 10 100 500
RIN3 31.6k FREQUENCY (kHz)
1562 TA12b
CIN3 18pF
CIN4 10pF
1562 TA12a USES THREE R-C UNIVERSAL NOTCHES AT fN = 133kHz, 167kHz, 222kHz.
SCHEMATIC INCLUDES PIN NUMBERS FOR 20-PIN PACKAGE. DETAILED DESCRIPTION IN LINEAR TECHNOLOGY DESIGN NOTE 195.
PINS 4, 7, 14, 17 (NOT SHOWN) ALSO CONNECT TO V – WIDEBAND OUTPUT NOISE 60µVRMS
RFF2 301k
RIN2 93.1k
Amplitude Response
RIN1
95.3k 1 20
VIN INVB INVC 10
RQ1 86.6k 2 19 RQ2 84.5k 0
CIN1
5.6pF V1B V1C
R21 10.7k R22 10k –10
3 18
V2B V2C
–20
5 16
5V V+ LTC1562 V– – 5V – 30
GAIN (dB)
0.1µF 0.1µF
6 15 – 40
SHDN AGND
R23 10k 8 13 – 50
V2A V2D
RQ3 71.5k R24 9.53k – 60
9 12
V1A V1D –70
RIN3 294k RQ4 82.5k
10 11
INVA INVD – 80
CIN3 18pF – 90
RIN4 95.3k 25 100 175
VOUT FREQUENCY (kHz)
RFF4 332k
1562 TA13b
1562 F13a
SCHEMATIC INCLUDES PIN NUMBERS FOR 20-PIN PACKAGE.
PINS 4, 7, 14, 17 (NOT SHOWN) ALSO CONNECT TO V –
1562fa
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LTC1562
U
TYPICAL APPLICATIONS (Advanced)
RIN2 249k
– 30 – 60
GAIN (dB)
– 40 – 65
– 50 –70
– 60 –75
–70 – 80
– 80 – 85
– 90 – 90
5 10 50 1 10 20
FREQUENCY (kHz) FREQUENCY (kHz)
1562 TA14b 1562 TA14c
1562fa
CIN2
Amplitude Response
RIN1A RIN1B VOUT1
1 20 20
VIN1 INVB INVC
fC = 100kHz
CIN1 RQ1 2 19 RQ2
V1B V1C 0
R21 3 18 R22
V2B V2C –20
5 16
5V V+ LTC1562 V– – 5V
GAIN (dB)
– 40
0.1µF 0.1µF
6 15
SHDN AGND
– 60
R21 8 13 R22
V2A V2D
RQ1 RQ2 – 80
9 12
V1A V1D
RIN1A RIN1B 10 11 –100
VIN2 INVA INVD
CIN1 CIN2 VOUT2 –120
10 100 1000
FREQUENCY (kHz)
RIN2
1562 TA15a 1562 TA15b
fC (Hz) RIN1A RIN1B CIN1 RQ1 R21 RIN2 CIN2 RQ2 R22
100k 5.9k 7.5k 680pF 28k 7.5k 6.34k 68pF 9.31k 11.3k
75k 8.06k 15.4k 560pF 36.5k 13.3k 11.3k 68pF 12.7k 20k
50k 16.9k 35.7k 390pF 56.2k 30.1k 25.5k 68pF 18.7k 44.2k
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LTC1562
U
PACKAGE DESCRIPTION
G Package
20-Lead Plastic SSOP (5.3mm)
(Reference LTC DWG # 05-08-1640)
7.07 – 7.33*
(.278 – .289)
20 19 18 17 16 15 14 13 12 11
7.65 – 7.90
(.301 – .311)
1 2 3 4 5 6 7 8 9 10
5.20 – 5.38**
(.205 – .212) 1.73 – 1.99
(.068 – .078)
0° – 8°
MILLIMETERS
2. DIMENSIONS ARE IN
(INCHES)
3. DRAWING NOT TO SCALE
*DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED .152mm (.006") PER SIDE
**DIMENSIONS DO NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED .254mm (.010") PER SIDE
N Package
16-Lead PDIP (Narrow .300 Inch)
(Reference LTC DWG # 05-08-1510)
0.770*
(19.558)
MAX
16 15 14 13 12 11 10 9
0.255 ± 0.015*
(6.477 ± 0.381)
1 2 3 4 5 6 7 8
0.020
(0.508)
MIN 0.065
0.009 – 0.015
(1.651)
(0.229 – 0.381) TYP
+0.035
0.325 –0.015
( )
0.125 0.100 0.018 ± 0.003
+0.889 (3.175) (2.54) (0.457 ± 0.076)
8.255
–0.381 MIN BSC
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm) N16 1098
1562fa
27
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
Downloaded from Arrow.com.
LTC1562
U
TYPICAL APPLICATION
Amplitude Response
20
– 20
GAIN (dB)
Dual 4th Order 12dB Gaussian Lowpass Filter fC = 64kHz
fC = 32kHz
RIN2 – 40
RIN1 fC = 16kHz
1 20
VIN2 INV B INV C – 60
RQ1 2 19 RQ2
V1 B V1 C
R21 3 18 R22
V2 B V2 C – 80
5 16 VOUT2 1 10 100 300
5V V + LTC1562 V–
0.1µF 6 15 1µF FREQUENCY (kHz)
SHDN AGND 1562 TA16b
8 13 VOUT1
V2 A V2 D
R23 9 12 R24 4-Level Eye Diagram
V1 A V1 D
RIN3 RQ3 10 11 RQ4 fC = 16kHz, Data Clock = 32kHz
VIN1 INV A INV D
RIN4 1562 TA16a
1V/DIV
1562 TA16c
10µs/DIV
fC (Hz) RIN1 = RIN3 R21 = R23 RQ1 = RQ3 RIN2 = RIN4 R22 = R24 RQ2 = RQ4
16k 105k 105k 34k 340k 340k 34k
32k 26.1k 26.1k 16.9k 84.5k 84.5k 16.9k
64k 8.45k 6.49k 8.45k 16.2k 21k 8.45k
RELATED PARTS
PART NUMBER DESCRIPTION COMMENTS
LTC1068, LTC1068-X Quad 2-Pole Switched Capacitor Building Block Family Clock-Tuned
LTC1560-1 5-Pole Elliptic Lowpass, fC = 1MHz/0.5MHz No External Components, SO8
LTC1562-2 Quad 2-Pole Active RC, 20kHz to 300kHz Same Pinout as the LTC1562
LTC1563-2/LTC1563-3 4th Order Active RC Lowpass Filters fCUTOFF(MAX) = 256kHz, Resistor Programmable
LTC1564 10kHz to 150kHz Digitally Controlled Filter and PGA Continuous Time Low Noise 8th Order with PGA
LTC1565-31 650kHz Continuous Time, Linear Phase Lowpass Filter 7th Order, Differential Inputs and Outputs
LTC1566-1 2.3MHz Continuous Time Lowpass Filter 7th Order, Differential Inputs and Outputs
1562fa
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1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507 ●
www.linear.com LINEAR TECHNOLOGY CORPORATION 1998