2012 IEEE Nuclear Science Symposiwn and Medical Imaging Conference Record (NSS/MIC) N14-20

Fully active voltage divider for PMT

photo-detector
Michael Heifets, Pavel Margulis, Member, IEEE

Abstract- A high voltage divider is one of critical parts which

define performance of photo-multiplier tube (PMT) based photo­ II. BACKGROUND
detector. It directly influences the main characteristics of the
photo-detector - gain control range, linearity, transient response, o Light

power consumption and heat dissipation, lifetime, required PCB

area and volume, as well as cost. This paper describes a new
Fully Active Voltage Divider (FAVD) for PMT which provides
significant improvement in performance of wide dynamic range
PMT photo-detectors. The paper includes requirements for a
PMT high voltage divider, an overview of prior state of the art,
operation principles and features of the developed FAVD, and
measurement results.
The presented FAVD design is protected by patent application. From energy WUfce

Figure 1 Block diagram of the PMT based photo-detector

I. INTRODUCTION
A PMT is a photo-sensor, which combines two main parts:
The main function of all general purpose photo-detectors is • photo-cathode K, converting the input light intensity to
to convert an input light intensity to electrical output signal the electron flux intensity, i.e. to electrical current
with minimal error. • electron multiplier, consisting of:
There are many types of possible errors:
o Dynodes Dyl ..DyK, each of them amplifies electron
• linearity error- the photo-detector transfer function is not flux (electrical current), where the amplification
constant at different light intensities factor depends on the applied inter-electrode biasing
• transient error- transient distortions of the signal voltage;
• temporal error - the photo-detector transfer function is not o Anode P, collecting the amplified electron flux
constant in time (memory effect, etc.) (electrical current) and transmitting it to the load
• noise- shot noise, "thermal" noise, flicker noise, etc. amplifier for further processing.
For PMT operation with minimal error, the voltages on all
The typical photo-detector consists of three main parts: its electrodes (cathode K, all dynodes Dyl ..DyK, anode P)
• Photo-sensor, i.e. converter of the input light intensity have to be constant and independent of input light.
signal to the electrical signal. For the matter of this work,
it is a photo-multiplier tube (PMT).
• Photo-sensor biasing circuit, providing required photo­
sensor operation conditions. For the matter of this work, it
is a voltage divider for PMT.
• A read-out amplifier, receiving the signal from the photo­
sensor and amplifying it to the required level.
The FAVD was designed in order to improve performance
of the photo-sensor biasing circuit, i.e. PMT voltage divider.
From energy source

Figure 2 PMT electrodes and biasing circuit currents

A PMT operation in response to the input light signal:

• Photons, striking the photo-cathode K, generate the
electron flux, flowing from the cathode to the dynode
Dy1. From the outside of the PMT, it appears as the
cathode current, flowing out of the cathode electrode and
Manuscript received on November 4, 2012. as the dynode current, flowing into the dynode Dy1.
• Since the voltage between the cathode K and the dynode
This work was supported by Applied Materials (Israel) Ltd. Dyl is equal to VI (provided by the biasing circuit), an
electron, arriving at Dynode Dyl , will have energy of VI
Authors are with Applied Materials (Israel) Ltd., Oppenheimer 9, "Tamar"
Science Park, Rehovot, 76705, Israel (e-mail: Michael_Heifets@amat.com , [eV]. Each electron, releasing this amount of energy,
Pavel_Margulis@amat.com).

978-1-4673-2030-6/12/$31.00 ©2012 IEEE 807

 causes a secondary emISSIon from the material of the
dynode, and the amount of emitted electrons is usually
higher than one. The secondary electron flux appears
from the outside of the PMT as the electrical current,
flowing out of the dynode Dyl . This secondary dynode
current IDy out is higher than the primary dynode current
_
IDy in, therefore, resulting in the total dynode current IDy=
_
IDy ouc IDy in, flowing out of the dynode. These secondary
_ _
electrons are directed by the applied electrical field
(produced by the biasing circuit) to the next dynode,
where the process repeats until it reaches the anode
electrode, where all collected electrons are directed to the
load amplifier for further processing.
Figure 3 Currents through the PMT dynode
•
A voltage divider with taps connected to PMT electrodes.
Note that most commercially available high voltage DC-DC
converters respond to the fast output current transients with
slow and significant output voltage changes.
Requirements for the PMT biasing voltage divider:
1. Maintain constant PMT electrode voltages over a wide
range of incident light intensities, or correspondingly,
over a wide range of the PMT electrode currents
2. Minimize voltage transients at the output of the HV
power supply, which commonly happen at fast signal
variation, or correspondingly, to minimize the high
voltage power supply output current transients
3. Maintain above properties in a wide range of PMT gains
4. Limit maximum current, flowing through PMT, to the
lowest possible level, in order to increase PMT lifetime.
The PMT current limit value should not depend on the
PMT gain, i.e. on applied high voltage.
5. Minimize current drawn from the HV power supply.

III. PMT VOLTAGE DIVIDER KNOWN CIRCUIT ARCHITECTURES

It is important to mention, that all electrodes of the PMT
behave like current sources, i.e. in order to maintain a certain l. "Simple" resistive voltage divider (bleeder), see [I ]
biasing voltages on them, the biasing circuit should have low 2. Resistive voltage divider with booster, see [I ]
output impedance and a load amplifier should have low input 3. Semi active voltage divider 1 (by Kerns), see [2]
impedance. 4. Active voltage divider (by Electron Tubes Enterprises),
In addition, it is very important to mention that from see [3 ]
electrical point of view, a PMT may be treated as a passive 5. Semi active voltage divider 2 (by Mitchell), see [4].
node (with no energy sources inside it) and therefore a
A. "Simple" resistive voltage divider
Kirchhoff Current Law (KCL) may be applied to it, resulting
in The biasing circuit for PMT consists of a string of passive
(I ) components: resistors and capacitors - connected in series
across HV power supply. This network produces a voltage
divider with taps connected to PMT electrodes. The resistance
So, limiting the sum of the cathode and dynodes' currents
values of these resistors are chosen to provide an appropriate
will limit an anode current of the PMT, and consequently will
voltage differences (VI , V2, V3, Vk, Vp) between
limit the P MT degradation, resulting in increase of the PMT
electrodes.
lifetime. 6(K1)

+
, PMT

The photo-detector transfer function is defmed as following: ,,, �

Load
Vo

,,
n 0i
P Todet
K ,
Vo
T = p:- = R X X op x G = K G-:
"
'-./
jlD
'-,..../
OV'
'-,-/
Oy(K-l)

!IDylU)
'-./
OV'

jlD l"Oild
In
i=l VI •
yl
b yK

D�
V2 V3. -V(K-l)'" V< VP

= /
R X kK X VD KXa) X op X G (2) C �
l

"
C fr
"
2 CO y3 O

1-
R (K-l

- �I
K R C Dy!
"
K+l)

where R is a responsivity of the cathode, 0i is a single dynode � � � �)

�
gain, K is the number of dynodes in a specific PMT, op is the " " " "
�l
' R(K+l)

anode gain (usually it is less or equal to I ), G is the load Voltage divider

amplifier gain, VDY is the voltage applied between the dynode - ",
and the previous electrode (assuming that it is equal for all
dynodes), and k and a are dynode specific constants, which From V
H power supply

depend on the dynode material and PMT internal construction.

The PMT gain is controlled by inter-electrode voltages VDY• Figure 4 "Simple" resistive voltage divider

In order to achieve a wide range of gains, the inter-electrode

voltages should be controlled for all electrodes in the widest
possible range.
A PMT biasing circuit consists of the following:
• High voltage power supply, usually a high-voltage, low
ripple and noise DC-DC converter with controllable
output
The resistive voltage divider is not able to fix voltages
between electrodes because of PMT electrode currents flowing
through the divider, having relatively high output impedance.
The electrode current depends on light intensity, so, in turn,
the voltage between electrodes and consequently the PMT
gain will change with light intensity, causing non-linear
effects and signal distortion. As a rule of thumb, a linear

808
response of the PMT that is adequate for many applications In Figure 6, a biasing circuit for 12 dynode PMT is shown.
can be achieved if the electrode currents are less than about Dynodes Dyl to Dy6 here are "low current" dynodes (i.e.
5% of the current through the voltage divider at lowest producing relatively low current levels) while Dy7 to Dy12
operating high voltage. This dramatically raises the voltage are "high current" dynodes. The PMT "high current" dynodes
divider power dissipation and requirements for HV power are supplied by transistors connected in an emitter-follower
supply capacity, making the solution almost unpractical for configuration serving like low output impedance buffers,
high dynamic range PMT application. while the PMT "low current" dynodes Dyl to Dy6 are
supplied by a passive voltage divider comprised solely of
B. Resistive voltage divider with booster
resistors. The voltages at "high current" dynodes are
A natural development of the "simple" resIstIve voltage established by the voltage divider comprised of resistors in the
divider circuit is a resistive circuit with current boosting. base circuits of transistors. The transistor buffers keep the
voltages across these dynodes almost constant, i.e.

1F{7=
b(Kl)

,
PMT independent of dynode current and therefore independent of
,
,
,
+--
Load
Vo incident light.
, P lode!
, This is not true however for the "low current" dynodes
� '-,-/ '-,-/ '-..-I '-,-/
,

" "" "" j where the voltages across the electrodes are built solely by a
L� b � ! 1
K .. Oy(K-l)

D
I V(K-l) lDyK 11Oi1d

- VI +
. . chain of resistors. Operating in low gain mode (and,
''''' '"
V2 • - V3+ V(K-l)+ VK VP

���T
CDy3 RD(K-l CDy(K+l)
correspondingly, with high incident light) the "low current"
I-
dynodes may carry considerably high currents that course
'" � '" � �) voltages between dynodes to vary with variation of incident
" " " "
U U
(R K+l)
light, i.e. cause non-linear distortion. The transients in the
Voltage divider
"low current" dynodes currents are followed by voltage
H
- VI HV2
transients at the output of high voltage power supply causing
t PMT gain modulation.
Fo
r m
HVlpowe,supply Fo
r m
HV2powe,supply

Figure 5 Resistive voltage divider with booster
This circuit combines few (practically two) resistive voltage
dividers where each divider is supplied by its own high
voltage power supply. One power supply feeds the high
voltage divider with relatively low current for "low current"
dynodes, and another one supplies lower voltage with higher
current to "high current" dynodes. The second high voltage
power supply may be connected to any of the dynodes,
depending to the system requirements in terms of the PMT
gain range and others. Its advantage relative to the "simple"
resistive divider is that in total it allows to decrease
significantly the power dissipation of the PMT circuit. It
achieves this on account of reduced range of PMT gains. But
other disadvantages of the resistive divider are still relevant
for this circuit architecture.
C. Semi active voltage divider
In 1977 C.R. Kerns published a new solution for PMT
voltage bias circuit with active loads [2]. The term "active"
signifies the use of transistors in the voltage divider circuit, as
opposed to passive voltage divider comprised solely of
resistors and capacitors.
, 01 " " " os
[i , -'
The current through the voltage divider is set by the current
source. In the voltage divider proposed by Kerns the current
source configuration makes this current to be proportional to
HV. In PMT application with variable gain the last is set in the
range of GAINMIN to GAINMAX by HV setting in the range of
HVMIN to HVMAX. In high dynamic range light detectors the
PMT maximum anode current is usually given, it does not
depend on PMT gain, and this dictates the maximum required
current in the voltage divider. At GAINM1N (i.e. at HVMlN) the
divider current has to be sufficient for supporting the given
maximum anode current. At GAINMAX (i.e. at HVMAX) the
HVm
current through the same divider is ax times more than it
HV
min
is required. This increases power dissipation and raises
requirements for HV power supply capacity.
The Kerns solution uses emitter followers on bipolar NPN
transistors like buffers at the outputs of the resistive divider.
The transistors are connected in series and current through
1 (by Kerns) transistors is set by a current source. It shall be noted that the
same circuits could be built with source followers on N­
channel MOSFETs.
The voltage followers are widely used in the known art.
Their operation is described further in details.
06 07 " " 010 011 012 "
-' -' , -' He-�v
PMT

J J , J
SOQ
K Dy1 Dy2 Dy3 Dy4 Dy5 DyO Dy7 DyS Dy9 O ylO Dyll Dy12

Cl Cl Cl C1 Cl Cl
" " "
a a a a a
"D t1 OrqDqDt..tD :ID�
/.. �

" " " " "

y"
2R l/2R 3/4R l/2R 1/1R l/2R

Voltagedivi r
/
·HV Current source

,I V Div
'I
HVPowerSupply
(al (bl
Figure 6 "Semi-active" voltage divider, proposed by C.R.Kerns Figure 7 Voltage follower in PMT biasing circuit

809
 MOSFETs and also "there does have to be at least one
The voltage follower (VF) maintains the dynode voltage to resistor, R in the active string in order to set the standing
be Voy = VOiv + fj. V, where fj. V is a Gate-Source voltage of current" through the string of P-channel MOSFETs. This
conducting MOSFET. In Figure 7 it is shown that, since a voltage divider provides PMT currents on demand without any
PMT is a current amplification device, a dynode is operating limitations, as they are required by illuminated PMT. The
as a current source producing a current loy, "seen" by the current from the power supply varies with illumination and
external circuit with PMT anode current. It means that high voltage power
lo = lo _out - IO jn supply experiences output current transients and therefore
y y y
generates voltage transients on its output, which in turn
The total current through the voltage divider is set by the
modulates the PMT gain.
current source and equal to
Ics = I + lo , resulting in I = Ics - lo E. Semi active voltage divider 2 (by Mitchell)
Q y Q y
The stand-by current through the voltage follower transistor Paul A. Mitchell from Burle Technologies, Inc., in his
with no dynode current (with no illumination) is set by the patent US 7,005,625 Bl , proposed PMT circuits with different
current source to Ics. voltage dividers, which are depicted in Figure 9.
As soon as illumination is rising, the dynode's current
lo starts to rise, but the Ics remains constant. Therefore,
y
simultaneously, a current through the voltage follower IQ
starts to decrease.
As soon as the dynode current loy approaches the current of
the current source Ics, the current through transistor IQ

O}If
approaches zero and the voltage across the transistor drops to
zero. At close to zero voltage between PMT electrodes the
accelerating electrical field collapses, effectively decreasing
the dynode current. PMT transfer function is not linear any
more, the dynode and anode currents are limited preventing
PMT degradation. This protective function is also an inherent
feature of the Kerns "semi-active" voltage divider, utilizing a
string of emitter followers connected in series. The first
transistor to be shut down with rising of illumination is an
(, ) (b)
emitter follower supplying the last dynode (closest to anode). m\
If the illumination continues to rise, the next (to the left on
Figure 6) dynode current increases; when it comes near the
current level of Ics, the second (to the left on Figure 6)
transistor shuts down. With further increase of photocathode �\
�\
incident light the process repeats until all transistors supplying

�{ �{
dynodes have become non-conducting. Until the current
source (marked on Figure 6 by red circle) functions properly
(the voltage across it is within a compliance voltage range) the
dynodes currents and the anode current are limited by the level
not exceeding the current generated by the current source.
D. Active voltage divider (by Electron Tubes Enterprises)

(0) (d)

Current source

HVPowerSupply

Figure 8 Active voltage divider (by Electron Tubes Enterprises)

Electron Tubes Enterprises, in their reprint 097, describe the

PMT active voltage divider shown in Figure 8.
It consists of a string of high impedance resistors, defining a
voltage distribution, and in parallel a string of P-channel

810
 1. Desensitize the high voltage power supply to the current
transients, caused by PMT. This is done by use of a
current source (CS) at the HV power supply output,
connected in series. Simultaneously, it limits a total
current, consumed by the voltage divider and by the PMT.
2. Provide PMT electrode voltages with low output
impedance buffers: voltage followers are used to drive
each electrode. The voltages at the inputs of voltage
followers (VF) is set by high impedance resistive voltage
divider, connected directly to the HV power supply output
before CS. All VF-s are connected in series.

The final block diagram of the FAVD is shown in Figure 10

" 6(K-l)

� m PMT

Figure 9 PMT circuits per US patent 7,005,625 Bl by Paul A.

Mitchell

Dyl Dy(K-l) DyK

Following is a description of above configurations: � _-�J <E--- . • ___ _-�

•
- VI t _ Vl + _ V3 t - V K-l t - VK +
Option (a) is a general view of the voltage multiplier with 1 1K 1 IDyl 1 IDyl ! 1Dy(K-l) ! IDyK

two taps, which connect it to two voltage divider � � � � �1)

networks.
• Option (b) is like option (a), where both voltage divider
networks are resistive. The disadvantages of the resistive
voltage divider network were discussed above.
•
R(Ktl} R(Ktl)
Option (c) is like option (a), where the first voltage
Voltage divider
divider is made resistive and the second voltage divider is
made, like proposed by C.A. Kerns, see above. Therefore,
it suffers from the same disadvantages. HVpowersupply

• Option (d) is like option (a), where the first voltage

divider is made resistive and the second voltage divider is
made, like proposed by C.A. Kerns, but with
improvement, which eliminated dependence of the divider
current on the HV value. It still suffers from PMT gain
modulation by the light transients at low gains, due to the
fact that first voltage divider is resistive. Its additional
disadvantage is that a gain of Dy6 is fixed by the Zener
diode ZI and transistor Q2 and doesn't change with HV,
therefore the range of gains of this circuit is limited.
• Option (e) is like option (d), but implemented on FET
transistors, instead of bipolar transistors.
• Option (t) is a voltage multiplier with many taps, by
which it is connected to the voltage divider network,
where "low current" dynodes are still connected to the
resistive part of the voltage divider with its disadvantages,
as described above.
The best known PMT voltage divider architectures,
mentioned above, do not comply with all requirements to
PMT voltage dividers at wide range of input light intensities
and PMT gains.
IV. DEVELOPMENT OF NEW SOLUTION FOR PMT VOLTAGE
DIVIDER
Figure 10 Final block diagram
It operates as following:
1. HV power supply provides high voltage to the voltage
divider.
2. Resistor ladder Rl ...R(K+2) generates reference input
voltages for the voltage followers.
3. Current source CSI sets a current les through voltage
divider, and as result it sets a maximum anode current.
4. A ladder of voltage followers sets voltages at PMT
electrodes and, simultaneously, provides low impedance
voltage sources to those electrodes.
The CS may be implemented as a two-pole device in many
ways, e.g. with bipolar transistor, Zener diode and resistor;
enhancement mode MOSFET, Zener diode and resistor;
depletion mode MOSFET and resistor.
The VF may be implemented as emitter follower on bipolar
transistor or as source follower on MOSFET.
The fmal circuit schematic with CS, built on depletion
mode MOSFET, and VFs, built on N-channel MOSFETs, is
shown in Figure 11

The analysis of known circuit architectures showed that

they do not fully comply with the main requirements of the
PMT voltage dividers stated in chapter II.
The following steps have to be undertaken:

811
 PMT
6
(K-l)
than a current limit, set by the CS. Therefore, all
measurements were performed in linear mode.
The measurements were done on DC with continuous light
of different intensities (DC) and with pulse modulated light
l ,'oad applied to the cathode.
During DC measurements the PMT inter-electrode voltages
were recorded at no light and at maximum linear anode
current (400 uA) for different high voltage values.
O(K+l)
HV power supply power consumption was recorded.
PMT maximum achievable gain was measured.
During transient response measurements, the input light
" R(K+l) (R K+2)

..,i--'---1f---'----+---' signal was modulated by the pulse with rise and fall time
C K
R C R(�+l) C (R K+2)

tr=tf=20 Ils, pulse duration t=10 ms and with period T=100

Voltage divider
ms. Oscillograms of following signals were recorded:
L-____� �------___1�
• Input light signal- by means of high speed reference
V
H power supply
photo-detector and scope
Figure 11 Detailed implemented schematic
• High voltage by scope with 100: 1 probe
• Anode current by oscilloscope with 50 Ohm load.
Zener diodes Dl ... D(K+1) protect MOSFETs during photo­
detector saturation. Capacitors CRl ...CR(K+2) reduce A. DC measurements results
thennal noise, generated by resistors Rl ...R(K+2). Capacitors
C Dyl ... C Dy(K+1) compensate for finite response time of �V/v [%)
voltage followers during fast light transients.
5.000
K-Dy1
V. MEASUREMENT RESULTS
0.000 Dyl-2
The light detector with new FAVD has been compared to Dy2-3
detector with resistive voltage divider with booster (RVD+B). -5.000
Dy3-4
The same PMT sensor from Hamamatsu Photonics (metal Dy4-5
-10.000
case, 8 dynodes, model R7400) has been used in both
Dy5-6
detectors. -15.000
Dy6-7
The full scale (i.e. maximum linear) anode current has been
-20.000 Dy7-8
selected to be 400 uA.
300 400 500 600 700 800 900 1000
In the proposed configuration the CS current (i.e. anode HVIV)
current limit) has been set to 700 uA. Figure 13 RVD+B: PMT inter-electrode voltage variation versus
In RVD+B configuration the current from the "booster" HV anode current change from 0 to 400 uA at different high voltages
power supply was selected to be 4 rnA (10 times the full scale [VI
current). This is due to the trade-off between the photo­
detector linearity and still reasonable power consumption. The �V/v [%)
second "booster" HV power supply has been connected to the 0.350

dynode 6 of the PMT. 0.300

fW
PMT R7400 0.250 K-Dy1

Load 0.200 Dyl-2

P Vo

0.150 Dy2-3
'--.-/ '-.-/ '-.-/ '-,.-/
K Dyl 0,6 0,7 DyS 0.100 Dy3-4
0.050 Dy4-5
�� �� �t

� I
0.000 Dy5-6
l n 1000 lOOn l n 50 lO 50 1000

" I- .., " "

-0.050 Dy6-7
-0.100 Dy7-8

!l 300 400 500 600 700 800 900 1000

243K 243K 243� 10K 10K 5K

Voltage divider
HVIV)

l()()V .1 Figure 14 FAVD: PMT inter-electrode voltage variation versus

'I anode current change from 0 to 400 uA at different high voltages
HV 2 powersupply

[VI
200to-1000V
.V
/'1
HVlpowersupply

Figure 12 Reference configuration - RVD+B

By definition, the proposed FAVD is intended for use in

linear mode. It doesn't support the use of the photo-detector in
overload condition, i.e. when expected anode current is higher

812
 Estimated �M/M [%] III
7.�.OO Run 1; Trig'd
.

u
20.00

15.00

� I
10.00 ( ill i\Il'l-i
� rWD+O 1 U. 2uln\'

�
� 1\ "" A:"
5.00 � FAvn

0.00
_

, J�0�
-5.00

300 ,100 500 600 700 800 900 1000

HV[V)

Figure 15 PMT gain M estimated variation versus anode current

change from 0 to 400 uA at different high voltages [V]

�'120.0I1lS A f �S.OI1lV
Maximum achieved gain (at HV=lOOO V) for RVD+B
�M"y2012
configuration is ""200,000, and for FAVD configuration is .. 11. 20 °0 15: 32: 1 0

>450,000. Figure 18 RVD+B: oscillograms at gain M""12,OOO

Maximum power consumption of RVD+B configuration is
""4.3 W, and for FAVD configuration it is ",,1.4 W.
B. Transient measurements results

Figure 19 FAVD: oscillograms at gain M""12,OOO

Figure 16 RVD+B: oscillograms at gain M""900

Figure 20 RVD+B: oscillograms at gain Mz80,000

Figure 17 FAHVD: oscillograms at gain M""900

813
 Figure 21 FAVD: oscillograms at gain M""SO,OOO

VI. DISCUSSION

It should be mentioned that usability of the FAVD

configuration is limited to applications with the signal into the
linear range and without saturations.
Transient response test shows that RVD-B configuration
"suffers" from pulse top distortions, which are correlated to
high voltage (RV) variations during the pulse. This distortion
is especially pronounced at low PMT gains «10,000). The
long RV relaxation time (",,60 ms) after the pulse will
definitely cause additional signal distortion.
The pulse top distortion declines with increasing PMT gain
(i.e. with increasing of the applied HV).

VII. CONCLUSIONS

Our tests have shown that when comparing FAVD with

RVD+B, the new fully active voltage divider for PMT biasing
presents a number of significant advantages combined in a
single photo-detector solution:
• The PMT gain variation, due to inter-electrode voltage
change, decreased from ;::020% to ;::00.5% for high voltages
above 500 V
• Maximum achieved PMT gain is 2.5 times higher
• The FAVD requires only one high voltage power supply
voltage
• Maximum power consumption is 3 times less
• Low and constant high voltage power supply current does
not depend on input light intensity. As a result, transient
distortions of anode current are significantly reduced.
• The FAVD features a PMT protection function: the PMT
electrodes currents are limited. The current limit does not
depend on PMT gain.

REFERENCES

[I] Hamamatsu Photonics. Catalog of Photomultiplier Tubes and related

products. 2008. p. 86.
[2] A high-rate phototube base. Kerns, C. R. s.1. : IEEE Transactions On
Nuclear Science, February 1977, Vols. NS-24, No.1
[3] Electron Tubes Enterprises. Reprint 097.
[4] Mitchell, Paul A. Low power stabilized voltage divider network. US
7,005,625 BI USA, February 28, 2006.

814