ATHUL KRISHNA AB

”Passionate about the dynamic world of digital electronics, as an 3rd year electronics engineering student
from CET, I bring a drive for innovation and a deep curiosity for cutting-edge technology to every project.”
athulkrishnaab2003@gmail.com | +91 7012597947 | KRISHNAPRIYA(H),PALLIKURUP,MANNARKKAD,PALAKKAD,KERALA
678582
Linkedin

EDUCATION
METEMHSS June 2009 - March 2019
High School General MANNARKKAD
GPA: 10
VINCENT DE PAUL HIGHER SECONDAR SCHOOL June 2019 - March 2021
Higher Secondary Computer Science Pala,Kottayam
Percentage: 99%%
COLLEGE OF ENGINEERING TRIVANDRUM(CET) November 2021 - March 2025
Bachelor of Technology Electronics and Communication Engineering TRIVANDRUM,KERALA
CGPA: 9.27

EXPERIENCE
ISTE SC CET | Project Coordinator TRIVANDRUM,KERALA | September 2021 – Present
I got a selected to this role through a Interview process.ISTE CET conducts various technology related
and society oriented Workops for Students.
IEDC CET | Technical Team Member TRIVANDRUM,KERALA | September 2022 – Present
IEDC CET aims to foster entrepreneurship interests among Students.
ISTE SC CET | Tech4Society Head Trivandrum | October 2023 – Present

SKILLS
Programming Languages
Libraries/Frameworks
Tools / Platforms
Databases
C, C++, PYTHON, ARDUINO IDE, 8051 ALP, Verilog,TCL, System Verilog
Numpy, Pandas, Matplotlib, Silvaco 45nm PDK, YOLOV5
Simulink, Quartus Prime, Xilinx Vivado, OpenROAD Physical Design, Open-
STA Timing Analysis, Synopsys VCS, Cadence genus, LTSpice, Glade Layout,
Yosys Logic synthesis, Proteus, ModelSim
STA, RTL Coding, Digital Logic, FPGA Implemntation using vivado, CMOS
Logic implementation

PROJECTS / OPEN-SOURCE
LANDSLIDE WARNING SYSTEM | Link Arduino UNO, Ultrasonic sensor, Vibration Sensor, Soil Moisture
Sensor, Wireless transmitter, esp8266 wifi module
This device has a transmitter consisting of Arduino UNO,Different sensors to read the data from land area
and a transmitter to sent it.Receiver part processes it and genrate alarm

FPGA IMPLEMENTATION OF SEQUENCE DETECTOR,GENERATOR,COUNTER,FSM . Xilinx

vivado,Verilog
With this I was able to get an exposure towards FPGA Implementation of verilog code and how our
hardware will get modelled in real. I was also able to get in touch with xilinx vivado .

UART TRANSMITTER RECEIVER IMPLEMENTATION IN XILINX VIVADO | Link Verilog xilinx vivado
 With this project i was able to understand how uart protocol works and how it can be implemented in
verilog.

RTL,LOGIC SYNTHESIS,OPTIMIZATION,TIMING ANALYSIS AND LAYOUT OF A UART

TRANSMITTER | Link Yosys Logic Synthesis,OpenSTA,OpenROAD,verilog
With this project i was able to get an understanding how an design written in verilog file is implanted in
silicon through various steps .Yosys was used for logic synthesis and optimization,OpenSTA for timing
analysis,OpenROAD for Placement,Poweplanning,CTS and OpenROAD.

ADVANCED HOME SECURITY SYSTEM WITH OBJECT DETECTION, IMAGE PROCESSING AND
REAL TIME AUDIO COMMUNICATION YOLOV5,Raspberry pi,Pyaudio,OpenCV
With this project I was able to implement custom trained YOLOV5 on raspberry PI. Re time Voice
Communication enabled using microphone and Pyaudio. OpenCV for image processing

CERTIFICATIONS
• Simplilearn Python for Beginners - Simplilearn
• Analog Circuits - NPTEL
• PROJECT SUBMISSION CERTIFICATE - DRISHTI,CET TRIVANDRUM
• VLSI Fundamentals - NIELIT
• Proteus Workshop - IEEE SB CET
• IEEE Pragithi Mentorship - IEEE
• Digital Electronic Circuits - NPTEL
• RTL Design and Verification course - TREST RESEARCH PARK
• VLSI DESIGN FLOW RTL TO GDS - NPTEL

HONORS & AWARDS

• KEAM 2021 RANK-565
• JEE MAINS 2021 PERCENTILE-95
• CUSAT CAT 2021 RANK-94
• AICTE GATE SCHOLARSHIP 2022
• Silver Medal NPTEL VLSI DESIGN FLOW RTL TO GDS
• Gold Medal in NPTEL Analog circuits Exam and among top 5 % of students.
• Finalist in ENRICH ENGINEERING Challenge an Ideathon conducted by CETAA DC and IEDC CET.