SYLLABUS FOR

EE 207 – ELECTRICAL CIRCUITS AND LOGIC DESIGN

TED UNIVERSITY
DEPARTMENT OF ELECTRICAL AND ELECTRONICS ENGINEERING
Academic Year & Semester 2023-24 Spring Page 1 of 6

Electrical Circuits and Logic

Course Code EE 207 Course Title
Design
☒ Compulsory
Type of Course Semester ☒ Fall ☐ Spring ☐ Summer
☐ Elective

Credit Hours / Pre-requisite NONE

(2+0+2) 3 Credits / 6 ECTS
ECTS credits
Co-requisite NONE
Mode of ☒ Face-to-face Language of ☒ English
Delivery ☐ Distance learning Instruction ☐ Turkish
☐ First Year ☐ Masters
☒ Undergraduate
Year of ☒ Sophomore ☐ Doctorate
Course Level ☐ Graduate (MS)
Study ☐ Junior
☐ Graduate (PhD)
☐ Senior

Dr. Javad Haghighat

E-mail: javad.haghighat@tedu.edu.tr | Room: A321
Office Hours Thursday 11:00-12:00
Res. Asst. Bengisu Ünalan
E-mail: bengisu.unalan@tedu.edu.tr |
Res. Asst. Gülce Turhan
Teaching E-mail: gulce.turhan@tedu.edu.tr |
Assistant(s) Res. Asst. Parisa Naghinazhadahmadi
E-mail: parisa.naghinazhad@tedu.edu.tr |
Res. Asst. Zeynep Sıdıka Seven
E-mail: zeynep.seven@tedu.edu.tr |
Bengisu Ünalan
Gülce Turhan
Office Hours
Parisa Naghinazhadahmadi
Zeynep Sıdıka Seven
Course Section 01 Thursday (09:00–11:00) @G103, Friday (15:00–17:00) @A311-L
Schedule Section 02 Friday (10:00–12:00) @G103, Thursday (15:00–17:00) @A311-L

Number systems, conversions, data representation, and Boolean Algebra. Binary logic
Catalog
and gates. Combinatorial and sequential circuit design. Experiments on registers,
Description
counters, and programmable logic.
This course provides a comprehensive introduction to the fundamentals of the number
system, Boolean Algebra, and digital design. The course equips students with a solid
Course
understanding of these foundational principles through theoretical concepts and
Objectives
practical applications, setting the stage for further exploration and application in digital
systems and engineering.

Required Mano, M., Morris, R., & Ciletti, M. D. (2013). Digital design: with an introduction to
Reading the Verilog HDL. Pearson.

Suggested /
Recommended N/A
Reading
 SYLLABUS FOR
EE 207 – ELECTRICAL CIRCUITS AND LOGIC DESIGN
TED UNIVERSITY
DEPARTMENT OF ELECTRICAL AND ELECTRONICS ENGINEERING
Academic Year & Semester 2023-24 Spring Page 2 of 6

Software Usage Xilinx ISE WebPACK Design Software, Proteus, LTspice

Upon successful completion of the course, students will be able to:

LO-1: Recognize the number systems and Boolean Algebra,
LO-2: Classify a logic circuit based on Boolean functions for presenting alternative
circuits,
Course LO-3: Use Karnaugh Maps to showcase minimized Boolean functions and visual
Learning representations of two-level implementations of logic circuits,
Outcomes LO-4: Analyze diverse combinational circuits (adders, multipliers, encoders, etc.) to
(LOs) comprehend designs and functions,
LO-5: Evaluate synchronous sequential circuits (flip-flops, latches), judging their
operational principles and effectiveness,
LO-6: Experiment with registers, counters, and programmable logic in collaboration
with peers.

Course
Course feedback survey will be conducted in the last two weeks of the semester.
Evaluation

Course Web The class has already been enrolled in Moodle (https://lms.tedu.edu.tr/). All
Page announcements and course-related materials will be posted on the Moodle course page.

Some Useful
Website N/A
References

☒ Brainstorming ☐ Scaffolding / Coaching

☒ Hands-on Activities
☒ Case Study/Scenario ☐ Seminars
☒ Inquiry
Analysis ☐ Service Learning
☒ Collaborating ☐ Microteaching
☐ Simulations & Games
Learning ☐ Concept Mapping ☐ Oral Presentations /
Reports ☒ Telling / Explaining
Activities & ☒ Demonstrating
Teaching ☐ Peer Teaching ☐ Think-Pair-Share
☒ Discussions / Debates ☐ Video Presentations
Methods ☐ Predict-Observe-Explain
☐ Drama / Role Playing ☒ Web Searching
☒ Problem Solving
☒ Experiments ☐ Other(s):……………
☒ Questioning
☐ Field Trips
☒ Reading
☐ Guest Speakers

☒ Case Studies / Homework (…%) ☐ Presentation (Oral, Poster) (...%)

☒ Lab Assignment (25%) ☐ Project (...%)
☐ Observation (...%) ☒ Quiz (10%)
Assessment
☐ Oral Questioning (...%) ☐ Self-evaluation (...%)
Methods &
Criteria ☐ Peer Evaluation (...%) ☒ Test/Exam (65%)
☐ Performance Project (...%)
(Written, Oral) ☐ Other(s):……… (...%)
☐ Portfolio (...%)

☐ Case Study Analysis (... hrs) ☐ Online Discussion (... hrs)

 SYLLABUS FOR
EE 207 – ELECTRICAL CIRCUITS AND LOGIC DESIGN
TED UNIVERSITY
DEPARTMENT OF ELECTRICAL AND ELECTRONICS ENGINEERING
Academic Year & Semester 2023-24 Spring Page 3 of 6

☒ Course Readings (42 hrs) ☐ Oral Presentation (... hrs)

☐ Debate (... hrs) ☐ Poster Presentation (... hrs)
☐ Demonstration (... hrs) ☒ Report on a Topic (28 hrs)
☒ Exams/Quizzes (42 hrs) ☐ Research Review (... hrs)
☐ Field Trips/Visits (... hrs) ☐ Resource Review (... hrs)
Student ☐ Hands-on Work (12 hrs) ☐ Team Meetings (... hrs)
Workload ☒ Lab Applications (28 hrs) ☐ Web Designs (... hrs)
☒ Lectures (28 hrs) ☐ Work Placement (... hrs)
☐ Mock Designs (... hrs) ☐ Workshop (... hrs)
☐ Observation (... hrs) ☐ Other(s):……… (... hrs)
Total Workload 180 hrs

TENTATIVE OUTLINE
Any changes and updates will be announced on the course web page.
Textbook Teaching
Week Topics Lab. LOs Assignments
Reading Assistant
Digital Systems and
1 No Lab 1 Ch. 1 No Lab
Binary Numbers
Digital Systems and
2 No Lab 1 Ch. 1 No Lab
Binary Numbers
Boolean Algebra and
3 No Lab 1,2 Ch. 2 No Lab
Logic Gates
Boolean Algebra and
4 No Lab 1,2 Ch. 2 No Lab
Logic Gates
No Lab Quiz
5 Gate‐Level Minimization No Lab 2,3 Ch. 3 (tentative
date)

Half Adder- Zeynep

6 Gate‐Level Minimization 2,3 Ch. 3
Full Adder Sıdıka
Seven
Zeynep
Half Adder-
7 Combinational Logic 3,4 Ch. 4 Sıdıka
Full Adder
Seven
Decoders-
Gülce Midterm
8 Combinational Logic 3,4 Ch. 4 Turhan (tentative
Multiplexers
date)
Synchronous Sequential Decoders- Gülce
9 Ch. 5
Logic Multiplexers Turhan
Synchronous Sequential Latches and Bengisu
10 Ch. 5
Logic Flip Flops Ünalan
Synchronous Sequential Bengisu
Latches and
11 Logic, Registers, and
Flip Flops
Ch. 5, 6 Ünalan
Counters
 SYLLABUS FOR
EE 207 – ELECTRICAL CIRCUITS AND LOGIC DESIGN
TED UNIVERSITY
DEPARTMENT OF ELECTRICAL AND ELECTRONICS ENGINEERING
Academic Year & Semester 2023-24 Spring Page 4 of 6

Seven Parisa
12 Registers and Counters Segment Ch. 6 Naghinazh
Display a-dahmadi
Seven Parisa
13 Registers and Counters Segment Ch. 6 Naghinazh
Display a-dahmadi
Evaluation and
announcement
Memory and of the lab.
14 Programmable Logic reports Ch. 7
Review (Appeals for
the laboratory
exam).
FINAL EXAMS WEEK (date and time to be announced later).

COURSE ASSIGNMENTS & GRADING

A. Quiz [10%]
There will be 1 quiz, 10% for the work.
B. Midterm Exam [30%]
There will be a midterm exam, 30%. There will be a cumulative closed-book midterm exam covering all
topics.
C. Final Exam [35%]
There will be a cumulative closed-book final exam covering all topics. The date and time of the final will
be announced at the end of the semester.
D. Laboratory Work [25%]
There will be 4 experiments, 6.25% for each experiment.

COURSE ASSESSMENTS & LEARNING OUTCOMES MATRIX

Assessment Methods Course Learning Outcomes
Laboratory Work LO# 2-6
Quizzes LO# 1–3
Homework Assignments No homework
Midterm Exam LO# 1–4
Final Exam LO# 4–6

COURSE POLICIES
I. Attendance
 SYLLABUS FOR
EE 207 – ELECTRICAL CIRCUITS AND LOGIC DESIGN
TED UNIVERSITY
DEPARTMENT OF ELECTRICAL AND ELECTRONICS ENGINEERING
Academic Year & Semester 2023-24 Spring Page 5 of 6

 Regular class attendance is expected for all students at the University.

 Please send your professor a brief e-mail to explain your absence in advance.
 Your absence will not reduce your attendance rate if and only if you have a legitimate reason for
missing a class (such as illness, death in the family, a traffic accident, etc.). In case of a disease or
emergency, you must supply formal documentation that supports your claim.
 Classes start at the hour. Please be respectful of your classmates by being on time.
 All electronic equipment should be turned off and kept out of sight before the lecture starts.

II. Make-up Policy

To be eligible to take a make-up for the term exam, you should report your acceptable excuse to the course
instructor and receive formal permission no later than one week after the exam date. A single make-up exam
will be given at or after the end of the semester. There will be no make-up for the assignments or quizzes.
III. Late Submission Policy
Late submissions will not be graded. Missed assignments will result in a grade of zero (0).
IV. Cheating & Plagiarism
Collaboration is strongly encouraged; however, the work you hand in must be solely your own. Cheating
and plagiarism are severe offenses and will be penalized accordingly by the university disciplinary
committee. Cheating has a comprehensive description which can be summarized as "acting dishonestly."
Some of the things that can be considered cheating are the following:
 Copying answers on exams, home works and lab works,
 Using prohibited material on exams,
 Lying to gain any advantage in class,
 Providing false, modified, or forged data in a report,
 Plagiarizing (see below),
 Modifying graded material to be re-graded,
 Causing harm to colleagues by distributing false information about an exam, homework, or lab.

All of the following are considered plagiarism (www.plagiarism.org):

 Turning in someone else's work as your own,
 Copying words or ideas from someone else without giving credit,
 Failing to put a quotation in quotation marks,
 Giving incorrect information about the source of a quotation,
 Changing words but copying the sentence structure of a source without giving credit,
 Copying so many words or ideas from a source that it makes up the majority of your work, whether
you give credit or not.
V. Disability Support
If you have a disabling condition that may interfere with your ability to complete this course successfully,
please contact Dr. Muhsin Caner Gökçe (e-mail: muhsin.gokce@tedu.edu.tr).
VI. Student Development and Psychological Counseling Center
Student Development and Psychological Counseling Centre is mandated with providing crisis intervention
and supportive listening services to the campus community. The Center conducts individual counseling,
group guidance studies, workshops, seminars, and orientation studies for all students in need. You may
apply to the Center in order to deal with all your current problems.
For further information and/or questions: ogrencidanismamerkezi@tedu.edu.tr, http://csc.tedu.edu.tr/
VII. TEDU COPeS - Psycho-Social Support
 SYLLABUS FOR
EE 207 – ELECTRICAL CIRCUITS AND LOGIC DESIGN
TED UNIVERSITY
DEPARTMENT OF ELECTRICAL AND ELECTRONICS ENGINEERING
Academic Year & Semester 2023-24 Spring Page 6 of 6

TED University Psychosocial Support Team was initially established in order to facilitate coping with the
psychological, social, familial, academic, and professional difficulties that may arise due to adverse
conditions associated with COVID-19 pandemic for TEDU students and employees.
In time we have expanded our services to provide psychosocial support in diverse disasters. In this line,
TEDU COPeS offers psychosocial support for TED University students and employees in the aftermath of
Kahramanmaraş earthquakes.
For further information and/or questions, visit their website at https://copes.tedu.edu.tr/
VIII. TEDU Without Barriers Unit:
Please inform the TEDU Without Barriers Unit and the instructor of the course about the specific issues in
case you have a physical or mental disability and are having trouble with anything related to this course—
such as accessing the material, participating in the class, taking notes, preparing for, attending or managing
to complete the exams. Your situation will be reviewed by the Unit, in accordance with the principle of
confidentiality, and if deemed appropriate, facilitating measures will be taken so that you can take the course
more efficiently.
For further information and/or questions: engelsiz@tedu.edu.tr, https://www.tedu.edu.tr/engelsiz-tedu

Dr. Muhsin Caner Gökçe,

Prepared By Dr. Javad Haghighat, Date 03/08/2023
Dr. Kurtuluş Erinç Akdoğan
Revised By Dr. Javad Haghighat Rev. Date 09/02/2024