Comparison of drive currents in metal-oxide-semiconductor field-effect transistors

made of Si, Ge, GaAs, InGaAs, and InAs channels

Abigail Lubow, Sohrab Ismail-Beigi, and T. P. Ma

Citation: Applied Physics Letters 96, 122105 (2010); doi: 10.1063/1.3367708

View online: http://dx.doi.org/10.1063/1.3367708
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 APPLIED PHYSICS LETTERS 96, 122105 共2010兲

Comparison of drive currents in metal-oxide-semiconductor field-effect

transistors made of Si, Ge, GaAs, InGaAs, and InAs channels
Abigail Lubow,1,a兲 Sohrab Ismail-Beigi,2 and T. P. Ma1
1
Department of Electrical Engineering, Center for Research on Interface Science and Phenomena (CRISP),
Yale University, New Haven, Connecticut 06520-8284, USA
2
Department of Applied Physics, Center for Research on Interface Science and Phenomena (CRISP),
Yale University, New Haven, Connecticut 06520-8284, USA
共Received 13 January 2010; accepted 25 February 2010; published online 24 March 2010兲
In this study, the effect of using high-electron-mobility channel materials, such as GaAs, InAs, and
InGaAs, on drive current in n-channel metal-oxide-semiconductor 共nMOS兲 and p-channel
metal-oxide-semiconductor devices is studied. Relative to silicon, these materials have lower
electron effective mass, which leads to lower inversion capacitance 共Cinv兲 due to their lower density
of states. Despite their lower Cinv, high-electron mobility channel materials are shown to be
promising alternatives to silicon in delivering higher drive current in nMOS devices. © 2010
American Institute of Physics. 关doi:10.1063/1.3367708兴

Over the past 40 years, silicon-based metal-oxide-
semiconductor field-effect transistors 共MOSFETs兲 have been
scaled, both in terms of physical dimensions and in terms of
switching speed, according to Moore’s Law. Traditional
methods of scaling involved reduction in channel length,
channel width, and gate oxide thickness. In recent years, as
silicon MOSFETs decreased in size to the nanoscale regime,
new scaling methods for increasing switching speed, such as
hybrid orientation1 and strain engineering2 were introduced.
But even these methods may not be sufficient to deliver the
increased switching speed needed to continue Moore’s Law.
High-mobility channel materials, in which the material-
specific properties of the crystals allow carriers to attain
higher mobilities, are promising alternatives to silicon.
In this work, the four high-mobility channel materials
studied are germanium 共Ge兲, gallium arsenide 共GaAs兲, in-
dium gallium arsenide 共InGaAs兲, and indium arsenide
共InAs兲. Our goal is to identify which, if any, of these high-
mobility channel materials yields higher drive current than
silicon for n-channel MOSFET 共nMOSFET兲 and p-channel
MOSFET 共pMOSFET兲 devices. By employing the material
properties of the high-mobility channel materials, one can
model both the carrier concentration distribution and the
capacitance-voltage curve of a high-mobility channel MOS
device.
Table I shows that the mobilities of electrons in these
materials are significantly higher than in silicon.3 Many ma-
terials with high carrier mobility also have low densities of
TABLE I. Electron and hole mobilities in silicon, germanium, gallium ars-
enide, indium gallium arsenide, and indium arsenide. See Ref. 3.
Material Si Ge GaAs InGaAs InAs
Mobility 共electrons兲 in cm V s
2 −1 −1
1350 3600 8000 11 200 30 000
Mobility 共holes兲 in cm2 V−1 s−1 480 1800 300 300 450
states, because of their low carrier effective mass. Table II
shows the densities of states for the same five semiconduc-
tors as calculated from their effective masses.4
As MOSFETs are scaled down, the quantum mechanical
behavior of electrons and holes must be taken into consider-
ation. When a MOSFET is biased into inversion, the elec-
trons 共or holes兲 are confined in a narrow region between
the oxide and the semiconductor. Because of quantum
wave behavior, the carriers are not located at the oxide-
semiconductor interface but rather some distance away from
the interface—and the distance depends on the material’s
properties. A quantum mechanical model based on the
Schrodinger–Poisson method has been developed5 which al-
lows us to find the electron or hole concentration as a func-
tion of distance from the oxide-semiconductor interface. Fig-
ure 1 shows electron concentration as a function of distance
from the oxide-semiconductor interface for each of the five
semiconductors studied in this work.

TABLE II. Calculated density of states, based on electron and hole effective mass. See Ref. 4.

Si Ge GaAs InGaAs InAs

Density of states 共eV−1 cm−2兲 共eV−1 cm−2兲 共eV−1 cm−2兲 共eV−1 cm−2兲 共eV−1 cm−2兲

Electrons Valley 1 6.97⫻ 1014 5.01⫻ 1014 2.76⫻ 1013 1.71⫻ 1013 9.61⫻ 1012
Valley 2 1.59⫻ 1014
Holes Heavy 1.22⫻ 1014 5.60⫻ 1013 1.95⫻ 1014 1.25⫻ 1014 6.27⫻ 1013
Light 1.05⫻ 1014 8.94⫻ 1012 3.13⫻ 1013 1.66⫻ 1013 3.59⫻ 1012
Split-off 1.21⫻ 1014 3.51⫻ 1013 7.10⫻ 1013 6.27⫻ 1013 5.85⫻ 1013

a兲
Electronic mail: abigail.lubow@gmail.com.

0003-6951/2010/96共12兲/122105/3/$30.00
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 122105-2 Lubow, Ismail-Beigi, and Ma Appl. Phys. Lett. 96, 122105 共2010兲

FIG. 1. Electron carrier concentration in silicon and four high-mobility FIG. 2. Capacitance-voltage curves for each of the five materials in the
channel materials as a function of distance from the oxide-semiconductor nMOS device for EOT= 1 nm and Vg– Vt= 1.4 V. Quantum effects cause a
interface for EOT= 1 nm and Vg– Vt= 1.4 V. As density of states de- reduction in inversion capacitance 共Cinv兲.
creases, the charge centroid moves further from the oxide-semiconductor
interface.
electron effective masses of GaAs, GaInAs, or InAs. This is
As mentioned above, semiconductors with high mobili- due to the high densities of interface traps, whose charging/
ties also have low carrier effective masses, which in turn discharging right at the oxide/semiconductor interface shield
means that their density of states is low. As seen in Fig. 1, Si, the effect of the spatial distribution of channel carriers. To
with the highest density of states, has a charge centroid lo- reveal the effect of density of states on Cinv experimentally,
cated closest to the interface. InAs, which has the lowest one must minimize the interface-trap density to lower than
density of states, has a charge centroid located farthest from 1011 / cm2, which should be achievable in the near future
the interface. Because the densities of states for holes are given the rapid progress that has been made in recent years.
similar in value across all materials, the charge centroids are As stated earlier, Id is proportional to the product of ␮
located at approximately the same distance from the interface and Cinv. The Id ratios shown in the last column of Table III
共data not shown here兲. result from taking the product ␮Cinv for the high-mobility
This quantum-based separation of the charge centroid channel materials and dividing it by the product for silicon.
from the interface plane effectively reduces the inversion ca- We see that the Id ratio is largest in InAs 共9.8兲 and smallest in
pacitance Cinv, as it adds a few to 10 Å of effective oxide Ge 共2.5兲, showing that the relative advantage in drive current
thickness 共EOT兲 to the physical thickness of gate dielectric. is largest when InAs is used for the nMOS-based device. For
This is a significant addition for a gate dielectric with an the pMOS-based device, the Id ratios do not show as much
EOT of only 1 nm, although negligible for EOT⬎ 10 nm. variation. This is consistent with the similar ␮ and Cinv val-
This is one of the reasons why quantum effects on Cinv were ues observed for the five materials. The sole exception is Ge,
traditionally neglected for CMOS technology with relatively which has a higher hole ␮ than the other materials and has an
thick gate oxides. As the drive current Id is proportional to Id ratio of 3.92.
the product ␮Cinv, 共in the limit of long channels兲, when
quantum effects are taken into account, the variations in Cinv
become important. Here, ␮ is the mobility.
The simulated capacitance-voltage curves in Fig. 2 re-
veal that, for nMOSFET, Si has the highest Cinv, followed by
Ge, GaAs, InGaAs, and InAs, respectively. This result is
consistent with the results of the carrier concentration distri-
bution curves: due to quantum effects, when the distance
between the oxide-semiconductor interface and the charge
centroid increases, the total inversion capacitance is de-
creased. Materials with lower density of states have charge
centroids farthest from the interface and the smallest Cinv.
The pMOS simulations reveal a different set of Cinv re-
lationships among the materials. As shown in Fig. 3, the
inversion capacitance values 共for negative gate voltages兲
cluster together. This clustering means that the Cinv values
will not greatly affect Id. Note that the accumulation capaci-
tance 共for positive gate voltages兲 depends strongly on the
electron effective mass, as expected. FIG. 3. Capacitance-voltage curves for each of the five materials in the
Interestingly, many experimentally measured C-V curves pMOS device for EOT= 1 nm and Vg– Vt= 1.44 V. Quantum effects have
do not
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 122105-3 Lubow, Ismail-Beigi, and Ma Appl. Phys. Lett. 96, 122105 共2010兲

TABLE III. nMOS Id ratios for EOT= 1 nm and Vg− Vt= 1.4 V. This investigation has found that high-mobility channel
semiconductors are a promising alternative to silicon in de-
EOT= 1 nm ␮ Cinv ␮Cinv
Vg− Vt= 1.4 V 共cm2 V−1 s−1兲 共F cm−2兲 共F V−1 s−1兲 Id ratio livering higher drive current in nMOSFETs. For the InAs
nMOS device, Id was 8x–9x higher than in Si for EOT of 1
Si 1 350 2.62⫻ 10−6 3.53⫻ 10−3 1 nm. InGaAs, GaAs, and Ge had Id ratios of ⬃4.5, ⬃3.7, and
Ge 3 600 2.50⫻ 10−6 9.01⫻ 10−3 2.5
⬃2.5, respectively. For pMOSFETs, the only promising
GaAs 8 000 1.67⫻ 10−6 1.33⫻ 10−2 3.7
InGaAs 11 200 1.44⫻ 10−6 1.61⫻ 10−2 4.5
semiconductor was Ge, which due to its high hole mobility,
InAs 30 000 1.16⫻ 10−6 3.49⫻ 10−2 9.8 had an Id ratio of about four relative to Si.

We would like to thank the support of the National

It should be noted that in Table III, the bulk mobility for Science Foundation under Contract No. MRSEC DMR
each semiconductor was displayed and an assumption was 0520495 and the Semiconductor Research Corporation.
made that ␮ in the MOSFET channel is degraded by the
1
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C. Kittel, Introduction to Solid State Physics, 7th ed. 共Wiley, New York,
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A. Lubow, Ph.D. thesis, Yale University, 2009.
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Berkeley Device Group 关Online兴 Available:
creases, and affects Id. www.device.eecs.berkeley.edu/qmcv/html.

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