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BEC 306 VLSI Design End Term 2018 PAPER
BEC 306 VLSI Design End Term 2018 PAPER
BEC 306 VLSI Design End Term 2018 PAPER
Note: Q.1 is compulsory and is of 20 marks. Attempt any four Qs.from the rest, all carry 10
marks each.
Q.1. (5x4)
(a) Explain difference between full custom and semi custom design styles ?
(b) Why enhancement type MOSFET is preferred than depletion type MOSFET in VLSI
circuit design?
(c) Differentiate between twin well and triple well CMOS.
(d) What are the main applications of tristate buffer?.
(e) Explain working principle of Flash memory?
Q.2 (a) Explain the Gradual channel approximation in MOS and its significance ? (5)
(b) The following parameters are given for an NMOS process
tox = 400 Ao
substrate doping NA = 4 x 1016/cm3
polysilicon gate doping ND = 2 x 1020/cm3
oxide-interface fixed-charge density Nox = 4 x 1010 /cm3
Calculate threshold voltage VT for an unimplanted transistor . What type and what concentration
of impurities must be implanted to achieve VT = +3V and VT = -3V (5)
Q.3 (a) Define delay, rise time and fall time in inverter. Show them with the help of input and
output waveforms (5)
(b) What is latchup problem in CMOS technology and how this problem can be minimized?
(5)
Q.5 (a) Implement the function 𝑍 = (𝐷 + 𝐸 + 𝐴)(𝐵 + 𝐶) using standard CMOS logic. Find
an equivalent CMOS inverter circuit for simultaneous switching of all inputs, assuming
(W/L)P=15 for all PMOS transistors and (W/L)N=10 for all NMOS transistors
(5)
Q.6 (a) Explain the working principle of domino CMOS logic gate. What is its main
limitation ? (5)
(b) Draw the equivalent circuits of DRAM and SRAM memory cells? (5)