DR.

AKHILESH DAS GUPTA INSTITUTE OF PROFESSIONAL STUDIES, NEW DELHI DEPARTMENT OF ELECTRONICS AND
COMMUNICATION
ENGINEERING

EXPERIMENT NO. 1

OBJECTIVE
Introduction to Embedded lab.

THEORY
Cross Compiler and Native Compiler

Cross compiling is compiling something for different CPU type than the one you are running on.
An example is compiling ARM binaries under an i386 system, or compiling 64-bit executables
under a 32-bit system.

You normally won't be able to run what you've just compiled when you cross compile it, until
you ship the binaries to the system they belong to.

Native compiling is when you compile for the same architecture you're running under, which is
the normal situation.

Von Neumann Architecture:

 It is named after the mathematician and early computer scientist John Von Neumann.

 The computer has single storage system (memory) for storing data as well as program to be
executed.
 Processor needs two clock cycles to complete an instruction. Pipelining the instructions is not
possible with this architecture.
 In the first clock cycle the processor gets the instruction from memory and decodes it. In the next
clock cycle the required data is taken from memory. For each instruction this cycle repeats and
hence needs two cycles to complete an instruction.
 This is a relatively older architecture and was replaced by Harvard architecture.

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DR. AKHILESH DAS GUPTA INSTITUTE OF PROFESSIONAL STUDIES, NEW DELHI DEPARTMENT OF ELECTRONICS AND
COMMUNICATION
ENGINEERING

Harvard Architecture:

 The name is originated from "Harvard Mark I" a relay based old computer.
 The computer has two separate memories for storing data and program.
 Processor can complete an instruction in one cycle if appropriate pipelining strategies are
implemented.
 In the first stage of pipeline the instruction to be executed can be taken from program
memory.In the second stage of pipeline data is taken from the data memory using the
decoded instruction or address.
 Most of the modern computing architectures are based on Harvard architecture.But the
number of stages in the pipeline varies from system to system.

8051
The Intel MCS-51 (commonly termed 8051) is an internally Harvard architecture, complex
instruction set computing (CISC) instruction set, single chip microcontroller (µC) series
developed by Intel in 1980 for use in embedded systems.

Features of 8051 microcontroller

 4 KB on chip program memory.

 128 bytes on chip data memory(RAM).
 128 user defined software flags.
 8-bit data bus
 16-bit address bus
 32 general purpose registers each of 8 bits
 16 bit timers (usually 2, but may have more, or less).
 3 internal and 2 external interrupts.
 Bit as well as byte addressable RAM area of 16 bytes.
 Four 8-bit ports, (short models have two 8-bit ports).
 16-bit program counter and data pointer.
 1 Microsecond instruction cycle with 12 MHz Crystal

AVR

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DR. AKHILESH DAS GUPTA INSTITUTE OF PROFESSIONAL STUDIES, NEW DELHI DEPARTMENT OF ELECTRONICS AND
COMMUNICATION
ENGINEERING

AVR is a family of microcontrollers developed by Atmel beginning in 1996. These are modified
Harvard architecture8-bitRISC single-chip microcontrollers. AVR was one of the first
microcontroller families to use on-chip flash memory for program storage, as opposed to one-
time programmable ROM, EPROM, or EEPROM used by other microcontrollers at the time.

AVRs Microcontroller are generally classified into following:

 tinyAVR — the ATtiny series

o 0.5–16 kB program memory
o 6–32-pin package
o Limited peripheral set

 megaAVR — the ATmega series

o 4–512 kB program memory
o 28–100-pin package
o Extended instruction set (multiply instructions and instructions for handling larger
program memories)
o Extensive peripheral set

 XMEGA — the ATxmega series

o 16–384 kB program memory
o 44–64–100-pin package (A4, A3, A1)
o Extended performance features, such as DMA, “Event System”, and cryptography
support.
o Extensive peripheral set with ADCs

 Application-specific AVR
o megaAVRs with special features not found on the other members of the AVR
family, such as LCD controller, USB controller, advanced PWM, CAN, etc.

PIC
PIC microcontrollers are a family of specialized microcontroller chips produced by Microchip
Technology in Chandler, Arizona. The acronym PIC stands for "peripheral interface controller",
although that term is rarely used nowadays.

Features
 RISC architecture
o Only 35 instructions to learn
o All single-cycle instructions except branches
 Operating frequency 0-20 MHz
 Precision internal oscillator

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DR. AKHILESH DAS GUPTA INSTITUTE OF PROFESSIONAL STUDIES, NEW DELHI DEPARTMENT OF ELECTRONICS AND
COMMUNICATION
ENGINEERING

o Factory calibrated
o Software selectable frequency range of 8MHz to 31KHz
 Power supply voltage 2.0-5.5V
o Consumption: 220uA (2.0V, 4MHz), 11uA (2.0 V, 32 KHz) 50nA (stand-by
mode)
 Power-Saving Sleep Mode
 Brown-out Reset (BOR) with software control option
 35 input/output pins
o High current source/sink for direct LED drive
o software and individually programmable pull-up resistor
o Interrupt-on-Change pin
 8K ROM memory in FLASH technology
o Chip can be reprogrammed up to 100.000 times
 In-Circuit Serial Programming Option
o Chip can be programmed even embedded in the target device

 256 bytes EEPROM memory

o Data can be written more than 1.000.000 times
 368 bytes RAM memory
 A/D converter:
o 14-channels
o 10-bit resolution
 3 independent timers/counters
 Watch-dog timer
 Analogue comparator module with
o Two analogue comparators
o Fixed voltage reference (0.6V)
o Programmable on-chip voltage reference
 PWM output steering control
 Enhanced USART module
o Supports RS-485, RS-232 and LIN2.0
o Auto-Baud Detect
 Master Synchronous Serial Port (MSSP)
o supports SPI and I2C mode

ARM Processor
An ARM processor is one of a family of CPUs based on the RISC (reduced instruction set
computer) architecture developed by Advanced RISC Machines (ARM). ARM makes 32-bit
and 64-bit RISC multi-core processors.ARM makes 32-bit and 64-bit RISC multi-core
processors. RISC processors are designed to perform a smaller number of types of computer
instructions so that they can operate at a higher speed, performing more millions of instructions
per second (MIPS). By stripping out unneeded instructions and optimizing pathways, RISC

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DR. AKHILESH DAS GUPTA INSTITUTE OF PROFESSIONAL STUDIES, NEW DELHI DEPARTMENT OF ELECTRONICS AND
COMMUNICATION
ENGINEERING

processors provide outstanding performance at a fraction of the power demand of CISC

(complex instruction set computing) devices.
ARM processor features include:
 Load/store architecture.
 An orthogonal instruction set.
 Mostly single-cycle execution.
 Enhanced power-saving design.
 64 and 32-bit execution states for scalable high performance.
 Hardware virtualization support.

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DR. AKHILESH DAS GUPTA INSTITUTE OF PROFESSIONAL STUDIES, NEW DELHI DEPARTMENT OF ELECTRONICS AND
COMMUNICATION
ENGINEERING

EXPERIMENT NO. 2

OBJECTIVE
Write a 8051 C program to toggle all the bits of port P2 continuously with some delay.

SOFTWARE USED
Keil µVision4 C51

PROGRAM
#include<reg51.h>

voidmsdelay(unsigned int);

void main()

{ P2=0x00; // all pin of PORT2 declared as output

while(1)

{P2=0xFF;

msdelay(500);

P2=0x00;

msdelay(500);

voidmsdelay(unsigned int value)

{ unsignedintx,y;

for(x=0;x<value;x++)

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DR. AKHILESH DAS GUPTA INSTITUTE OF PROFESSIONAL STUDIES, NEW DELHI DEPARTMENT OF ELECTRONICS AND
COMMUNICATION
ENGINEERING

for(y=0;y<1275;y++);

OUTPUT

Fig.1. All bits of PORT2 are low

Fig.1. All bits of PORT2 are high

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DR. AKHILESH DAS GUPTA INSTITUTE OF PROFESSIONAL STUDIES, NEW DELHI DEPARTMENT OF ELECTRONICS AND
COMMUNICATION
ENGINEERING

EXPERIMENT NO. 3

OBJECTIVE
Write a 8051 C program to toggle all the bits of port P1 continuously with some delay in
between. Use Timer 0, 16- bit mode to generate the delay.

SOFTWARE USED
Keil µVision4 C51

PROGRAM
#include<reg51.h>
void T0delay(unsigned int);
void main()
{
while(1)
{ P1=0x55;
T0delay(5);
P1=0xAA;
T0delay(5);
}
}
void T0delay(unsigned int value)
{ TMOD=0x01; // Timer 0, Mode 1
TL0=0x00; // load TL0
TH0=0x35; //load TH0
TR0=1; //turn on T0
while(TF0==0); // wait for TF0 to roll over
TR0=0; // turn off T0
TF0=0; // clear TF0
}

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DR. AKHILESH DAS GUPTA INSTITUTE OF PROFESSIONAL STUDIES, NEW DELHI DEPARTMENT OF ELECTRONICS AND
COMMUNICATION
ENGINEERING

OUTPUT

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DR. AKHILESH DAS GUPTA INSTITUTE OF PROFESSIONAL STUDIES, NEW DELHI DEPARTMENT OF ELECTRONICS AND
COMMUNICATION
ENGINEERING

EXPERIMENT NO. 4

OBJECTIVE
Write a 8051 C program using interrupts to do the following:
a) Receive data serially and send it to P0.
b) Read port P1, transmit data serially, and give a copy to P2.
c) Make timer0 generate a square wave of 5 kHz frequency on P0.1.
Assume that XTAL=11.0592 MHz. Set the baud rate at 4800.

SOFTWARE USED
Keil µVision4 C51

PROGRAM
#include<reg51.h>
sbit WAVE=P0^1;

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DR. AKHILESH DAS GUPTA INSTITUTE OF PROFESSIONAL STUDIES, NEW DELHI DEPARTMENT OF ELECTRONICS AND
COMMUNICATION
ENGINEERING

void timer0() interrupt 1

{
WAVE=~WAVE; //toggle pin
}
void serial0() interrupt 4
{
if(TI==1)
{
TI=0; //clear interrupt
}
else
{
P0=SBUF; //put value on pins
RI=0; // clear interrupt
}
}
void main()
{
unsigned char x;
P1=0xff;
TMOD=0x22;
TH1=0xF6; //4800 baud rate
SCON=0x50;
TH0=0xA4; //5 kHz has T=200 us
IE=0x92; //enable interrupts
TR1=1; // start timer 1
TR0=1; //start timer 0
while(1)
{
x=P1; //read value from pins
SBUF=x; //put value in buffer
P2=x;
}
}

OUTPUT

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DR. AKHILESH DAS GUPTA INSTITUTE OF PROFESSIONAL STUDIES, NEW DELHI DEPARTMENT OF ELECTRONICS AND
COMMUNICATION
ENGINEERING

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DR. AKHILESH DAS GUPTA INSTITUTE OF PROFESSIONAL STUDIES, NEW DELHI DEPARTMENT OF ELECTRONICS AND
COMMUNICATION
ENGINEERING

EXPERIMENT NO. 5

OBJECTIVE
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DR. AKHILESH DAS GUPTA INSTITUTE OF PROFESSIONAL STUDIES, NEW DELHI DEPARTMENT OF ELECTRONICS AND
COMMUNICATION
ENGINEERING

Write a lpc2129 program to blink led.

SOFTWARE USED
Keil µVision4 MDK

PROGRAM
#include<lpc21xx.h>
int main()
{
unsignedinti;
IODIR0=0xFFFFFFFF;
while(1)
{
IOSET0=0xFFFFFFFF;
for(i=0;i<65000;i++);
IOCLR0=0XFFFFFFFF;
for(i=0;i<65000;i++);
}
}

OUTPUT

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DR. AKHILESH DAS GUPTA INSTITUTE OF PROFESSIONAL STUDIES, NEW DELHI DEPARTMENT OF ELECTRONICS AND
COMMUNICATION
ENGINEERING

EXPERIMENT NO. 6
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DR. AKHILESH DAS GUPTA INSTITUTE OF PROFESSIONAL STUDIES, NEW DELHI DEPARTMENT OF ELECTRONICS AND
COMMUNICATION
ENGINEERING

OBJECTIVE
Write a lpc2129 program to generate 1 sec delay using timer.

SOFTWARE USED
Keil µVision4 MDK

PROGRAM
#include<lpc21xx.h>
void delay()
{
VPBDIV=0x01;
T0TCR=0x02;
T0TC=0x00;
T0PR=2000;
T0MR0=5000;
T0MCR=0x01;
T0TCR=0x01;
while(T0IR==0)
T0IR=0x01;
}
void main()
{
IODIR1=0xFFFFFFFF;
while(1)
{
IOSET1=0xFFFFFFFF;
delay();
IOCLR1=0xFFFFFFFF;
delay();
}
}

OUTPUT

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DR. AKHILESH DAS GUPTA INSTITUTE OF PROFESSIONAL STUDIES, NEW DELHI DEPARTMENT OF ELECTRONICS AND
COMMUNICATION
ENGINEERING

EXPERIMENT NO. 7
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DR. AKHILESH DAS GUPTA INSTITUTE OF PROFESSIONAL STUDIES, NEW DELHI DEPARTMENT OF ELECTRONICS AND
COMMUNICATION
ENGINEERING

OBJECTIVE
Write a lpc2129 program to get value of ADC.

SOFTWARE USED
Keil µVision4 MDK

PROGRAM
#include<lpc21xx.h>
unsignedinta,i;
void main()
{
IODIR0=0xFFFFFFFF;
IODIR1=0xFFFFFFFF;
PINSEL1=0x00400000;
while(1)
{
ADCR=0x01208001;
while(!(ADDR&0x80000000));
a=ADDR&0x0000FFC0;
a=(a>>6);
IOCLR1=0xFFFFFFFF;
IOSET1=a<<16;
}
}

OUTPUT

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DR. AKHILESH DAS GUPTA INSTITUTE OF PROFESSIONAL STUDIES, NEW DELHI DEPARTMENT OF ELECTRONICS AND
COMMUNICATION
ENGINEERING

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