5 4 3 2 1

PAGE LIST REVISION HISTORY

PAGE PAGE NAME VER # DATE DESCRIPTION OF CHANGES AUTHOR

001 Revision History 0.20 15 Sep. 2022 DVT1 Board release qxn
D D

002 002_Block Diagram

0.21 Nov. 10, 2022 1. Modify all crystal CL value to match frequency qxn
2. Add serial termination resistors for RGB data lane
003 003_Power Tree 3. Add CMC on HDMI output
4. Use WKUP_CLKOUT0 for WiFi
004 004_I2C Usage Diagram 5. Use MCU_OBSCLK0 for GBE
6. Increase resistance on all board LEDs
005 005_DCDC & PMIC 7. Remove R243 TP_INT Pulldown
8. Add ferrite bead on Grove and QWIIC
9. Add feed forward capacitor on TLV62595
006 006_SoC Power 10. Remove ESDs on HDMI TMDS signals
007 007_SoC DCAPs
0.22 Dc. 12, 2022 1. Add feed forward capacitor on TLV62595 qxn
008 008_SoC DDR & DDR4 2. Remove ESDs on HDMI TMDS signals
3. Add ferrite bead on HDMI shield
009 009_SoC SDIO & eMMC & SD 4. Change R16 and R80 to 0R
5. Change pullup resistors to 2.2k on I2C0-I2C3
010 010_SoC RGMII & GBE PHY 6. Change FB30 and FB31 to 0R

C
011 011_SoC RMII & SPE PHY C

012 012_SoC DDS & HDMI

013 013_SoC GPIO 3.3V

014 014_SoC GPIO 1.8V & Bootstrap

015 015_SoC USB & USB_A & USB_C 1.0 Dc. 27, 2022 1. Add testpoint to QWIIC qxn
2. Add serial resistors on I2C0 - I2C3 SCL
016 016_SoC Reset & MCU 3. Add more capacitors on VDD_1V2
4. Add 0R on HDMI shield
5. Add series resistor on SPE LED control
017 017_SoC CSI & OLDI

018 018_RTC & ID & DEBUG

019 019_CC1352P

020 020_WiFi WL1807MOD

B B

021 021_BUTTONs & LEDs

022 022_GROVE &QWIIC &MikroBus &ADC

A A

Main

https://www.seeedstudio.com
Title:
BeaglePlay
Size: Document Number: Rev:
A3 001_Revision History v1.0
Draw By: qxn Date: Monday, March 06, 2023 Sheet: 1 of 22
5 4 3 2 1
 5 4 3 2 1

Block Diagram

D D

C C

B B

A A

Main

https://www.seeedstudio.com
Title:
BeaglePlay
Size: Document Number: Rev:
A3 002_Block Diagram v1.0
Draw By: qxn Date: Tuesday, December 27, 2022 Sheet: 2 of 22
5 4 3 2 1
 5 4 3 2 1

Power tree

D D

C C

B B

A A

Main

https://www.seeedstudio.com
Title:
BeaglePlay
Size: Document Number: Rev:
A3 003_Power Tree v1.0
Draw By: qxn Date: Tuesday, December 27, 2022 Sheet: 3 of 22
5 4 3 2 1
 5 4 3 2 1

I2C Usage Diagram

D D

C C

B B

A A

Main

https://www.seeedstudio.com
Title:
BeaglePlay
Size: Document Number: Rev:
A3 004_I2C Usage Diagram v1.0
Draw By: qxn Date: Tuesday, December 27, 2022 Sheet: 4 of 22
5 4 3 2 1
 5 4 3 2 1

LDO 1V0 DCDC 3V3

VSYS_5V
VDD_1V8

FL2 120R
1.3A U16 C133
BLM18PG121SN1D C204 TLV75801PDBVR VDD_1V0 R138 R137 10uF
R210 0402 1uF 10K 10K 10V
10K 10V 1% 1% C0603 U12 VDD_3V3
D 1% C0402 1 5 0.3A TP27 R0402 R0402 L18 0.47uH D
R0402 IN OUT 6 5 3A TP26
3 4 U18_FB VIN SW 2520 5.0A
EN FB Vfb=0.55V R211 C263 VDD_3V3_EN 1 3 C98 120pF

GND
100K 1uF EN FB C0402 25V
1% 10V TP19 VDD_3V3_PG 2 4 R260 270K R307 180K C134 C135
R0402 C0402 PG GND R0402 1% R0402 1% 22uF 22uF

2
R261 100K 25V 25V
SOT23-5
TLV62595DMQR R0402 1% C0805 C0805
VSON-6
R212 vson6_0d5_1d5x1d5x1mm
Vout = Vfb x (1 + R211/ R212) 120K
= 0.55V x (1 + 100K / 120K) 1%
= 0.55V x 1.8333 R0402 Vout = Vfb x (1 + R260/ R261)
= 1.008V = 0.6V x (1 + 450K / 100K)
= 0.6V x 5.5
= 3.3V

PMIC_Strap option PMIC

C C
VDD_CORE
VSYS_5V U17
VSYS_5V
4 2 L14 0.33uH 0.75V TP18
5 PVIN_B1_1 LX_B1_1 3 2520 6.9A 3.5A
C62 PVIN_B1_2 Buck1 LX_B1_2 C50
R214 10uF 47uF
DNP 10V 1 R123 0R 6.3V
1% C0603 FB_B1 R0402 5% C0805
R0402 R124 DNP
PMIC_GPIO VSYS_5V R0402 1% VDD_1V8

30 29 L16 0.47uH 2A TP20

R215 PVIN_B2 LX_B2 2520 5.0A
DNP C63 Buck2 C60
1% 10uF 32 47uF
R0402 10V FB_B2 6.3V
C0603 C0805
VSYS_5V VDD_1V2

26 27 L17 0.47uH 2A TP21

PVIN_B3 LX_B3 2520 5.0A
C64 Buck3 C54
10uF 24 47uF
10V FB_B3 6.3V
C0603 C0805
VDD_3V3 VDD_1V8 VDD_3V3 VDD_SD
VDDA_0V85
B 6 7 0.4A TP22 VDDA_1V8 B
PVIN_LDO1 LDO1 VLDO1
20 LDO2 19 0.4A TP23 VDD_2V5 VDD_1V8
22 PVIN_LDO2 VLDO2 21 0.3A TP24 VDD_3V3
PVIN_LDO34 LDO3 VLDO3 23 0.3A TP25
LDO4 VLDO4
C125 C112 C113 C103 VDD_3V3 VSYS_5V VSYS_5V C49 C48 C47 C46
2.2uF 2.2uF 2.2uF 2.2uF 2.2uF 2.2uF 2.2uF 2.2uF R159 R160
10V 10V 10V 10V 13 10V 10V 10V 10V 10K 10K
C0402 C0402 C0402 C0402 VSYS INT LDO C0402 C0402 C0402 C0402 1% 1%
14 R0402 R0402
VDD1P8
R54 R228 R161 C53 C52
10K 10K 10K 2.2uF 2.2uF
1% 1% 1% 10V 10V 18
nRSTOUT OUT MCU_PORz [16,21]
R0402 R0402 R0402 C0402 C0402 11
nINT OUT EXTINTn [16]
10 16 PMIC_GPIO
[13,18] I2C0_SCL BI SCL DIGITAL GPIO VDD_3V3_EN
9 17
[13,18] I2C0_SDA BI
PW R_BTN SDA GPO2
25 8
[21] PW R_BTN BI EN/PB/VSENSE GPO1
12
[9] SD_VOLT_SEL IN VSEL_SD/VSEL_DDR
28 15
[9,10,11,12,16,19] RESETSTATz IN MODE_RESET AGND
31 33
[16] PMIC_LPM_EN0 IN MODE_STBY Thermal Pad

TPS65219
R55 QFN-32
DNP
1%
A R0402 A

Main

https://www.seeedstudio.com
Title:
BeaglePlay
Size: Document Number: Rev:
A3 005_DCDC & PMIC v1.0
Draw By: qxn Date: Tuesday, December 27, 2022 Sheet: 5 of 22
5 4 3 2 1
 5 4 3 2 1

SoC Power VDD_CORE

VDD_3V3
U1Q
H8 F15 VDD_3V3
J11 VDD_CORE VDDSHV0 G14
J14 VDD_CORE VDDSHV0
K17 VDD_CORE L18
L12 VDD_CORE VDDSHV1 M19 VDD_1V8
VDD_CORE VDDSHV1
L15
M16 VDD_CORE ANALOG AND DIGITAL W16
D D
VSYS_5V N8 VDD_CORE VDDSHV2 W19
N11 VDD_CORE VDDSHV2
N13 VDD_CORE N18
P17 VDD_CORE VDDSHV3 P18
R11 VDD_CORE VDDSHV3 T19
R139 R14 VDD_CORE VDDSHV3 U18 VDD_1V8 VDDSHV5
100K U12 VDD_CORE VDDSHV3
1% V8 VDD_CORE T7
R0402 V15 VDD_CORE VDDSHV4
VDDA_0V85 V17 VDD_CORE G17
VDDA_SYS_MON VDD_CORE VDDSHV5
K16 J18
N12 VDDR_CORE VDDSHV6
N14 VDDR_CORE F11 VDD_3V3
R141 P16 VDDR_CORE VDDSHV_MCU G12
11K R12 VDDR_CORE VDDSHV_MCU
1% T10 VDDR_CORE H9 VDDA_1V8 VDDA_1V8 VDDA_PLL1 VDDA_1V8_MCU
R0402 U14 VDDR_CORE VDDSHV_CANUART
VDD_1V2 J12 VDDR_CORE T9
VDDR_CORE VDDA_TEMP0 G16 VDDA_PLL0 VDDA_PLL2 VDDA_1V8_OLDI VDDA_1V8_CSIRX
K9 VDDA_TEMP1
L8 VDDS_DDR U11
P9 VDDS_DDR VDDA_PLL0 U15 VDDA_1V8_USB
VDD_CANUART VDDA_1V8 R8 VDDS_DDR VDDA_PLL1 L14
VDDS_DDR VDDA_PLL2 VDDA_CORE_USB
VDD_1V2 G7 L11 VDD_3V3
VDD_1V8 VDDS_OSC0 VDDA_MCU VDDA_CORE_CSI
M9 W9
C VDDS_DDR_C VDDA_1P8_OLDI0 W10 C
VDD_3V3 F8 VDDA_1P8_OLDI0
VDD_CANUART W12
G10 VDDA_CORE_USB
VMON_1P8_SOC W13
K10 VDDA_CORE_CSIRX0
VDD_1V8 VMON_3P3_SOC W14
J16 VDDA_SYS_MON VDDA_1P8_CSIRX0
H10
2 VMON_ER_VSYS Y11
1 J8 VDDA_1P8_USB
VPP Y13
DNP E7 VDDA_3P3_USB
R313 TEMP_DIODE_P
10K AM62x
1% BGA425
R0402 bga425_0d5_13x13mm

VDDA_1V8 VDDA_1V8_CSIRX VDDA_1V8 VDDA_1V8_MCU VDDA_1V8 VDDA_PLL0 VDD_CORE VDD_CANUART

FB15 120R FB13 120R FB10 120R FB6 120R 0.75V

0402 1.3A 0402 1.3A 0402 1.3A 1.3A
C170 C171 C172 C164 C165 C166 C155 C156 C157 C145 C146 C147
100nF 10nF 4.7uF 100nF 10nF 1uF 100nF 10nF 1uF 0402 100nF 10nF 4.7uF
10V 6.3V 6.3V 10V 6.3V 6.3V 10V 6.3V 6.3V 10V 6.3V 6.3V
C0201 C0201 C0402 C0201 C0201 C0201 C0201 C0201 C0201 C0201 C0201 C0402

B B

VDD_CORE VDDA_CORE_CSI
VDDA_1V8 VDDA_1V8_USB VDDA_1V8 VDDA_1V8_OLDI VDDA_1V8 VDDA_PLL1
FB7 120R 0.75V
FB16 120R FB14 120R FB11 120R 1.3A
0402 1.3A 0402 1.3A 0402 1.3A C148 C149 C150
C173 C174 C175 C167 C168 C169 C158 C159 C160 0402 100nF 10nF 4.7uF
100nF 10nF 4.7uF 100nF 10nF 1uF 100nF 10nF 1uF 10V 6.3V 6.3V
10V 6.3V 6.3V 10V 6.3V 6.3V 10V 6.3V 6.3V C0201 C0201 C0402
C0201 C0201 C0402 C0201 C0201 C0201 C0201 C0201 C0201

VDD_CORE VDDA_CORE_USB

VDDA_1V8 VDD_SD VDDSHV5 VDDA_1V8 VDDA_PLL2 FB8 120R 0.75V

0402 1.3A
FB9 120R FB12 120R C151 C152 C153
0402 1.3A 0402 1.3A 100nF 10nF 4.7uF
C205 C154 C161 C162 C163 10V 6.3V 6.3V
100nF 100nF 100nF 10nF 1uF C0201 C0201 C0402
10V 10V 10V 6.3V 6.3V
C0201 C0201 C0201 C0201 C0201

A A

Main

https://www.seeedstudio.com
Title:
BeaglePlay
Size: Document Number: Rev:
A3 006_SoC Power v1.0
Draw By: qxn Date: Tuesday, December 27, 2022 Sheet: 6 of 22
5 4 3 2 1
 5 4 3 2 1

SoC DCAPs

VDD_CORE VDDA_0V85

D 0.75V D

C203 C179 C177 C176 C180 C181 C182 C183 C184 C185 C186 C187 C188 C189 C190 C191 C192 C193 C194 C132 C178 C195 C196 C197 C198 C199 C200 C201 C202
10uF 4.7uF 1uF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 10uF 4.7uF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF
6.3V 6.3V 6.3V 10V 10V 10V 10V 10V 10V 10V 10V 10V 10V 10V 10V 10V 10V 10V 10V 6.3V 6.3V 10V 10V 10V 10V 10V 10V 10V 10V
C0402 C0402 C0201 C0201 C0201 C0201 C0201 C0201 C0201 C0201 C0201 C0201 C0201 C0201 C0201 C0201 C0201 C0201 C0201 C0402 C0402 C0201 C0201 C0201 C0201 C0201 C0201 C0201 C0201

VDD_3V3 VDD_1V8 VDD_1V2

C C
C206 C207 C208 C209 C210 C211 C212 C213 C272 C214 C215 C216 C217 C218 C219 C220 C221 C222 C223 C270 C273 C231 C224 C225 C226 C227 C228 C229 C230
4.7uF 1uF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 4.7uF 1uF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 10uF 4.7uF 1uF 100nF 100nF 100nF 100nF 100nF
6.3V 6.3V 10V 10V 10V 10V 10V 10V 10V 6.3V 6.3V 10V 10V 10V 10V 10V 10V 10V 10V 10V 10V 6.3V 6.3V 6.3V 10V 10V 10V 10V 10V
C0402 C0201 C0201 C0201 C0201 C0201 C0201 C0201 C0201 C0402 C0201 C0201 C0201 C0201 C0201 C0201 C0201 C0201 C0201 C0201 C0201 C0402 C0402 C0201 C0201 C0201 C0201 C0201 C0201

U1R
A1 R18
A24 VSS VSS R20
A25 VSS VSS T8
B25 VSS VSS T13
F13 VSS VSS T14
G13 VSS GROUND VSS T16
G19 VSS VSS T17
B H13 VSS VSS T18 U1P B
H16 VSS VSS U8 H15
H18 VSS VSS U19 K18 CAP_VDDS0
VSS VSS CAP_VDDS1
H20
VSS VSS
V9 W17
CAP_VDDS2
CAP
J7 V10 P19
J13 VSS VSS V11 U7 CAP_VDDS3
K7 VSS VSS V13 H17 CAP_VDDS4
K13 VSS VSS V16 J19 CAP_VDDS5
K15 VSS VSS V18 CAP_VDDS6
K19 VSS VSS W7 H11
L20 VSS VSS Y2 CAP_VDDS_MCU
M7 VSS VSS AA11 G9
M8 VSS VSS AB9 CAP_VDDS_CANUART
M10 VSS VSS AD1 AM62x bga425_0d5_13x13mm
M12 VSS VSS AD9 C144 C143 C142 C141 C140 C139 C138 C137 C136
VSS VSS BGA425
M13 AD12 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF
M17 VSS VSS AD16 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
M18 VSS VSS AD25 C0201 C0201 C0201 C0201 C0201 C0201 C0201 C0201 C0201
N15 VSS VSS AE1
P7 VSS VSS AE8
P10 VSS VSS AE12
VSS VSS AE16
P13
R13 VSS VSS AE24
R15 VSS VSS AE25
VSS VSS
AM62x
BGA425
bga425_0d5_13x13mm
A A

Main

https://www.seeedstudio.com
Title:
BeaglePlay
Size: Document Number: Rev:
A3 007_SoC DCAPs v1.0
Draw By: qxn Date: Tuesday, December 27, 2022 Sheet: 7 of 22
5 4 3 2 1
 5 4 3 2 1

VDD_1V2 VDD_1V2 DDR_VPP

DDR4 DDR_VREFCA SoC DDR controller

U1G
DDR_DQ0 F4 H5 DDR_LDM
DDR_DQ4 G5 DDR0_DQ0 DDR0_DM0 W5 DDR_UDM

M1
G7

G1
G9
D1

R1

C1
D9

R9
B3
B9

A1
A9

B1
T9

F2
F8
L1
L9
J9
J1

J2
J8
DDR_DQ2 DDR0_DQ1 DDR0_DM1
DDR_A0 P3
U2
G2 DDR_DQ0 DDR_DQ1
F3
H6 DDR0_DQ2 DDR J1 DDR_A0

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

VREFCA
VPP
VPP
DDR_A1 A0 DQ0 DDR_DQ1 DDR_DQ6 DDR0_DQ3 DDR0_A0 DDR_A1
P7 F7 E3 PwrGrp:VDDS_DDR, J2
DDR_A2 R3 A1 DQ1 H3 DDR_DQ2 DDR_DQ3 G2 DDR0_DQ4 DDR0_A1 K3 DDR_A2
A2 DQ2 DDR0_DQ5 VDDS_DDR_C DDR0_A2
DDR_A3 N7 H7 DDR_DQ3 DDR_DQ7 F2 L5 DDR_A3
DDR_A4 N3 A3 DQ3 H2 DDR_DQ4 DDR_DQ5 F1 DDR0_DQ6 DDR0_A3 K4 DDR_A4
D D
DDR_A5 P8 A4 DQ4 H8 DDR_DQ5 DDR_DQ8 U1 DDR0_DQ7 DDR0_A4 K1 DDR_A5
DDR_A6 P2 A5 DQ5 J3 DDR_DQ6 DDR_DQ14 U3 DDR0_DQ8 DDR0_A5 R2 DDR_A6
DDR_A7 R8 A6 DQ6 J7 DDR_DQ7 DDR_DQ15 U2 DDR0_DQ9 DDR0_A6 P2 DDR_A7
DDR_A8 R2 A7 DQ7 A3 DDR_DQ8 DDR_DQ11 V5 DDR0_DQ10 DDR0_A7 P1 DDR_A8
DDR_A9 R7 A8 DQ8 B8 DDR_DQ9 DDR_DQ9 W2 DDR0_DQ11 DDR0_A8 P4 DDR_A9
DDR_A10 M3 A9 DQ9 C3 DDR_DQ10 DDR_DQ12 V6 DDR0_DQ12 DDR0_A9 R5 DDR_A10
DDR_A11 T2 A10/AP DQ10 C7 DDR_DQ11 DDR_DQ13 Y1 DDR0_DQ13 DDR0_A10 P5 DDR_A11
DDR_A12 M7 A11 DQ11 C2 DDR_DQ12 DDR_DQ10 W1 DDR0_DQ14 DDR0_A11 R6 DDR_A12
DDR_A13 T8 A12/BC_N DQ12 C8 DDR_DQ13 DDR0_DQ15 DDR0_A12 R1 DDR_A13
A13 DQ13 D3 DDR_DQ14 DDR_BA0 M1 DDR0_A13
DDR_A14_W En L2 DQ14 D7 DDR_DQ15 DDR_BA1 N1 DDR0_BA0
DDR_A15_CAS M8 WE_N/A14 DQ15 DDR0_BA1 E1 DDR_LDQS_P
DDR_A16_RAS L8 CAS_N/A15 B7 DDR_UDQS_P DDR_BG0 T4 DDR0_DQS0 E2 DDR_LDQS_N
RAS_N/A16 UDQS_T A7 DDR_UDQS_N N2 DDR0_BG0 DDR0_DQS0_N
DDR_BA0 N2 UDQS_C DDR0_BG1 V1 DDR_UDQS_P
DDR_BA1 N8 BA0 G3 DDR_LDQS_P T2 DDR0_DQS1 V2 DDR_UDQS_N
BA1 LDQS_T F3 DDR_LDQS_N Reserved Pins U4 DDR0_ATB0 DDR0_DQS1_N
DDR_BG0 M2 LDQS_C DDR0_ATB1
BG0 E2 DDR_UDM DDR_CLKP L1
DDR_CLKP K7 NF/UDM_N/UDBI_N DDR_CLKN L2 DDR0_CK0
DDR_CLKN K8 CK_T E7 DDR_LDM DDR0_CK0_N
CK_C NF/LDM_N/LDBI_N DDR_CKE H2
DDR_CKE K2 P9 DDR_ALERTn J4 DDR0_CKE0
CKE ALERT_N DDR0_CKE1
DDR_ODT K3 F9 R1 240R DDR_CSn L6
ODT ZQ R0402 1% K2 DDR0_CS0_N
DDR_PARITY T3 DDR0_CS1_N
PAR DDR_ODT H1
C DDR_TEN N9 J3 DDR0_ODT0 C
TEN DDR0_ODT1
DDR_CSn L7 DDR_ACTn N6
DDR_ACTn CS_N DDR0_ACT_N
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
L3 T7 TP11
ACT_N NF/NC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

DDR_RESET# P1 DDR_ALERTn R3
RESET_N DDR0_ALERT_N
16Gbit R88 240R M2
DDR0_CAL0
B2
E1
E9

K1
K9

N1

A2
A8
C9
D2
D8
E3
E8

H1
H9
G8

M9

T1

F1

R0402 1%
FBGA-96 DDR_A15_CAS M4
DDR0_CAS_N
DDR_PARITY T1
DDR0_PAR
DDR_A16_RAS M5
DDR0_RAS_N
DDR_RESET# G1
DDR0_RESET0_N
VDD_1V2 DDR_A14_W En N3
VDD_2V5 DDR_VPP DDR0_WE_N
AM62x bga425_0d5_13x13mm
FB4 120R DDR_CLKP R2 33R C82 10nF BGA425
0402 1.3A R0201 5% C0201 6.3V
DDR_CLKN R3 33R
R0201 5%

VDD_1V2 VDD_1V2

VDD_1V2 DDR_VREFCA DDR_VREFCA VDD_1V2

B R84 B
R4 R81 DNP
10K DNP 1%
R86 C121 1% 1% R0402
1K 100nF C122 C120 C119 C118 C117 C109 R0402 R0402 NOTE: DDR DQ Lines Swapped
1% 10V 100nF 100nF 100nF 100nF 100nF 22uF DDR_ALERTn DDR_RESET# Within Data Byte
TP13
R0402 C0201 10V 10V 10V 10V 10V 10V
C0201 C0201 C0201 C0201 C0201 C0603
DDR_TEN R85
2.2k
R87 C123 C124 1%
1K 100nF 100nF R83 R0402
1% 10V 10V 1K
R0402 C0201 C0201 1%
R0402

VDD_1V2

C282 C281 C105 C106 C280 C246 C277 C278 C279

1nF 1nF 100pF 100pF 47pF 47pF 10pF 10pF 10pF
VDD_1V2 16V 16V 50V 50V 25V 25V 25V 25V 25V
DDR_VPP C0201 C0201 C0201 C0201 C0201 C0201 C0201 C0201 C0201

DDR_CKE
A A

C81 C99 C100 C101 C102 C114 C115 C116 C58 C59 C80
100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 2.2uF Main
10V 10V 10V 10V 10V 10V 10V 10V 10V 10V 10V R82
C0201 C0201 C0201 C0201 C0201 C0201 C0201 C0201 C0201 C0201 C0402 DNP
1% https://www.seeedstudio.com
R0402
Title:
BeaglePlay
Size: Document Number: Rev:
A3 008_SoC DDR & DDR4 v1.0
Draw By: qxn Date: Tuesday, December 27, 2022 Sheet: 8 of 22
5 4 3 2 1
 5 4 3 2 1

eMMC/SD
U3-2

A1 H1
VDD_1V8 A2 NC1 NC59 H2
A7 NC2 NC60 H3
A8 NC3 NC61 H12
A9 NC4 NC62 H13
A10 NC5 NC63 H14
A11 NC6 NC64 J1
R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 A12 NC7 NC65 J2
49.9K 49.9K 49.9K 49.9K 49.9K 49.9K 49.9K 49.9K 49.9K 10K A13 NC8 NC66 J3
1% 1% 1% 1% 1% 1% 1% 1% 1% 1% A14 NC9 NC67 J12
D R0402 R0402 R0402 R0402 R0402 R0402 R0402 R0402 R0402 R0402
eMMC B1
B7
B8
NC10
NC11
NC12
NC68
NC69
NC70
J13
J14
K1
D

U1I VDD_3V3 B9 NC13 NC71 K2

AB1 EMMC_CLK U3-1 B10 NC14 NC72 K3
MMC0_CLK B11 NC15 NC73 K6
AA2 EMMC_D0 A3 E6 C65 100nF B12 NC16 NC74 K7
MMC0_DAT0 EMMC_D1 DAT0 VCC_E6 NC17 NC75
MMC0 MMC0_DAT1
AA1
AA3 EMMC_D2
A4
A5 DAT1 F5
C0201
C66
10V
100nF
B13
B14 NC18 NC76
K12
K13
PwrGrp:VDDSHV4 MMC0_DAT2 Y4 EMMC_D3 B2 DAT2 VCC_F5 C0201 10V C1 NC19 NC77 K14
1.8V MMC0_DAT3 AB2 EMMC_D4 B3 DAT3 J10 C67 100nF C3 NC20 NC78 L1
MMC0_DAT4 AC1 EMMC_D5 B4 DAT4 VCC_J10 C0201 10V C5 NC21 NC79 L2
MMC0_DAT5 AD2 EMMC_D6 B5 DAT5 K9 C68 100nF C7 NC22 NC80 L3
MMC0_DAT6 AC2 EMMC_D7 B6 DAT6 VCC_K9 C0201 10V C8 NC23 NC81 L12
MMC0_DAT7 DAT7 C69 4.7uF C9 NC24 NC82 L13
Y3 EMMC_CMD C0402 6.3V C10 NC25 NC83 L14
MMC0_CMD M5 VDD_1V8 C11 NC26 NC84 M1
CMD C12 NC27 NC85 M2
B22 R80 0R SD_CLK C6 C70 100nF C13 NC28 NC86 M3
MMC1_CLK R0201 1% R16 0R EMMC_CLK_S M6 VCCQ_C6 C0201 10V C14 NC29 NC87 M7
A22 SD_D0 R0201 1% CLK M4 C71 100nF D1 NC30 NC88 M8
MMC1_DAT0 SD_D1 TP1 VCCQ_M4 NC31 NC89
MMC1 MMC1_DAT1
B21
C21 SD_D2 2 1 H5 N4
C0201
C72
10V
100nF
D2
D3 NC32 NC90
M9
M10
MMC1_DAT2 SD_D3 [5,9,10,11,12,16,19] RESETSTATz IN RCLK VCCQ_N4 NC33 NC91
PwrGrp:VDDSHV5 D22 D48 C0201 10V D4 M11
1.8V MMC1_DAT3 P3 C73 100nF D12 NC34 NC92 M12
A21 SD_CMD 2 1 K5 VCCQ_P3 C0201 10V D13 NC35 NC93 M13
MMC1_CMD [14] EMMC_RSTn IN RST_n NC36 NC94
D56 P5 C74 100nF D14 M14
VCCQ_P5 C0201 10V E1 NC37 NC95 N1
D17 GPIO1_48 SD_CD 2 1 C75 4.7uF E2 NC38 NC96 N3
MMC1_SDCD [10,11,12,16,19] PORz_OUT IN NC39 NC97
C GENERAL GPIO1_49
D47 C0402 6.3V E3
NC40 NC98
N6 C
C17 RB520S30T1G E5 N7
PwrGrp:VDDSHV0 MMC1_SDWP OUT SD_VOLT_SEL [5] NC41 NC99
SOD-523 R20 R15 E8 N8
3.3V 49.9K 10K E12 NC42 NC100 N9
D25 R79 33R 200mA 1% 1% E13 NC43 NC101 N10
MMC2_CLK OUT W L_CLK [20] NC44 NC102
R0201 5% 30V R0402 R0402 E14 N11
B24 C2 C76 100nF F1 NC45 NC103 N12
MMC2_DAT0 BI W L_D0 [20] VDDI NC46 NC104
C25 C0201 10V F2 N13
MMC2_DAT1 BI W L_D1 [20] NC47 NC105
MMC2 E23 E9 F3 N14

VSSQ_C4
VSSQ_N2
VSSQ_N5
VSSQ_P4
VSSQ_P6
VSS_H10
MMC2_DAT2 BI W L_D2 [20] VSF1 NC48 NC106

VSS_G5
D24 E10 F12 P1

VSS_E7

VSS_K8

VSS_A6
VSS_J5
MMC2_DAT3 BI W L_D3 [20] VSF2 NC49 NC107
PwrGrp:VDDSHV6 F10 F13 P2
1.8V C24 VSF3 K10 F14 NC50 NC108 P7
MMC2_CMD BI W L_CMD [20] VSF4 NC51 NC109
G1 P8
A23 GPIO0_71 EMMC16G-TB29-PZ90 G2 NC52 NC110 P9
MMC2_SDCD NC53 NC111

E7

K8

A6

C4
N2
N5
P4
P6
G5
H10

J5
VFBGA-153 G3 P10
B23 GPIO0_72 G10 NC54 NC112 P11
MMC2_SDWP R251 G12 NC55 NC113 P12
bga425_0d5_13x13mm AM62x 10K G13 NC56 NC114 P13
BGA425 1% G14 NC57 NC115 P14
R0402 NC58 NC116

EMMC16G-TB29-PZ90
VFBGA-153

B B

MICRO SD CARD
VDD_SD
VDD_3V3 VDD_3V3_SD

R21 R77 R76 R78 R75 R74 R73

VDD_3V3 10K 10K 10K 10K 10K 10K 10K
1% 1% 1% 1% 1% 1% 1%

13
12
R0402 R0402 R0402 R0402 R0402 R0402 R0402 J1
VDD_3V3 VDD_3V3_SD SD_D2 1

G4
G3
R60 SD_D3 2 DATA2
10K U21 SD_CMD 3 CS
1% 1 6 4 DI
R0402 VIN VOUT SD_CLK 5 VDD
2 1 3 4 6 SCLK
[13] SD_PW R_EN IN ON CT SD_D0 VSS
D50 7
5 SD_D1 8 DO
GND

2 1 C57 QOD SD_CD 9 DATA1

G1
G2
[5,9,10,11,12,16,19] RESETSTATz IN CDN
D51 22uF C51
2

2
RB520S30T1G 25V TPS22918DBVR 22uF ST-TF-003J
TPD1E1B04DPY

TPD1E1B04DPY

TPD1E1B04DPY

TPD1E1B04DPY

TPD1E1B04DPY

TPD1E1B04DPY

TPD1E1B04DPY
2

10
11
SOD-523 C0805 SOT23-6 25V
200mA C0805 D18 D17 D16 D15 D14 D13 D9 C77 C78 C79
30V 4.7uF 100nF 100nF
X1SON(2) 6.3V 10V 10V
3.6V C0402 C0201 C0201 MICRO_SD_ST_TF_003A_16_1x14_5mm
1

1
A A

Main

https://www.seeedstudio.com
Title:
BeaglePlay
Size: Document Number: Rev:
A3 009_SoC SDIO & eMMC & SD v1.0
Draw By: qxn Date: Tuesday, December 27, 2022 Sheet: 9 of 22
5 4 3 2 1
 5 4 3 2 1

Gigabit Ethernet VDD_3V3 PHY_DVDD3V3

PHY_VDDIO
PHY_VDD1V0

FB29 120R DVDD33 AVDD10 FB30 0R

PHY_VDD1V0 0402 1.3A R0402 5% VDD_3V3

FB31 0R DVDD10 AVDD33 FB32 120R VDD_1V8

R0402 5% 0402 1.3A
C93 DVDDRG R32 DNP
C91 C92 C94 R0402 5%
1uF
4.7uF 100nF 100nF C108 C295
C0201
6.3V 10V 10V C95 C107 C294 C296 C297 C298

21

29

38

11
40

28
D 1uF 1uF D

3
8
C0402 C0201 6.3V C0201 4.7uF 100nF 100nF 100nF 100nF 100nF
C0201 C0201
6.3V 10V 10V 10V 10V 10V

DVDD33 29

AVDD10(09) 3
AVDD10(09) 8

AVDD33 11
AVDD33 40
DVDD10(09) 21

AVDD10(09) 38

DVDD_RG
C0402 C0201 6.3V C0201 6.3V C0201 C0201 C0201
VDD_1V8
GND GND

GND GND GND

R263
J24
2.2k
1%
R0402 C90 100nF PHYRSTB 12 1 MDI0+ 2
C0201 10V PHYRSTB MDI[0]+ 2 MDI0- 3 TD1+
MDIO 14 MDI[0]- TD1-
[11,16] MDIO0_MDIO BI MDIO
MDC 13 4 MDI1+ 4
[11,16] MDIO0_MDC BI MDC MDI[1]+ TD2+
5 MDI1- 5
RGMII1_RD0 RXD0/RXDLY 25 MDI[1]- TD2-
RGMII1_RD1 RXD1/TXDLY 24 RXD0/RXDLY 6 MDI2+ 6
RGMII1_RD2 RXD2/PLLOFF 23 RXD1/TXDLY MDI[2]+ 7 MDI2- 7 TD3+
RGMII1_RD3 RXD3/PHYAD0 22 RXD2/PLLOFF MDI[2]- TD3-
RXD3/PHYAD0 9 MDI3+ 8
RGMII1_RXC RXC/PHYAD1 27 MDI[3]+ 10 MDI3- 9 TD4+
RGMII1_RX_CTL RXCTL/PHYAD2 26 RXC/PHYAD1 MDI[3]- TD4-
RXCTL/PHYAD2 39 RSET R33 2.49K 1\2 D1A 2\2 D1B 1\2 D2A 2\2 D2B 1 16
RSET GND CT5 SHIELD0
TXD0 18 R0402 1% 15
TXD1 17 TXD0 35 GBE_CLKO TP8 PHY_VDD1V0 10 SHIELD1
TXD2 16 TXD1 CLKOUT 1 2 4 5 1 2 4 5 NC
TXD3 15 TXD2 30 REGOUTL19 2.2uH 10 9 7 6 10 9 7 6
TXD3 REG_OUT 2.0x1.6 mm 2.0A GND

TPD4E05U06DQAR
C R229 0R TXC 20 31 INTB C299 C300 14 YELLOW C
[16] MCU_OBSCLK0 IN TXC INTB/PMEB YELA
R0402 5% TXCTL 19 4.7uF 100nF
TXCTL 32 LED0/CFG_EXT 6.3V 10V USON-10 USON-10 USON-10 USON-10 13
LED0/CFG_EXT YELC

8
XTAL_IN 36 C0402 C0201 5.5 V 5.5 V 5.5 V 5.5 V
Layout Note: Y2 XTAL_IN 33 LED1/CFG_LDO0 11
Co-lay R277 and C88 DNP 37 LED1/CFG_LDO0 GAOC
Co-lay R229 and R248 XTAL_OUT/EXT_CLK GREEN
3.2 x 2.5mm 34 LED2/CFG_LDO1 12
LED2/CFG_LDO1 PHY_DVDD3V3 GCOA
EXT_CLK: populate R229, R277; DNP Y2,C88,C89,R248 1 3 R248 DNP XTAL_OUT GND R34 0R ORANGE

EGND
Crystal: populate Y2,C88,C89,R248; DNP R229,R277 R277 R0402 5% R35 0R R39 DNP
0R C88 C89 R40 1K R164 DNP
2

1% DNP DNP R165 1K R0402 1%

R0201 50V 50V U6 R0402 1% LPJG0933H11NL

41
C0201 C0201 RTL8211F-VD-CG rj45_18p_21_23x15_93x13_3MM
QFN-40(5*5)

GND GND

VDD_1V8 PHY_DVDD3V3
C97
R38 1nF
1M 2kV
1% C1206
R1206

2 1 R36 1 R37 R259 1 R262

[14] GBE_RSTn IN
D32 10K 10K 10K 10K
2 1 1% 1% 1% 1%
B [9,11,12,16,19] PORz_OUT IN B
D33 R0201 R0201 R0201 R0201
2 1 2 3 2 3 INTB
[5,9,11,12,16,19] RESETSTATz IN
D54 30V
Q13 Q14
RB520S30T1G
SOD-523 200mA DMG1012T-7 DMG1012T-7
SOT523 SOT523
[14] GBE_INTn OUT
PHYRSTB

SoC MAC 1.8V Strap options

CFG_EXT = 0, CFG_LDO[1:0] = 10 : Internal 1.8V
U1M PHY_VDDIO PHY AD[2:0] = 000: PHY Addr 000
AB17 RGMII1_RD0 PHY PLLOF = 0 : Enable PLL
RGMII1_RD0 AC17 RGMII1_RD1 R41 4.7K RXD2/PLLOFF R42 DNP
PHY TXDLY = 0 : TX delay: 0ns
RGMII1_RD1 PHY RXDLY = 1 : RX delay: 2ns
AB16 RGMII1_RD2 R43 4.7K RXD1/TXDLY R44 DNP
RGMII1_RD2 AA15 RGMII1_RD3 R45 DNP RXD0/RXDLY R46 4.7K
RGMII1_RD3
RGMII1 AD17 RGMII1_RXC
R0201 5% R0201 5%

PwrGrp:VDDSHV2 RGMII1_RXC Place close to SoC R47 4.7K RXD3/PHYAD0 R48 DNP
AE17 RGMII1_RX_CTL R61 4.7K RXC/PHYAD1 R62 DNP
RGMII1_RX_CTL R249 4.7K RXCTL/PHYAD2 R252 DNP
AE20 RGMII1_TD0 R51 33R TXD0 R0201 5% R0201 5%
A RGMII1_TD0 A
AD20 RGMII1_TD1 R52 33R TXD1
RGMII1_TD1 AE18 RGMII1_TD2 R57 33R TXD2 PHY_DVDD3V3
RGMII1_TD2 AD18 RGMII1_TD3 R58 33R TXD3
RGMII1_TD3 Main
R0201 5% R253 4.7K LED0/CFG_EXT R283 DNP
AE19 RGMII1_TXC R49 33R TXC R308 4.7K LED1/CFG_LDO0 R309 DNP
RGMII1_TXC R0201 5% R310 DNP LED2/CFG_LDO1 R311 4.7K https://www.seeedstudio.com
AD19 RGMII1_TX_CTL R50 33R TXCTL R0201 5% R0201 5%
RGMII1_TX_CTL R0201 5% Title:
GND BeaglePlay
bga425_0d5_13x13mm AM62x
BGA425 Size: Document Number: Rev:
A3 010_SoC RGMII & GBE PHY v1.0
Draw By: qxn Date: Tuesday, December 27, 2022 Sheet: 10 of 22
5 4 3 2 1
 5 4 3 2 1

VSYS_5V

Q5 U14

10BASE-T1 Single-Pair Ethernet with PoDL C262

100nF 6
U22
1
3
CJ3407
2
SOT-23
PO_5V 4
5 IN GND
1
2
10V IN OUT VDD_1V8 6 IN1 GND1 3
C0201 5 2 IN2 GND2 7
GND ILIM PAD

EPAD

1
4 3
EN *FAULT R276 R207 Q12A Q12B TVS0500DRVR

4
From 3V3 IO TPS25200DRVT 390K 10K SON-6(2x2)
[13] PO_EN

7
IN
W SON-6 1% 1% 2 5 BCM857BS-7-F 5V
D Current limit 250mA R0402 R0402 SOT-363 D
R278 To 1V8 IO
PO_OCn [14]

3
OUT
100K
1%
R0402
VDD_3V3 R56 R59
49.9K 49.9K
1% 1%
VDD_1V8 VDD_1V0 R0402 R0402
C3 C4 C5
10nF 100nF 1uF
6.3V 10V 10V
C0201 C0201 C0402 C6 C7 C8 C9 C10 C11
10nF 100nF 1uF 10nF 100nF 1uF L2
6.3V 10V 10V 6.3V 10V 10V 1 4
U13
C0201 C0201 C0402 C0201 C0201 C0402
2 3
RMII2_RXD0 SPE_RX_D0 16 3 J2
RMII2_RXD1 SPE_RX_D1 15 RX_D0 VDDA_3.3_1.8 17 1A 9.2x6.0 mm
SPE_RX_D2 14 RX_D1 VDDIO 1 500uH
13 RX_D2 DVDD_1.0 2
RX_D3 CSTA0950RB-501 2
2 C12 220nF R106 0R PSE_P 3 S1
RMII2_CRS_DV SPE_RX_DV_CRS_DV 18 CEXT C0402 16V R0402 5% 4 3 S1 S2
RMII2_REF_CLK SPE_RX_CLK 19 RX_DV_CRS_DV 4 TX_P R100 49.9R R104 0R C17 5 4 S2
RMII2_RX_ER SPE_RX_ER 20 RX_CLK_50MHz_RMII_M TX+ R0402 1% R0402 5% L1 100pF 5
RX_ER 5 RX_P R102 2K C15 DNP R109 DNP 1 4 50V
SPE_TX_D0 24 RX+ R0402 1% C0402 50V R0402 5% C0402
SPE_TX_D1 25 TX_D0 6 RX_N R103 2K C14 DNP R108 DNP 2 3 LPJE158-0CNL
26 TX_D1 RX- R0402 1% C0402 50V R0402 5%
TX_D2 RJ11_6P4C_1d27_21_15x13_8x13_3
C 27 7 TX_N R101 49.9R R105 0R 1A 9.2x6.0 mm C
TX_D3 TX- R0402 1% R0402 5% 500uH
[10,16] MDIO0_MDC BI
PSE_N
22 C13 220nF R107 0R CSTA0950RB-501
[10,16] MDIO0_MDIO BI
SPE_TX_EN TX_CLK
23 29 LED0 C0402 16V R0402 5%
TX_EN LED_0 30 CLKOUT R98 33R RMII2_REF_CLK1 R223 DNP C16
VDD_1V8 12 CLKOUT_LED_1 28 LED2 R0201 5% 100pF
11 MDC LED_2_TX_ER RMII2_REF_CLK2 R231 DNP RMII2_REF_CLK 50V
MDIO R0402 5% C0402
R110 2.2k SPE_INTn 21 VDD_3V3
R0402 1% PWDN_INT 9 XO R99 0R R222 DNP
XO R0402 5% R0402 5%
R111 2.2k RST_N_N 31 10 XI
R0402 1% RST_N_N XI_50MHzIn
X2
8 GPIO2 R224 DNP
33 GPIO2 32 GPIO1 R0402 5% 2 1
2 1 PAD GPIO1 R221
[9,10,12,16,19] PORz_OUT IN
D34 C1 DNP
33pF 5% Layout Noete:
2 1 DP83TD510ERHBR 3 4 50V R0402 Co-layout R223 and R231.
[5,9,10,12,16,19] RESETSTATz IN
QFN-32(5*5) Co-layout C1 and R221.
D46 C0402
Co-layout R220 and C254.
C2 Co-layout OSC2 and X2.
SPE_RSTn 2 1 VDD_3V3 33pF 25MHz
Co-layout R224 and R275.
D53 VDD_3V3 50V 2.5 x 2.0 x 0.6mm R220 C254
RB520S30T1G C0402 0R DNP
OSC2 Clock options:
SOD-523 C236 R318 1K 1 2 R317 1K 1 2 5% 10V
200mA 100nF R0402 1% LED1 0402 R0402 1% LED2 0402 2 1 R0402 C0201
30V 10V Yellow Green GND EN 1. RMII Master mode with 25MHz crystal, output 50MHz REF_CLK to MAC.
2. RMII Master mode with 25MHz clock form SoC, output 50MHz REF_CLK to MAC.
C0201 3 3 3 4 3. RMII Master mode using a common 50 MHz osc for both MAC and PHY
CLK VDD
B Q4 Q3 B
DMG1012T-7 DMG1012T-7 DNP
LED2 R167 2.2k 1 SOT523 LED0 R166 2.2k 1 SOT523 2.5 x 2 x 0.8mm
R0402 1% R0402 1%
R275 DNP
2 2 IN CLKOUT0 [13]
R0402 1%

R272
DNP
1%
R0402

SoC MAC 1.8V U1S

Strap options VDD_1V8 Strap options:
1.PHY ADDR: 0b0001
GPIO1: External PH
RX_ER: Internal PD
GPIO2 R112 DNP RX_D0: Internal PD
RMII2_RXD0 AE23 R0402 1% RX_D3: Internal PD
RMII2_RXD1 AB20 RGMII2_RD0 LED2 R113 DNP
RGMII2_RD1 2.Voltage Level: 2.4V&1.0V p2p
SPE_RSTn GPIO1_5 AC21 R0402 1% LED2: Internal PD
SPE_INTn GPIO1_6 AE22 RGMII2_RD2 SPE_RX_D1 R114 2.2k 3.Mode: RMII Master
RGMII2_RD3 R0402 1% RX_D1: External PU
RMII2_REF_CLK AD23 SPE_RX_D2 R115 DNP LED0: Internal PD
RGMII2_RXC R0402 1% 4.RMII MODE: CRS_DV
RMII2_RX_ER RX_D2: Internal PD
AD22
RGMII2_RX_CTL RGMII2 GPIO1 R116
R0402
2.2k
1%
5.Termination: 50 Ohm
GPIO2: Internal PD
SPE_TX_D0 R96 33R RMII2_TXD0 Y18 PwrGrp:VDDSHV2 6.Clockout: 25MHz
A RGMII2_TD0 A
SPE_TX_D1 R95 33R RMII2_TXD1 AA18 RX_DV: Internal PD
R0201 5% AD21 RGMII2_TD1 1.8V
AC20 RGMII2_TD2
RGMII2_TD3 Main
RMII2_CRS_DV AE21
RGMII2_TXC https://www.seeedstudio.com
SPE_TX_EN R97 33R RMII2_TX_EN AA19
R0201 5% RGMII2_TX_CTL
Title:
BeaglePlay
AM62x bga425_0d5_13x13mm
BGA425 Size: Document Number: Rev:
A3 011_SoC RMII & SPE PHY v1.0
Draw By: qxn Date: Thursday, December 29, 2022 Sheet: 11 of 22
5 4 3 2 1
 5 4 3 2 1

VDD_1V8
RGB888 to HDMI VDD_3V3
VSYS_5V

D55 RB520S30T1G

L21 90R 100mA 1

2 F1 1 2 100mA
TX2P 1 2 R63 0603 1 2
R234 R235 R257 DNP SOD-523
2.2k 2.2k 2.2k TX2M 4 3 1% 200mA 30V R65 R64
1% 1% 1% R0402 2.2k 2.2k J4
R0402 R0402 R0402 L22 90R 100mA HDMI_CEC_D 1 2 1% 1%
U7 TX1P 1 2 D63 R0402 R0402
DNP TYPE A
D 12 30 TX1M 4 3 SOD-523 HDMI_TX2+ 1 D
[14,17] I2C2_SCL BI PCSCL TX2P D2P
11 29 2
[14,17] I2C2_SDA BI PCSDA TX2M 200mA HDMI_TX2-
G_D2
PCADR 32 L23 90R 100mA 3
10 PCADR 27 TX0P 1 2 30V HDMI_TX1+ 4
D2N

[14] HDMI_INT OUT INT TX1P D1P

RESETn 33 26 5
SYSRSTN TX1M TX0M 4 3 HDMI_TX1- 6
G_D1

D1N
VOUT0_PCLK 51 25 HDMI_TX0+ 7
PCLK TX0P 24 L24 90R 100mA 8
D0P

VOUT0_D0 61 TX0M 1 2 HDMI_TX0- 9

G_D0

VOUT0_D1 60 D0 22 TXCP HDMI_TXC+ 10

D0N

VOUT0_D2 59 D1 TXCP 21 TXCM 4 3 11

CLKP

VOUT0_D3 58 D2 TXCM HDMI_TXC- 12

G_CLK

VOUT0_D4 57 D3 Blue 17 R258 33R HDMI_CEC 13

CLKN
0.85x0.65 mm
VOUT0_D5 55 D4 CEC R0201 5% 14
CEC

VOUT0_D6 54 D5 16 HDMI_DSCL 15
Utility

VOUT0_D7 53 D6 DDCSCL 15 HDMI_DSDA 16

SCL

VOUT0_D8 52 D7 DDCSDA 17
SDA

VOUT0_D9 50 D8 DVI_+5V 18
G_DDC

VOUT0_D10 49 D9 14 HDMI_HPD 19
+5V

VOUT0_D11 48 D10 HPD 20

HPD

VOUT0_D12 47 D11 Green REXT

D12 VDD_3V3

2
VOUT0_D13 46
D13 GND

2
VOUT0_D14 45 FB24 120R R89 R66 D7
VOUT0_D15 44 D14 0402 1.3A 7.5K 33K D4 D60 D57 D5 FB36 0R 20
43 D15 C238 1% 1% ESDPSA0402V05 R0402 5% 21
[14] VOUT0_D16 IN D16
42 10uF R0402 R0402 0402 0402 0402 0402 FB37 0R 22
[14] VOUT0_D17 IN D17
41 6.3V 5V 5V 5V 5V R0402 5% 23
[14] VOUT0_D18 IN D18 IO 1.8V
40 C0402 FB38 0R

1
[14] VOUT0_D19 IN D19 Red
39 13 3.6V R0402 5% TYPE_A

1
[14] VOUT0_D20 IN D20 OVDD33
C 38 X1SON(2) FB39 0R C
[14] VOUT0_D21 IN D21
37 9 R0402 5%
[14] VOUT0_D22 IN D22 VCC33
36
[14] VOUT0_D23 IN D23 19 C61 C243 C276
VOUT0_HSYNC 63 PVCC33 100nF 100nF 100nF hdmi19p_1d155_23_1x7_7x16_4mm
VOUT0_VSYNC 64 HSYNC 10V 10V 10V VDD_1V2
VOUT0_DE 62 VSYNC 8 C0201 C0201 C0201 VDD_1V2
DE IVDD12_8 35
IVDD12_35 56 HDMI_AVCC FB18 120R
IVDD12_56 0402 1.3A
7 28 FB19 120R C240 C241 C242 C275 C237
[14] MCASP1_ACLKX IN SCK/MCLK DVDD12
6 0402 1.3A 100nF 100nF 100nF 10uF 10uF
[14] MCASP1_AFSX IN WS
5 23 FB23 120R 10V 10V 10V 6.3V 6.3V
[14] MCASP1_AXR0 IN I2S0 AVCC12
4 0402 1.3A C0201 C0201 C0201 C0402 C0402
[14] MCASP1_AXR1 IN I2S1
3 18 FB22 120R
[14] MCASP1_AXR2 IN I2S2 PVCC12
2 0402 1.3A
[14] MCASP1_AXR3 IN I2S3/SPDIF 1
31 OVDD_1 34 C247 C250 C269 C248 C252 C239 C271 C245 C244
GND

ENTEST OVDD_34 100nF 10uF 1nF 100nF 10uF 100nF 10uF 100nF 10uF
10V 6.3V 16V 10V 6.3V 10V 6.3V 10V 6.3V
R256 IT66121FN C0201 C0402 C0201 C0201 C0402 C0201 C0402 C0201 C0402
65

10K QFN-64
1%
R0402

VDD_1V8

FB20 120R
0402 1.3A VDD_1V8
B VDD_1V8 B
C249 C251 C104
100nF 100nF 10uF
10V 10V 6.3V R146
C0201 C0201 C0402 R150 DNP
10K 1%
1% R0402
R0402
2 1 RESETn
[14] HDMI_RSTn IN
U1N D58 200mA PCADR
VOUT0_D0 R295 33R U22 RB520S30T1G
VOUT0_D1 R294 33R V24 VOUT0_DATA0 SOD-523
VOUT0_D2 R293 33R W25 VOUT0_DATA1 2 1
VOUT0_D3 VOUT0_DATA2 [9,10,11,16,19] PORz_OUT IN
R292 33R W24 D59
VOUT0_D4 R291 33R Y25 VOUT0_DATA3 R147
VOUT0_D5 R290 33R Y24 VOUT0_DATA4 2 1 10K
VOUT0_D6 VOUT0_DATA5 HDMI_TX2+ [5,9,10,11,16,19] RESETSTATz IN

VOUT0_D7
R289
R288
33R
33R
Y23
AA25 VOUT0_DATA6 VOUT0 TX2P R299
R0201
DNP
1%
D35 1%
R0402
VOUT0_D8 R287 33R V21 VOUT0_DATA7 PwrGrp:VDDSHV3 TX2M R300 DNP HDMI_TX2- C274
VOUT0_D9 R286 33R W21 VOUT0_DATA8 R0201 1% 100nF
VOUT0_D10 R285 33R V20 VOUT0_DATA9 1.8V TX1P R301 DNP HDMI_TX1+ 10V
VOUT0_D11 R284 33R AA23 VOUT0_DATA10 R0201 1% C0201
VOUT0_D12 R282 33R AB25 VOUT0_DATA11 TX1M R302 DNP HDMI_TX1-
VOUT0_D13 R281 33R AA24 VOUT0_DATA12 R0201 1%
VOUT0_D14 R280 33R Y22 VOUT0_DATA13 TX0P R303 DNP HDMI_TX0+
VOUT0_D15 R279 33R AA21 VOUT0_DATA14 R0201 1% Internal Function PCADR = LOW PCADR = HIGH
R0201 5% VOUT0_DATA15 TX0M R304 DNP HDMI_TX0-
VOUT0_PCLK R145 33R AC24 R0201 1% Device address 0x98 0x9A
R0201 5% VOUT0_PCLK TXCP R305 DNP HDMI_TXC+
A A
VOUT0_DE R296 33R Y20 R0201 1%
R0201 5% VOUT0_DE TXCM R306 DNP HDMI_TXC-
VOUT0_VSYNC R297 33R AC25 R0201 1%
VOUT0_VSYNC Main
R0201 5%
VOUT0_HSYNC R298 33R AB24 Co-lay with CMC
R0201 5% VOUT0_HSYNC https://www.seeedstudio.com
AM62x bga425_0d5_13x13mm
BGA425 Title:
BeaglePlay
Size: Document Number: Rev:
A3 012_SoC DDS & HDMI v1.0
Draw By: qxn Date: Tuesday, December 27, 2022 Sheet: 12 of 22
5 4 3 2 1
 5 4 3 2 1

SoC GPIO 3.3V

VDD_3V3 VDD_3V3

R140 R142 R143 R144 R134 R148

10K 10K 2.2k 2.2k 10K 10K
1% 1% 1% 1% 1% 1%
D R0402 R0402 R0402 R0402 R0402 R0402 D

U1A
R312 33R B16 E15 MCAN0_RX, UART5_TXD, TIMER_IO3, EQEP2_S, PR0_UART0_TXD, GPIO1_25, MCASP2_AXR1
[5,18] I2C0_SCL BI I2C0_SCL MCAN0_RX MCAN0_TX, UART5_RXD, TIMER_IO2, EQEP2_I, PR0_UART0_RXD, GPIO1_24, MCASP2_AXR0
OUT UART5_TXD [22]
[5,18] I2C0_SDA BI
R0201 5% A16
I2C0_SDA GENERAL MCAN0_TX
C15 IN UART5_RXD [22]
R314 33R B17 PwrGrp:VDDSHV0 A15 SPI0_CS2, I2C3_SCL, UART2_RXD, TIMER_IO6, AUDIO_EXT_REFCLK0, GPIO1_22, MCASP2_AFSX R315 33R
[22] I2C1_SCL BI I2C1_SCL UART0_CTSN
3.3V
BI I2C3_SCL [22]
R0201 5% A17 R0201 5%
[22] I2C1_SDA BI I2C1_SDA 3.3V SPI0_CS3, I2C3_SDA, UART2_TXD, TIMER_IO7, AUDIO_EXT_REFCLK1, GPIO1_23, MCASP2_ACLKX
B15
UART0_RTSN BI I2C3_SDA [22]
A14
B13 SPI0_CLK D14
SPI0_D0 UART0_RXD IN UART0_RXD [18]
B14 E14
[9] SD_PW R_EN OUT SPI0_D1 UART0_TXD OUT UART0_TXD [18]
A13
[17] MST_RST_3V3 OUT SPI0_CS0
R244 33R C13 A18 R273 33R
[17] BL_PW M_3V3 OUT SPI0_CS1 EXT_REFCLK1 OUT CLKOUT0 [20]
R0201 5% R0201 5%

F6
ATEST0
AE2
ATEST1 OSC0 VSENSE
A2

B1 PwrGrp:VDDS_OSC
IFORCE

AM62x bga425_0d5_13x13mm
BGA425

C C

SoC GPIO 3.3V

U1J
H24 GPIO0_0
OSPI0_CLK OUT BL_EN_3V3 [17]
E25 GPIO0_3
OSPI OSPI0_D0
OSPI0_D1
G24 GPIO0_4
OUT
OUT
LED_USR0
LED_USR1
[21]
[21]
F25 GPIO0_5
PwrGrp:VDDSHV1 OSPI0_D2 F24 GPIO0_6
OUT LED_USR2 [21]
3.3V OSPI0_D3 GPIO0_7
OUT LED_USR3 [21]
J23
OSPI0_D4 GPIO0_8
IN UART6_RXD [19]
J25
OSPI0_D5 GPIO0_9
OUT UART6_TXD [19]
H25
OSPI0_D6 GPIO0_10
OUT LED_USR4 [21]
J22
OSPI0_D7 OUT EEP_W P [18]
F23 GPIO0_11
OSPI0_CSN0 GPIO0_12
BI CSI0_GPIO1 [17]
G21
OSPI0_CSN1 GPIO0_13
BI CSI0_GPIO2 [17]
H21
OSPI0_CSN2 GPIO0_14
OUT CC1352_BOOT [19]
E24
OSPI0_CSN3 OUT CC1352_RSTn [19]
B J24 GPIO0_2 B
OSPI0_DQS BI RTC_INT [18]
G25 GPIO0_1
OSPI0_LBCLKO OUT PO_EN [11]
bga425_0d5_13x13mm AM62x
BGA425

U1E
E18 MCASP0_AXR0, PR0_ECAP0_IN_APWM_OUT, AUDIO_EXT_REFCLK0, PR0_UART0_TXD, EHRPWM1_B, GPIO1_10, EQEP1_I
MCASP0_AXR0 MCASP0_AXR1, SPI2_CS2, ECAP1_IN_AWPM_OUT, PR0_UART0_RXD, EHRPWM1_A, GPIO1_9, EQEP0_S
BI GPIO1_10 [22]
B18
MCASP0_AXR1 MCASP0_AXR2, SPI2_D1, UART6_TXD, ECAP2_IN_APWM_OUT, PR0_UART0_TXD, GPIO1_8, EQEP0_B
BI GPIO1_9 [22]
A19
MCASP0_AXR2 MCASP0_AXR3, SPI2_D0, UART6_RXD, ECAP1_IN_APWM_OUT, PR0_UART0_RXD, GPIO1_7, EQEP0_A
BI SPI2_D1 [22]
B19
MCASP0 MCASP0_AXR3 BI SPI2_D0 [22]
PwrGrp:VDDSHV0 B20 MCASP0_ACLKX, SPI2_CS1, ECAP2_IN_APWM_OUT, GPIO1_11, EQEP1_A
GPIO1_11 [22]
MCASP0_ACLKX A20 MCASP0_ACLKR, SPI2_CLK, UART1_TXD, EHRPWM0_B, GPIO1_14, EQEP1_I
BI

3.3V MCASP0_ACLKR BI SPI2_CLK [22]

D20 MCASP0_AFSX, SPI2_CS3, AUDIO_EXT_REFCLK1, GPIO1_12, EQEP1_B
MCASP0_AFSX MCASP0_AFSR, SPI2_CS0, UART1_RXD, EHRWPM0_A, GPIO1_13, EQEP1_S
BI GPIO1_12 [22]
E19
MCASP0_AFSR BI SPI2_CS0 [22]
bga425_0d5_13x13mm AM62x
BGA425

A A

Main

https://www.seeedstudio.com
Title:
BeaglePlay
Size: Document Number: Rev:
A3 013_SoC GPIO 3.3V v1.0
Draw By: qxn Date: Tuesday, December 27, 2022 Sheet: 13 of 22
5 4 3 2 1
 5 4 3 2 1

SoC GPIO 1.8V

U1F
P25 R246 33R OUT MCASP1_AXR3
GPMC0_CLK [12]
R0201 5%
M25 BOOTMODE0
D
GPMC GPMC0_AD0 N23 BOOTMODE1
OUT GBE_RSTn [10]
D
GPMC0_AD1 OUT EMMC_RSTn [9]
PwrGrp:VDDSHV3 N24 BOOTMODE2
GPMC0_AD2 N25 BOOTMODE3 GPMC0_AD3/PR0_PRU1_GPO11/PR0_PRU1_GPI11/MCASP2_AXR7/PR0_PRU0_GPO3/PR0_PRU0_GPI3/TRC_DATA1/GPIO0_18/BOOTMODE03
1.8V GPMC0_AD3 P24 BOOTMODE4
GPMC0_AD4 P22 BOOTMODE5
GPMC0_AD5 P21 BOOTMODE6
GPMC0_AD6 OUT HDMI_RSTn [12]
R23 BOOTMODE7
GPMC0_AD7 R24 BOOTMODE8 R271 33R
GPMC0_AD8 OUT VOUT0_D16 [12]
R25 BOOTMODE9 R270 33R OUT VOUT0_D17
GPMC0_AD9 [12]
T25 BOOTMODE10 R216 33R OUT VOUT0_D18
GPMC0_AD10 [12]
R21 BOOTMODE11 R266 33R OUT VOUT0_D19
GPMC0_AD11 [12]
T22 BOOTMODE12 R267 33R OUT VOUT0_D20
GPMC0_AD12 [12]
T24 BOOTMODE13 R268 33R OUT VOUT0_D21
GPMC0_AD13 [12]
U25 BOOTMODE14 R269 33R OUT VOUT0_D22
GPMC0_AD14 [12]
U24 BOOTMODE15 R230 33R OUT VOUT0_D23
GPMC0_AD15 [12]
R0201 5%
M21 GPIO0_41
GPMC0_CSN0 GPIO0_42
IN W L_IRQ [20]
L21
GPMC0_CSN1 GPIO0_43
IN GBE_INTn [10]
K22 R316 33R
GPMC0_CSN2 GPIO0_44
BI I2C2_SCL [12,17]
K24 R0201 5%
GPMC0_CSN3 BI I2C2_SDA [12,17]
L23 GPIO0_32 R247 33R
GPMC0_ADVN_ALE OUT MCASP1_AXR2 [12]
R0201 5%
M24 R69 33R
GPMC0_BE0N_CLE OUT MCASP1_ACLKX [12]
R0201 5%
N20 GPIO0_36
GPMC0_BE1N IN HDMI_INT [12]
M22
GPMC0_DIR IN PO_OCn [11]
C U23 R71 33R C
GPMC0_WAIT0 OUT MCASP1_AFSX [12]
V25 R0201 5%
GPMC0_WAIT1 OUT W L_EN [20,21]
K25
GPMC0_WPN IN TP_INT_1V8 [17]
L24 R245 33R
GPMC0_OEN_REN OUT MCASP1_AXR1 [12]
R0201 5%
L25 R72 33R
GPMC0_WEN OUT MCASP1_AXR0 [12]
R0201 5%
AM62x
bga425_0d5_13x13mm BGA425

Bootstrap
VDD_1V8

R92

R90

R170

R171

R172

R173

R174

R175

R176

R177

R178

R179

R180

R181

R182

R183
R168
10K
1%
B R0402 10K B
1%
R0201

BOOTMODE0
BOOTMODE1
BOOTMODE2
R184 1K 2 1 BOOTMODE3
R0402 1% D66 BOOTMODE4
RB520S30T1G BOOTMODE5
SOD-523 BOOTMODE6
BOOTMODE7
200mA BOOTMODE8
30V BOOTMODE9
BOOTMODE10
R185 1K 2 1 BOOTMODE11
R0402 1% D23 BOOTMODE12
R53 1K 2 1 BOOTMODE13
[21] USER_BTN IN
R0402 1% D49 BOOTMODE14
RB520S30T1G BOOTMODE15
SOD-523
200mA
30V
R93

R91

R187

R188

R189

R190

R191

R192

R193

R194

R195

R196

R197

R198

R199

R200
A A
DNP
1%
R0201 Main
Button Not-pressd:
1, PLL Config B[2:0] = 0b011 : Ref Colck -> 25MHz
2, Primarry Boot B[9:3] = 0b1001001 : eMMC Boot
3, Backup Boot B[13:10] = 0b1011 : UART Boot
https://www.seeedstudio.com
Title:
Button Pressd:
1, PLL Config B[2:0] = 0b011 : Ref Colck -> 25MHz
BeaglePlay
2, Primarry Boot B[9:3] = 0b1001000 : SDCard FS Boot
3, Backup Boot B[13:10] = 0b0001 : USB DFU Boot Size: Document Number: Rev:
A3 014_SoC GPIO 1.8V & Bootstrap v1.0
Draw By: qxn Date: Tuesday, December 27, 2022 Sheet: 14 of 22
5 4 3 2 1
 5 4 3 2 1

USB_A & USB_C U4

VSYS_5V

VSYS_5V 1 4
2 GND IN 5
3 GND1 IN1 6
7 GND2 IN2 C44 C130
R94 10K R132 20K PAD 10uF 100nF J14
R0402 1% R0402 1% 10V 10V TYPE-C 2.0
TVS0500DRVR C0603 C0201 USB2_0_TYPE_C
D D
SON-6(2x2)
5V B9
B4 A4/B9/VBUS
A9/B4/VBUS

CC1 A5
CC2 B5 CC1
CC2
L13 90R 400mA
U1D USB0_DP 1 2 USB_C_DM A7
AD11 B7 DN1
USB0 USB0_DP
USB0_DM
AE11 USB0_DM 4 3 USB_C_DP DN2
A6
PwrGrp:VDDA_1P8_USB, DP1

2
AE10 R131 499R DLW 21SN900HQ2L B6
VDDA_3P3_USB

TPD1E1B04DPY

TPD1E1B04DPY
USB0_RCALIB R0402 0.1% R128 R129 DP2
2.0x1.2 mm
AC11 L2012 D24 D25 5.1K 5.1K S1
USB0_VBUS 1% 1% A8 S1 S2
X1SON(2) X1SON(2) R0402 R0402 B8 SBU1 S2 S3
AE9 USB1_DP 3.6V 3.6V SBU2 S3 S4
USB1 USB1_DP AD10 USB1_DM B12 S4 S5

1
USB1_DM B1 A1/B12/GND S5 S6
PwrGrp:VDDA_1P8_USB, AC9 R130 499R A12/B1/GND S6
VDDA_3P3_USB USB1_RCALIB R0402 0.1%
AB10 USB1_VBUS GND
USB1_VBUS

GENERAL C20
USB0_DRVVBUS USB1_DRVVBUS
PwrGrp:VDDSHV0 3.3V USB1_DRVVBUS
F18
C C
bga425_0d5_13x13mm AM62x 5
BGA425
SH1

L4 90R 400mA 1
1 2 USB_A_DM 2 VBUS
3 DM
4 3 USB_A_DP 4 DP
GND
A
DLW 21SN900HQ2L
2.0x1.2 mm SH3 SH2
L2012
GND
7 6

R136 20K USB_A_5V

R0402 1%
J13
R152 ST-USB-117A
10K usb7p_1r4_14x5r72mm
1% GND
R0402
VSYS_5V

U8
3 4
B IN OUT B
5

GND
R133 1K 1 D1 6
R0402 1% EN D2
MH1 TPD3S014DBVR C110

2
1 DNP C111 C131 sot23_6 100uF
D3.125 mm 10uF 100nF 10V
10V 10V C1206
SOT23-6
MH2 C0603 C0201
1 DNP
D3.125 mm GND

MH3 GND
1 DNP
D3.125 mm

MH4
1 DNP
D3.125 mm

GND

A A

Main

https://www.seeedstudio.com
Title:
BeaglePlay
Size: Document Number: Rev:
A3 015_SoC USB & USB_A & USB_C v1.0
Draw By: qxn Date: Tuesday, December 27, 2022 Sheet: 15 of 22
5 4 3 2 1
 5 4 3 2 1

SoC System
VDD_1V8 VDD_3V3

R126 R122
10K 10K
1% 1%
U1C R0402 R0402
D1 MCU_ERRORN TP15
1.8V MCU_ERRORN
OSC0 D2
PwrGrp:VDDS_OSC MCU_PORZ IN MCU_PORz [5,21]
D D
B12 MCU_RESETSTATZ TP16
1.8V MCU_RESETSTATZ
MCU GENERAL E11 MCU_RESETZ TP3
PwrGrp:VDDSHV_MCU MCU_RESETZ

D16
EXTINTN IN EXTINTn [5]
E21 R149 0R
PORz_OUT [9,10,11,12,19]
GENERAL 3.3V PORZ_OUT R0402 5%
OUT

F20 RESET_REQZ TP2

PwrGrp:VDDSHV0 RESET_REQZ
F22
RESETSTATZ OUT RESETSTATz [5,9,10,11,12,19]
bga425_0d5_13x13mm AM62x
BGA425

WKUP Domain U1O

AD24
MDIO0_MDC BI MDIO0_MDC [10,11]
C
RGMII 1.8V AB22 C
PwrGrp:VDDSHV2 MDIO0_MDIO BI MDIO0_MDIO [10,11]
B9
WKUP_I2C0_SCL BI W KUP_I2C0_SCL [17]
A9
WKUP_I2C0_SDA BI W KUP_I2C0_SDA [17]
MCU GENERAL WKUP_CLKOUT0
A12 R274 33R OUT W KUP_CLKOUT0 [11]
PwrGrp:VDDSHV_MCU 1.8V R0201 5%

C2
WKUP_LFOSC0_XI X5
OSC0 WKUP_LFOSC0_XO
C1 2 1
PwrGrp:VDDS_OSC
C127 32.768kHz C126
20pF 3.2 x 1.5 x 0.9mm 20pF
A4 50V 50V
WKUP_UART0_RTSN C6 C0402 C0402
WKUP_UART0_CTSN
B4 WKUP_UART0_RXD, MCU_GPIO0_9
CANUART 3.3V WKUP_UART0_RXD C5 WKUP_UART0_TXD, MCU_GPIO0_10
PwrGrp:VDDSHV_CANUART WKUP_UART0_TXD
B7 R227 0R
PMIC_LPM_EN0 OUT PMIC_LPM_EN0 [5]
R0402 5%
bga425_0d5_13x13mm AM62x
BGA425

B B

MCU Domain
U1H
A8 MCU_I2C0_SCL, MCU_GPIO0_17
MCU_I2C0_SCL MCU_I2C0_SDA, MCU_GPIO0_18
BI MCU_I2C0_SCL [22]
D10
MCU_I2C0_SDA BI MCU_I2C0_SDA [22]
MCU GENERAL 1.8V MCU_SPI0_CLK
A7
D9
PwrGrp:VDDSHV_MCU MCU_SPI0_D0 C9
MCU_SPI0_D1 E8
MCU_SPI0_CS0 B8 R217 33R C128 8pF
MCU_SPI0_CS1 OUT MCU_OBSCLK0 [10]
R0201 5% C0402 50V
X6
B2 3 4
MCU_OSC0_XI
OSC0
PwrGrp:VDDS_OSC A3 R127 0R
MCU_OSC0_XO R0402 5% 2 1 C129 8pF
C0402 50V
B5 MCU_UART0_RXD, MCU_GPIO0_5 25MHz
MCU_UART0_RXD A5 MCU_UART0_TXD, MCU_GPIO0_6
MCU_UART0_TXD 3.2 x 2.5mm
CANUART 3.3V A6 MCU_TIMER_IO0, MCU_SPI1_D0, MCU_GPIO0_7
MCU_UART0_CTSN MCU_TIMER_IO1, MCU_SPI1_D1, MCU_GPIO0_8
OUT MCU_SPI1_D0 [22]
PwrGrp:VDDSHV_CANUART B6
MCU_UART0_RTSN BI MCU_SPI1_D1 [22]
B3 MCU_MCAN0_RX, MCU_TIMER_IO0, MCU_SPI1_CS3, MCU_GPIO0_14
A MCU_MCAN0_RX A
D6 MCU_MCAN0_TX, MCU_GPIO0_13
MCU_MCAN0_TX
D4 MCU_MCAN1_RX, MCU_TIMER_IO3, MCU_SPI1_CLK, MCU_GPIO0_16
MCU_MCAN1_RX BI MCU_SPI1_CLK [22] Main
E5 MCU_MCAN1_TX, MCU_TIMER_IO2, MCU_SPI1_CS1, MCU_EXT_REFCLK0, MCU_GPIO0_15
MCU_MCAN1_TX BI MCU_SPI1_CS1 [22]
bga425_0d5_13x13mm AM62x https://www.seeedstudio.com
BGA425
Title:
BeaglePlay
Size: Document Number: Rev:
A3 016_SoC Reset & MCU v1.0
Draw By: qxn Date: Tuesday, December 27, 2022 Sheet: 16 of 22
5 4 3 2 1
 5 4 3 2 1

OLDI

42
J8
U1L 1

PAD1
Y6 OLDI0_A0_P 2 1
OLDI0_A0P AA5 OLDI0_A0_N 3 2
OLDI0_A0N 3
OLDI 4
4
AB4 OLDI0_A1_P 5
PwrGrp:VDDA_1P8_OLDI OLDI0_A1P AD3 OLDI0_A1_N 6 5
OLDI0_A1N 7 6
AA8 OLDI0_A2_P 8 7
OLDI0_A2P Y8 OLDI0_A2_N 9 8
D D
OLDI0_A2N 10 9
AA7 OLDI0_A3_P 11 10
OLDI0_A3P AB6 OLDI0_A3_N 12 11
OLDI0_A3N 13 12
AC5 OLDI0_A4_P 14 13
OLDI0_A4P AC6 OLDI0_A4_N 15 14
OLDI0_A4N 16 15
AD6 OLDI0_A5_P 17 16
OLDI0_A5P AE5 OLDI0_A5_N 18 17
OLDI0_A5N 19 18
AD7 OLDI0_A6_P 20 19
OLDI0_A6P AE6 OLDI0_A6_N 21 20
OLDI0_A6N 22 21
AE7 OLDI0_A7_P 23 22
OLDI0_A7P AD8 OLDI0_A7_N 24 23
OLDI0_A7N 25 24
AE3 R219 DNP OLDI0_CLK0_P 26 25
OLDI0_CLK0P AD4 R0201 1% OLDI0_CLK0_N 27 26
OLDI0_CLK0N 28 27
AD5 90R 100mA OLDI0_CLK1_P 29 28
OLDI0_CLK1P AE4 4 3 OLDI0_CLK1_N 30 29
OLDI0_CLK1N 31 30
bga425_0d5_13x13mm AM62x 1 2 32 31
[13] BL_EN_3V3 IN 32
BGA425 33
[13] BL_PW M_3V3 IN 33
L15 0.85x0.65 mm 34
[13] MST_RST_3V3 IN 34
35
[14] TP_INT_1V8 OUT
TP_SDA_1V8 35
36
[12,14] I2C2_SDA BI
TP_SCL_1V8 36
R225 DNP 37
[12,14] I2C2_SCL BI 37
C R0201 1% 38 C
39 38

PAD2
R264 DNP VSYS_5V 40 39
R0201 1% 40
FB21 120R FPC 40pin-0.5mm

41
0.85x0.65 mm 0402 1.3A
4 3 R243 R242 R240 R241 fpc40_0d5_25_4x5_25x2mm
DNP 10K 10K 10K C267 C268
1 2 1% 1% 1% 1% 100nF 10uF
R0402 R0402 R0402 R0402 10V 10V
L20 90R C0201 C0603
100mA

R265 DNP
R0201 1%

CSI

24
U1K 1

24
AC15 CAM_D0_N 2 1
B CSI0_RXP0 AB14 CAM_D0_P 3 2 B
CSI0_RXN0 3
CSI CAM_D1_N
4
4
AE14 5
PwrGrp:VDDA_1P8_CSIRX CSI0_RXP1 AD14 CAM_D1_P 6 5
CSI0_RXN1 7 6
AE13 CAM_CK_N 8 7
CSI0_RXP2 AD13 CAM_CK_P 9 8
CSI0_RXN2 10 9
AC13 CAM_D2_N 11 10
CSI0_RXP3 AB12 CAM_D2_P 12 11
CSI0_RXN3 13 12
AE15 CAM_D3_N 14 13
CSI0_RXCLKP AD15 CAM_D3_P 15 14
CSI0_RXCLKN 16 15
AA12 17 16
CSI0_ATB_0_H [13] CSI0_GPIO1 BI 17
Y15 R135 0R RPi_NC 18
CSI0_ATB_1_H [13] CSI0_GPIO2 BI 18
R0402 5% 19
AA14 R153 499R CSI_SCL 20 19
CSI0_RXRCALIB R0402 0.1% CSI_SDA 21 20
bga425_0d5_13x13mm AM62x 22 21

23
BGA425 VDD_1V8 VDD_3V3 VDD_1V8 VDD_3V3 22
J17

23
FPC 22P 0.5mm
VDD_3V3

R233 1 R169 R232 1 R250

2.2k 10K 2.2k 10K
1% 1% 1% 1% C258 C259
A R0402 R0402 R0402 R0402 10uF 100nF A
2 3 2 3 10V 10V
C0603 C0201
Q9 Q8
BSS138W BSS138W Main
SOT-323-3 SOT-323-3
[16] W KUP_I2C0_SCL
[16] W KUP_I2C0_SDA
BI
BI
https://www.seeedstudio.com
Title:
BeaglePlay
Size: Document Number: Rev:
A3 017_SoC CSI & OLDI v1.0
Draw By: qxn Date: Tuesday, December 27, 2022 Sheet: 17 of 22
5 4 3 2 1
 5 4 3 2 1

BOARD ID EEPROM 4Kbit RTC

VDD_3V3 VDD_3V3

C261 DNP
R162 C264 C0402 50V

2
VDD_3V3 10K 100nF X7
D
VDD_3V3 1% 10V 32.768kHz D
U18
R0402 C0201 3.2 x 1.5 x 0.9mm
U20 8 1
VCC X1

1
I2C0_SCL 1 4 C266 R209 R163 0R 7 2 C265 DNP
[5,13] I2C0_SCL BI
I2C0_SDA SCL VCC [13] RTC_INT BI
I2C0_SCL SQW/INT X2
3 100nF 10K R0402 5% 6 3 C0402 50V
[5,13] I2C0_SDA BI SDA I2C0_SDA SCL Vbackup
10V 1% 5 4
2 C0201 R0402 SDA GND
VSS
BQ32002

2
5 8-SOIC(3.9mm)
EEP_W P [13]

BAT- BAT+
WP BI

2
J10

TPD1E1B04DPY
FT24C32A-ELRT CR1220
Pin to Pin: SOT-23-5 R213 D26 bat-cr1220
DNP
BB AI TDA4VM: 4Kbit, Microchip, 24FC04HT-I/OT. 1%
BeagleBone Black: 32Kbit, Microchip, 24LC32AT-I/OT. R0402

1
1
C C

JTAG Tag-Connect
VDD_1V8 VDD_1V8

U1B
E12 SOC_EMU0
EMU0 SOC_EMU1
MCU GENERAL EMU1
C11 C260
100nF
PwrGrp:VDDSHV_MCU A10 SOC_TCK R154 R155 10V R151 R156 R157
1.8V TCK A11 SOC_TDI 10K 10K C0201 10K 10K 10K
TDI D12 SOC_TDO 1% 1% 1% 1% 1%
TDO B11 SOC_TMS R0402 R0402 R0402 R0402 R0402
TMS B10 SOC_TRST# 1 10 SOC_EMU1
TRSTN SOC_TMS 2 1 10 9 SOC_TRST#
bga425_0d5_13x13mm AM62x 3 2 9 8 SOC_TDI
BGA425 SOC_TCK 4 3 8 7 SOC_EMU0
5 4 7 6 SOC_TDO
5 6
J19 R158
DNP 10K
DNP 1%
R0402
B B

Debug
VDD_3V3
Layout Note:
D61
1 2 Add Silkscreen:
VDD_3V3
RB520S30T1G Pin1: GND
C55 100nF R70 Pin2: RXD
C0201 10V SOD-523 10K Pin3: TXD
J6
U10 200mA 1%
8 1 30V R0402 1
7 VCC 1OE 2 DEBUG_RXD 2
6 2OE 1A 3 DEBUG_TXD 3
[13] UART0_RXD OUT 1Y 2Y
5 4
[13] UART0_TXD IN 2A GND
2

2
TPD1E1B04DPY

TPD1E1B04DPY

SN74LVC2G241DCUR Header 1x3 2.54mm

A A
8-VFSOP D8 D10 header3p_2d54_dip

Main
1

https://www.seeedstudio.com
Title:
BeaglePlay
Size: Document Number: Rev:
A3 018_RTC & ID & DEBUG v1.0
Draw By: qxn Date: Tuesday, December 27, 2022 Sheet: 18 of 22
5 4 3 2 1
 5 4 3 2 1

CC1352P RF
MCU_3V3

R117 J12
100K B1 U.FL-R-SMT-1(10)
1% MCU_3V3 B1 U-FL3P-SMD-2_6X2_6X1_0MM
D R0402 9 1 C45 12pF 1 D
U9A 8 RF P(2.4GHz) ANT(2.4GHz) C0201 25V
CC1352_RESET_N CC1352_TMS 24 13 RF N(2.4GHz) 3 2
JTAG_TMSC VDDS2

2
CC1352_TCK 25 22
VDDRF 35 JTAG_TCKC VDDS3 44 7 4 D27
VDDRF
RESET_N VDDS 34 6 RF P(Sub-GHz) ANT(Sub-GHz) TPD1E0B04DPY
L3 6.8uH 33 VDDS_DCDC 45 RF N(Sub-GHz) X1SON(2)
110mA DCDC_SW VDDR 48 2 3.6V
C20 C24 MLZ2012N6R8LT000 VDDR_RF GND 3
100nF 22uF RX/TX 5 GND 10

1
0805 RX TX GND
10V 10V 8 1
C0201 C0603 9 X32K_Q1 2_4_GHZ_RF_P 2 C18 BF10_0d5_2x1d25x1mm
X32K_Q2 2_4_GHZ_RF_N 0900PC15A0036E
3 100pF
SUB-1_GHZ_RF_P 6P-L2.0*W 1.25*H0.95mm
4 50V
SUB-1_GHZ_RF_N 5 C0201
TX_20DBM_P 6
TX_20DBM_N 7 RX/TX
RX_TX
23 46 C19
49 DCOUPL X48M_N 47 100pF
EGP X48M_P 50V
CC1352P7 R118 DNP C0201
QFN-48 R0402 1% DNP
MCU_3V3
U15
R119 J9
X3 0R 9 U.FL-R-SMT-1(10)
1 2 5% 8 EGP U-FL3P-SMD-2_6X2_6X1_0MM
X4 RF3
C32 R0402 5 1 C21 100pF 1
32.768kHz 1uF 1 2 L5 C22 C23 4 RF2 RFC C0201 50V
C 10V 12nH 100pF 10nF RF1 3 2 C
3.2 x 1.5 x 0.9mm
C33 C34 C0402 180mA 50V 6.3V DIO30_RF_SUB1G 7
V3

2
24pF 24pF 0201 C0201 C0201 6
50V 50V 4 3 DIO29_RF_PA 3 V2 2 D28
C0402 C0402 C25 V1 NC TPD1E0B04DPY
C35 C36 100pF X1SON(2)
7.5pF 48MHz 7.5pF L6 1nH C26 2.4pF C27 0.8pF 50V SKY13317-373LF 3.6V
50V 2.0 x 1.6mm 50V 0201 1.1A C0201 25V C0201 50V C0201 SON8
C0402 C0402 L8 4.7nH

1
L7 Path V1 V2 V3
27nH 0201 350mA RF1 1 0 0
120mA RF2 0 0 1
0201 L9 3.9nH C28 C29
VDD_3V3 MCU_3V3 VDDRF 3pF 4.7pF
L10 1nH L11 12nH 0201 500mA 50V 50V
0201 1.1A 0201 180mA C0201 C0201
FB5 120R
1.3A C30 C31 L12
BLM18PG121SN1D 2.4pF 3.9pF 2.5nH
0402 25V 50V 600mA
C96 C37 C38 C39 C40 C41 C42 C43 C0201 C0201 0201
22uF 22uF 100nF 100nF 100nF 100nF 100nF 100nF
10V 10V 10V 10V 10V 10V 10V 10V
C0603 C0603 C0201 C0201 C0201 C0201 C0201 C0201

20 dBm BOM:
Layout Note:
FCC: 890-930 MHz, L52 = 27nH
B Layout Note: ETSI: 863-889 MHz, L52 = 18nH B
Place C37 and C38 close to pin 34.
Place C39, C40, C41 close to pin 13, pin 22, pin44. Place these capacitors close to pin45, pin48.

CC1352P GPIO RESET CC1352P JTAG Tag-Connect

U9B MCU_3V3
10 28
11 DIO_5 DIO_18 29
12 DIO_6 DIO_19 30 1 10 CC1352_RESET_N
14 DIO_7 DIO_20 31 2 1 CC1352_RESET_N CC1352_TMS 2 1 10 9
DIO_8 DIO_21 [13] CC1352_RSTn IN 2 9 CC1352_TDI
TP14 15 32 D3 3 8
TP12 16 DIO_9 DIO_22 36 CC1352_TCK 4 3 8 7
17 DIO_10 DIO_23 37 2 1 5 4 7 6 CC1352_TDO
DIO_11 DIO_24 OUT CC1352_LED1 [21] [9,10,11,12,16] PORz_OUT IN 5 6
R120 0R 5% 18 38 D11
[13] UART6_TXD IN DIO_12 DIO_25 OUT CC1352_LED2 [21]
R121 0R 5% 19 39 J11
[13] UART6_RXD OUT DIO_13 DIO_26
20 40 2 1 DNP
DIO_14 DIO_27 [5,9,10,11,12,16] RESETSTATz IN
21 41 D12 SOD-523 DNP
[13] CC1352_BOOT IN
CC1352_TDO DIO_15 DIO_28 DIO29_RF_PA
A
26 42 RB520S30T1G 200mA A
CC1352_TDI 27 DIO_16 DIO_29 43 DIO30_RF_SUB1G 30V
DIO_17 DIO_30
CC1352P7 Main
QFN-48
https://www.seeedstudio.com
Title:
BeaglePlay
Size: Document Number: Rev:
A3 019_CC1352P v1.0
Draw By: qxn Date: Tuesday, December 27, 2022 Sheet: 19 of 22
5 4 3 2 1
 5 4 3 2 1

J3
WL1807: follow the reference layout to avoid intentional radiator certification U.FL-R-SMT-1(10)
U-FL3P-SMD-2_6X2_6X1_0MM

WiFi 2.4G/5G
C256 100pF 1
C0402 50V

2
3 2
D73
TPD1E0B04DPY
X1SON(2)
3.6V
J5
U.FL-R-SMT-1(10)

1
D D
U-FL3P-SMD-2_6X2_6X1_0MM
C257 100pF 1
C0402 50V

2
3 2
D74
TPD1E0B04DPY
X1SON(2)
3.6V

1
VDD_1V8 VDD_3V3
U5A

FB1 120R 47 18
1.3A 0402 46 VBAT_IN_1 RF_ANT2 32
VBAT_IN RF_ANT1 VDD_1V8
FB2 120R 38
1.3A 0402 VIO_IN
50 27 W LAN_RS232_TX TP9
C86 C85 C83 C84 51 BT_HCI_RTS_1V8 GPIO1 26 W LAN_RS232_RX TP10
2.2uF 100nF 10uF 100nF 52 BT_HCI_CTS_1V8 GPIO2 25
10V 10V 10V 10V 53 BT_HCI_TX_1V8 GPIO4 3
C0402 C0201 C0603 C0201 BT_HCI_RX_1V8 GPIO9 4 R23 R24 R25 R26 R27
56 GPIO10 2 TP6 10K 10K 10K 10K 10K
BT_AUD_OUT 57 BT_AUD_IN GPIO11 5 1% 1% 1% 1% 1%
58 BT_AUD_OUT GPIO12 R0402 R0402 R0402 R0402 R0402
60 BT_AUD_FSYNC 40
BT_AUD_CLK WLAN_EN IN W L_EN [14,21]
14
BT_UART_DBG WL_IRQ_1V8 OUT W L_IRQ [14]
C TP4 43 C
TP5 W L_UART_DBG 42 BT_UART_DBG 6
WL_UART_DBG WL_SDIO_CMD_1V8 BI W L_CMD [9]
BT_EN 41 8
BT_EN WL_SDIO_CLK IN W L_CLK [9]
R30 0R 36 10
[16] W KUP_CLKOUT0 IN EXT_32K WL_SDIO_D0_1V8 BI W L_D0 [9]
R0402 5% 62 11
RESERVED3 WL_SDIO_D1_1V8 BI W L_D1 [9]
TP7 22 12
RESERVED2 WL_SDIO_D2_1V8 BI W L_D2 [9]
R31 DNP 21 13
RESERVED1 WL_SDIO_D3_1V8 BI W L_D3 [9]
R0201 5%
Place close to each
other to avoid stub. W L1807MODGIMOC
100P-13.3*13.4*2mm R22
DNP
1%
VDD_1V8 R0402
OSC1
4 3
VDD CLK
1 2
C87 EN GND
DNP DNP
10V 2.5 x 2.0 x 1.0mm
C0201

U5B
B VDD_1V8 B
1 G4
7 GND GND_32 G5
9 GND_1 GND_33 G6 BT_UART_DBG R19 10K
15 GND_2 GND_34 G7 R0402 1%
16 GND_3 GND_35 G8 W L_EN R29 10K
17 GND_4 GND_36 G9 R0402 1%
19 GND_5 GND_37 G10 BT_EN R28 10K
20 GND_6 GND_38 G11 R0402 1%
23 GND_7 GND_39 G12 BT_AUD_OUT R17 10K
24 GND_8 GND_40 G13 R0402 1%
28 GND_9 GND_41 G14 W L_IRQ R18 10K
29 GND_10 GND_42 G15 R0402 1%
30 GND_11 GND_43 G16 R218 DNP
31 GND_12 GND_44 G17 R0402 1%
33 GND_13 GND_45 G18
34 GND_14 GND_46 G19
35 GND_15 GND_47 G20
37 GND_16 GND_48 G21
39 GND_17 GND_49 G22
44 GND_18 GND_50 G23
45 GND_19 GND_51 G24
48 GND_20 GND_52 G25
49 GND_21 GND_53 G26
54 GND_22 GND_54 G27
55 GND_23 GND_55 G28
59 GND_24 GND_56 G29
61 GND_25 GND_57 G30
63 GND_26 GND_58 G31
A GND_27 GND_59 A
64 G32
G1 GND_28 GND_60 G33
G2 GND_29 GND_61 G34
GND_30 GND_62 Main
G3 G35
GND_31 GND_63 G36
GND_64 https://www.seeedstudio.com
W L1807MODGIMOC Title:
100P-13.3*13.4*2mm BeaglePlay
E-13_4X13_3-N100_0_75-TOP
Size: Document Number: Rev:
A3 020_W iFi W L1807MOD v1.0
Draw By: qxn Date: Tuesday, December 27, 2022 Sheet: 20 of 22
5 4 3 2 1
 5 4 3 2 1

Reset Button User Button Power Button

Layout Noete:
Place TP17 and TP28 close to each othter, keep 2.54mm spacing.

SW 2 SW 3 TP17
SW 1
D 1 2 1 2 D
OUT MCU_PORz [5,16] OUT USER_BTN [14]
S2 S2 1 2 BI PW R_BTN [5]
S1 S3 S1 S3 TP28 S2
Shield Shield S1 S3
TS23M-BN-PT-PF TS23M-BN-PT-PF Shield
L4.7*W 3.5*H1.85mm-90D L4.7*W 3.5*H1.85mm-90D TS23M-BN-PT-PF
L4.7*W 3.5*H1.85mm-90D
button2_3p_4d55x2d3x1d88mm button2_3p_4d55x2d3x1d88mm
button2_3p_4d55x2d3x1d88mm

C
LEDs C

[19] CC1352_LED2 IN

[19] CC1352_LED1 IN

[13] LED_USR4 IN

[13] LED_USR3 IN

VDD_3V3
[13] LED_USR2 IN

[13] LED_USR1 IN

[13] LED_USR0 IN

R201 R202 R203 R204 R205 R206 R236 R237 R238

2.2k 2.2k 2.2k 2.2k 2.2k 2.2k 2.2k 2.2k 2.2k
1% 1% 1% 1% 1% 1% 1% 1% 1%
R0402 R0402 R0402 R0402 R0402 R0402 R0402 R0402 R0402
B B
1

1
LED8 LED9 LED10
LED3 LED4 LED5 LED6 LED7 Yellow Yellow Yellow LED11
Green Green Green Green Green 0402 0402 0402 Red
0402 0402 0402 0402 0402
Yellow Yellow Yellow 0402
Green Green Green Green Green
20mA 20mA 20mA Red
20mA 20mA 20mA 20mA 20mA
2

2
20mA

3
Q10
DMG1012T-7
R239 2.2k 1 SOT523
[14,20] W L_EN IN
R0402 1%
2

A A

Main

https://www.seeedstudio.com
Title:
BeaglePlay
Size: Document Number: Rev:
A3 021_BUTTONs & LEDs v1.0
Draw By: qxn Date: Tuesday, December 27, 2022 Sheet: 21 of 22
5 4 3 2 1
 5 4 3 2 1

Grove Connector QWIIC Connector

VDD_3V3 VDD_1V8 VDD_3V3 VDD_1V8

VDD_3V3 R255 R186 R254 R226

1 1
10K 2.2k 10K 2.2k
J7 1% 1% 1% 1%

TP29
TP30
D D
R0402 R0402 R0402 R0402
1 FB27 120R AIN2 VDD_3V3 3 2 3 2
BI I2C1_SCL [13]
5 2 FB26 120R BI I2C1_SDA [13] 4P-1.0mm Q6 Q7
6 3 FB25 120R
BSS138W BSS138W

2
4 FB3 120R

TPD1E1B04DPY

TPD1E1B04DPY
0402 1.3A 4 FB28 120R QW IIC_SCL SOT-323-3 SOT-323-3
QW IIC_SDA
BI MCU_I2C0_SCL [16]
C253 D19 D20 6 3 FB33 120R BI MCU_I2C0_SDA [16]
4P-2.0mm-90D 100nF 5 2 FB34 120R

2
JST4p_smd_2_0_90d 10V 1 FB35 120R

TPD1E1B04DPY

TPD1E1B04DPY
C0201 0402 1.3A
C255 D29 D30

1
J18 100nF
10V
C0201

1
MikroBus
C C
VDD_3V3

R125 10K
R0402 1%
R208 10K
J21
R0402 1%
AIN1 9 8
[13] GPIO1_10 BI AN PWM BI GPIO1_11 [13]
10 7
[13] GPIO1_12 BI RST INT BI GPIO1_9 [13]
11 6
[13] SPI2_CS0 BI CS RX OUT UART5_RXD [13]
12 5
[13] SPI2_CLK BI SCK TX IN UART5_TXD [13]
13 4
[13] SPI2_D0 BI MISO SCL BI I2C3_SCL [13]
14 3
[13] SPI2_D1 BI
MB_3V3 MOSI SDA BI I2C3_SDA [13]
VDD_3V3 1 2 15 2 2 1 VSYS_5V
+3.3V +5V
2

2
D21 16 1 D22
TPD1E1B04DPY

TPD1E1B04DPY
B130L-13-F 1A GND2 GND1 B130L-13-F 1A
D41 D42 D43 D44 D45 D31 SMA 30V SMA 30V D36 D37 D38 D39 D40 D52
MikroBus Female
mikroBUS16_2d54_25_4x22_88x8_5mm
1

1
B B

ADC VDD_3V3 VDD_3V3A

FB17 120R
0402 1.3A
C56 C232 C233
100nF 10nF 1uF
10V 6.3V 10V
C0201 C0201 C0402 BI MCU_SPI1_CLK [16]
BI MCU_SPI1_D0 [16]
BI MCU_SPI1_D1 [16]
U11

1 8
[16] MCU_SPI1_CS1 BI CS SCLK
2 7
3 VA DOUT 6
AIN2 R67 1K 4 GND DIN 5 R68 1K AIN1
A IN2 IN1 A
R0402 1% R0402 1%

C234 ADC102S051 C235 Main

100pF VSSOP-8 100pF
50V 50V
C0402 C0402 https://www.seeedstudio.com
Title:
BeaglePlay
Size: Document Number: Rev:
A3 022_GROVE &QW IIC &MikroBus &ADC v1.0
Draw By: qxn Date: Tuesday, December 27, 2022 Sheet: 22 of 22
5 4 3 2 1