CONFIDENTIAL

LED MONITOR
SERVICE MANUAL
CHASSIS : LM61C

MODEL : 27GL850 27GL850-BB

CAUTION
BEFORE SERVICING THE CHASSIS, READ THE SAFETY PRECAUTIONS IN THIS MANUAL.

P/NO : MFL70211519 (1906-REV00)

Any reproduction, duplication, distribution (including by way of email, facsimile or other electronic means),
publication, modification, copying or transmission of this Service Manual is STRICTLY PROHIBITED unless you
have obtained the prior written consent of the LG Electronics entity from which you received this Service Manual.
The material covered by this prohibition includes, without limitation, any text, graphics or logos in this Service
Manual.

Copyright © 2019 LG Electronics Inc. All rights reserved. Only training and service purposes.
 CONTENTS

CONTENTS ............................................................................................... 2

SAFETY PRECAUTIONS ......................................................................... 3

SPECIFICATION........................................................................................ 4

ADJUSTMENT INSTRUCTION................................................................. 6

BLOCK DIAGRAM .................................................................................... 7

EXPLODED VIEW ..................................................................................... 8

DISASSEMBLY ......................................................................................... 9

TROUBLE SHOOTING GUIDE ............................................................... 11

-2- Copyright © LG Electronics Inc. All rights reserved.

Only training and service purposes.
 SAFETY PRECAUTIONS

IMPORTANT SAFETY NOTICE

Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the
Exploded View.
It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent
Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.

General Guidance Leakage Current Hot Check (See below Figure)

An isolation Transformer should always be used during the
servicing of a receiver whose chassis is not isolated from the AC
power line. Use a transformer of adequate power rating as this
protects the technician from accidents resulting in personal injury
from electrical shocks.
It will also protect the receiver and it's components from being
damaged by accidental shorts of the circuitry that may be
inadvertently introduced during the service operation.
If any fuse (or Fusible Resistor) in this TV receiver is blown,
replace it with the specified.
When replacing a high wattage resistor (Oxide Metal Film Resistor,
over 1 W), keep the resistor 10 mm away from PCB.
Keep wires away from high voltage or high temperature parts.
Before returning the receiver to the customer,
Plug the AC cord directly into the AC outlet.
Do not use a line Isolation Transformer during this check.
Connect 1.5 K / 10 watt resistor in parallel with a 0.15 uF capacitor
between a known good earth ground (Water Pipe, Conduit, etc.)
and the exposed metallic parts.
Measure the AC voltage across the resistor using AC voltmeter
with 1000 ohms/volt or more sensitivity.
Reverse plug the AC cord into the AC outlet and repeat AC voltage
measurements for each exposed metallic part. Any voltage
measured must not exceed 0.75 volt RMS which is corresponds to
0.5 mA.
In case any measurement is out of the limits specified, there is
possibility of shock hazard and the set must be checked and
repaired before it is returned to the customer.
Leakage Current Hot Check circuit
AC Volt-meter

always perform an AC leakage current check on the exposed

metallic parts of the cabinet, such as antennas, terminals, etc., to
be sure the set is safe to operate without damage of electrical Good Earth Ground
such as WATER PIPE,
shock.
To Instrument's CONDUIT etc.
exposed
Leakage Current Cold Check(Antenna Cold Check)
METALLIC PARTS
With the instrument AC plug removed from AC source, connect an
electrical jumper across the two AC plug prongs. Place the AC
switch in the on position, connect one lead of ohm-meter to the AC
plug prongs tied together and touch other ohm-meter lead in turn to
each exposed metallic parts such as antenna terminals, phone
jacks, etc.
If the exposed metallic part has a return path to the chassis, the
measured resistance should be between 1 MΩ and 5.2 MΩ.
When the exposed metal has no return path to the chassis the
reading must be infinite.
An other abnormality exists that must be corrected before the
receiver is returned to the customer.

-3- Copyright © LG Electronics Inc. All rights reserved.

Only training and service purposes.
 SPECIFICATION

No Item Content Remark

1 Customer BRAND
2 User Model Name 27GL850
3 Sale region Worldwide
27” LCD
4 Feature
MONITOR(gaming)
5 Chassis Name
General External SW
5-way joystick switch
Scope & Adj.
6 G
Game Mode,
M d Ratio,
R ti S.E.S,
SES
Function On Screen Control,
Gamma calibration
Length : 1.55±0.05 M /
Power cord can
Shape : Wall-out / Color
be changed
7 Power Cord : Black
According to
Weight : 0.16kg ± 10%
region.
Length : 1.5m±0.05m
Shape : Detachable Type
HDMI EAD63954401
/ Color : Black
None
8 Cable Length : 1.5m±0.05m
Shape : Detachable Type
DisplayPor / Color : Black / Weight :
EAD63749401
t 0.095kg± 10%
CABLE : 100Ω±5Ω
CONNECTOR : 100 Ω ±
Input: AC90~264V
47~63Hz
Output: DC 19V 3.42A, P/N :
9 Power
65W Adapter
Ad t EAY62990913
Color: Black, Weight:
0.6kg±5%
SET accessory /
10 Factory calibration report 0.002kg
Refer to BOM
KR Suffix :
P/No Specification LM270WQA-
11 Applying module list SSA1-8B9
EAJ6538 LM270WQA P/N :
7901 -SSA1 EAJ65488701

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Only training and service purposes.
2. Signal Timing (Resolution)
2.1. Signal (Video & Sync)

2.2. H/V Timing

DOT Frequency Total Front
Display Sync. Back Resolution
mode section polarity CLOCK [kHz]/[Hz Period Porch
(A) © Porch(B) (HDMI / DP)
[MHz] ] (E) (D)
H(Pixels) + 31.469 800 640 16 96 48
1 48.75 640 x 480 (HDMI/DP)
V(Lines) - 59.94 525 480 10 2 33
H(Pixels) - 37.5 840 640 16 64 120
2 31.5 640 x 480 (HDMI/DP)
V(Lines) - 75 500 480 1 3 16
H(Pixels) + 46.875 1056 800 16 80 160
3 49.5 800 x 600 (HDMI/DP)
V(Lines) + 75 625 600 1 3 21
H(Pixels)
H(Pi xels) + 37.879 1056 800 40 128 88
4 40 800 x 600 (HDMI/DP)
V(Lines) + 60.317 628 600 1 4 23
H(Pixels) - 48.363 1344 1024 24 136 160
5 65 1024 x 768 (HDMI/DP)
V(Lines) - 60 806 768 3 6 29
H(Pixels) + 60.023 1312 1024 16 96 176
6 78.75 1024 x 768 (HDMI/DP)
V(Lines) + 75.029 800 768 1 3 28
H(Pixels) + 54.347 1472 1152 32 96 192
7 79.99 1152 x 864 (HDMI/DP)
V(Lines) + 60.05 905 864 1 3 37
H(Pixels) - 49.702 1680 1280 72 128 200
8 83.5 1280 x 800 (HDMI/DP)
V(Lines) + 59.81 831 800 3 6 22
H(Pixels) + 63.194 1440 1280 48 32 80
9 91 1280 x1024 (HDMI/DP)
V(Lines) - 59.96 1054 1024 3 7 20
H(Pixels) + 79.976 1688 1280 16 144 248
10 135 1280 x 1024 (HDMI/DP)
V(Lines) + 75.025 1066 1024 1 3 38
H(Pixels) + 45 1650 1280 110 40 220
11 74.25 1280 x 720 (HDMI/DP)
V(Li
V (Lines) + 60 750
75 0 720
7 20 5 5 20
H(Pixels) + 60 1800 1600 24 80 96
12 108 1600 x 900 (HDMI/DP)
V(Lines) + 60 1000 900 1 3 96
H(Pixels) + 64.674 1840 1680 48 32 80
13 119 1680 x 1050 (HDMI/DP)
V(Lines) - 59.883 1080 1050 3 6 21
H(Pixels) + 67.5 2200 1920 88 44 148
14 148.5 1920 x 1080 (HDMI/DP)
V(Lines) + 60 1125 1080 4 5 36
H(Pixels) + 84.36 2200 1920 88 44 148
15 185.6 1920 x 1080 (HDMI/DP)
V(Lines) + 74.99 1125 1080 4 5 36
H(Pixels) + 88.79
88 .79 2720 2560 48 32 80
16 241 5
241.5 2560 x1440
1440 (HDMI/DP)
V(Lines) - 59.95 1481 1440 3 5 33
H(Pixels) + 111.86 2800 2560 48 32 160 2560 x 1440 (HDMI)
17 304.25
*HDMI : Only support with Adaptive sync On
V(Lines) - 74.97 1500 1440 3 5 52
H(Pixels) + 150.92 2720 2560 48 32 80 2560 x 1440 (HDMI/DP)
18 410.5
*HDMI preferred timing
V(Lines) - 99.95 1510 1440 3 5 62
H(Pixels) + 183 2720 2560 48 32 80 2560 x 1440 (HDMI/DP)
19 497.75
*HDMI : Only support with Adaptive sync Off
V(Lines) - 120 1525 1440 3 5 77
2560 x 1440 (HDMI/DP)
H(Pixels) + 222.19 2640 2560 8 32 40
20 586.58 *DP : Preferred timing
*HDMI : Only support with Adaptive sync Off
V(Lines) - 144 1543 1440 3 10 90

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Only training and service purposes.
BLOCK DIAGRAM

-6- Copyright © LG Electronics Inc. All rights reserved.

Only training and service purposes.
 EXPLODED VIEW
IMPORTANT SAFETY NOTICE
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts
are identified by in the EXPLODED VIEW.
It is essential that these special safety parts should be replaced with the same components as recommended
in this manual to prevent Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.

920
900

910
400

330
510
500

540
200
300

930

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Only training and service purposes.
 DISASSEMBLY
1. Preparation 3. Back cover Assembly
1.1. Preparation tool (jig) 4) Disassemble 4ea screw.

2. Stand Assembly Separation 5&6) Use hand disassemble bottom side of cabinet
then disassemble the back cover
1) Place the monitor’s screen face down on a soft plane.

2) Release the screw and disassemble the base

3) Release the screw and disassemble the base

-8- Copyright © LG Electronics Inc. All rights reserved.

Only training and service purposes.
7) Remove screws and detach the latches and lines.

8）Disassemble the cabinet.

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Only training and service purposes.
 TROUBLE SHOOTING GUIDE
1. No Power
N Check Power connector Y
Check C701 Replace Adapter
Voltage Level (19V) OK?

Check IC701, 702 Output N Replace IC701, 702 &

Voltage Level (5V) Recheck

N Replace IC703 &

Check IC703 Output
Voltage Level (3.3V) Recheck

Check IC705 Output N Replace IC705 &

Voltage Level (2.5V, 1.2V) Recheck

Check X100 Clock N

Replace X100
27MHz

Replace IC107 Flash

Memory

Copyright © LG Electronics. Inc. All rights reserved. - 10 - LGE Internal Use Only
Only for training and service purposes
 2. No Screen on
N N
Check WLED_ENABLE High? Check P201 (PIN No.69)
Module Back Light On? Replace G-SYNC Module
(IC601,IC602 27pin)

Y
Y

N
Check LED Driver Output Check IC601, IC602
(P601, P602 - 1, 2, 5, 6) Replace LED Driver IC

N
Check Panel Power 10V (L700) Replace IC700 &
Check IC700 Output 10V Recheck

Check Panel eDP AUX Check IC300, IC303 N

N
Repair Main B/D Replace G-SYNC Module
P300 (#9, 10, 36, 37)

Check FFC Cable for Damage or N

Replace FFCable
Open Conductors

Replace T-Con Board or Module

Copyright © LG Electronics. Inc. All rights reserved. - 11 - LGE Internal Use Only
Only for training and service purposes
 3. No Video – HDMI
Check input signal format
Is it supported?

Check HDMI Cable for Damage or

Open Connector

Check JK102 for proper N

Replace the Connector
connection or Damage

Check I2C Signal N

Replace the IC100
(EDID)

Check IC102 AUX Signal N

Replace the IC102
(#J1,H1)

Check IC103 AUX Signal N

Replace the IC103
(#3,4)

Replace the G-SYNC Module

Copyright © LG Electronics. Inc. All rights reserved. - 12 - LGE Internal Use Only
Only for training and service purposes
 4. No Video – DP
Check input signal format
Is it supported?

Check DP Cable for Damage or

Open Connector

Check JK101 for proper N

Replace the Connector
connection or Damage

Check IC101 AUX Signal N

Replace the IC101
(#29,30)

Check IC103 AUX Signal N

Replace the IC103
(#3,4)

Replace the G-SYNC Module

Copyright © LG Electronics. Inc. All rights reserved. - 13 - LGE Internal Use Only
Only for training and service purposes
 LG ELECTRONICS INC. / MONITOR DIVISION
Establish : 2019/03/29
LM61C ADJUSTMENT SPECIFICATION 1/11
Revision : 1

LM61C
Adjust Specification

27GL850

Home Entertainment Company

Monitor/PC BD / Monitor Dev. Lab.
LG ELECTRONICS INC.

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 LG ELECTRONICS INC. / MONITOR DIVISION
Establish : 2019/03/29
LM61C ADJUSTMENT SPECIFICATION 2/11
Revision : 1

Revision History

No. Date Revised by Cause & List Remark

1 2019‐03‐29 BJ kang Established

2 2019-04-03 BJ kang

3 2019‐05‐07 Lijiwei Add module selection

4 2019‐05‐07 Lijiwei Change cool color y value

5 2019‐05‐07 BJ kang Change luminance value

6 2019‐05‐08 BJ kang Change white balance ‐> gammma adjust

Note) Refer to ECO about detail of revision history.

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 LG ELECTRONICS INC. / MONITOR DIVISION
Establish : 2019/03/29
LM61C ADJUSTMENT SPECIFICATION 3/11
Revision : 1
CONTENTS

1. Application

2. Designation

3. Main PCB check process

4. Total Assembly line process

5. Shipping condition

6. Signal composition for adjustment

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 LG ELECTRONICS INC. / MONITOR DIVISION
Establish : 2019/03/29
LM61C ADJUSTMENT SPECIFICATION 4/11
Revision : 1
1. Application
1.1 This document is applied to LM61C chassis 27GL850 LCD Monitor which is manufactured in Monitor Factory or is produced on
the basis of this data.
1.2 Manufacturing Type: SET
1.3 Panel name : LM270WQA‐SSA1

2. Designation
2.1 The adjustment is according to the order which is designated and which must be followed, according to the plan which can
be changed only on agreeing.
2.2. Power Adjustment: Free Voltage
2.3. Magnetic Field Condition: Nil.
2.4. Input signal Unit: Product Specification Standard
2.5. Reserve after operation: Above 5 Minutes (Heat Run)

Temperature : at 25℃±5°C / Relative humidity: 65 ±10% / Input voltage: 100 ~ 240V, 50/60Hz

2.6. Adjustment equipments: Color Analyzer (CA‐210 or CA‐110, UA‐10), DDC Adjustment Jig equipment,

3. Main PCB check process

* APC ‐ After Manual‐Insult, executing APC

3.1 ADC Process

‐ GL850 doesn’t need ADC process because it has only digital input like DisplayPort, HDMI.

3.2 Main PCB Function test

‐ Check display/audio according to interface

3.3‐1 Write HDCP 1.4 Key

‐. HDCP 1.4 KEY
a. HDCP 1.4 KEY is included in Scaler. Don’t need write HDCP 1.4 key

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LM61C ADJUSTMENT SPECIFICATION 5/11
Revision : 1

4. Total Assembly line process

4.1 EDID Serial Number Write
‐ This model DON’T need to write full edid data for update the Serial number.
Just write the S/N data by using adjustment command.

Send 24 byte
Send Serial data
( EDID SN(4byte) + date (2byte) + Ascii SN(18byte) )

Read C/s of Serial data Read checksum data of 24 byte

4.2 Verify HDCP Key

Check OSD with aging on mode or using Master Signal generator with HDCP On and connect to monitor with HDMI

4.3 Set Automatic Standby time

a. Set Automatic Standby time by adjustment jig equipment: Europe : 4H, Others: OFF
Command set : F7 00 01 ( for Europe – set 4h)
F7 00 00 (for others – set 0ff)
b. Check the Automatic Standby time setting value by adjustment jig equipment.
Please check the value of 0xA6 0xEE address
Value : 0x00 ‐ OFF
0x04 ‐ Set 4H

4.4 Gamma adjustment

Adjust PRESET Warm(6500K) Color coordinates.
„ Set the CA-210 for calibration.
„ Set the internal White Pattern by commanding WHITEBALANCE_START Command code.
„ Set as Warm(6500K) by commanding COLOR_MODE_CHANGE Command code.
„ Gamma 2.2 calibration and verify.
Warm(6500K) color adjustment
Adjust to meet x/y color coordinate as below.
2~4 min 4~8min 8~10min 10~25min 25~40min 40min~
x 0.315 0.315 0.315 0.314 0.314 0.313
y 0.331 0.331 0.331 0.330 0.330 0.329
Save Warm(6500K) Color by commanding COLOR SAVE Command code. (tolerance ±0.010)

Insert HDMI Jack which is connected with PC for White Balance or equivalent device.
Î Total Assembly line should check whether the color coordinate(x,y) data refer to below table were meet or not.

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 LG ELECTRONICS INC. / MONITOR DIVISION
Establish : 2019/03/29
LM61C ADJUSTMENT SPECIFICATION 6/11
Revision : 1
X=0.283 (±0.015)
Cool 9,300k °K
Y=0.297 (±0.015)
<Test Signal>
Color X=0.299 (±0.015)
Medium 7,500k °K Inner pattern
Temperature Y=0.315 (±0.015)
(255gray,100IRE)
X=0.313 (±0.015)
Warm 6,500k °K
Y=0.329 (±0.015)
Cool Min : 200 <Test Signal>
Luminance
Medium Min : 220 Inner pattern
(cd/㎡)
Warm Min : 280 (255gray,100IRE)
*Note : x,y coordinates are drifted about 0.007 after 30 mins heat-run. So checking color coordinate within 5-min at total
assembly line, consider x,y coordinates might be up to 0.007 than x,y target of each color temperature. ..

*Note : Manual W/B process

1) Power off => Power on( ‘Å’ 3 times, ‘Æ’ 1 time and push ‘◎’)
2) and push the “Å” or “Æ”.
3) In Service Menu.

※ When doing Adjustment, Please make circumstance as below.

4.3 DPM Operation check

■ Measurement Condition: 100~240V@ 50/60Hz
1) Set Input to DisplayPort, HDMI1, HDMI2
2) Turn off the source device.
3) Check DPM operation refer to the below table.

Sync (H/V) EUT

Operating Condition LED(SET) Wattage(W)
or Video (MSPG6100)
Sleep mode Off/Off Off Off 0.5W

Off mode ‐ ‐ Off 0.3W DC Switch Off

5. Shipping condition
Æ Make sure to do FACTORY RESET at the final process.

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 LG ELECTRONICS INC. / MONITOR DIVISION
Establish : 2019/03/29
LM61C ADJUSTMENT SPECIFICATION 7/11
Revision : 1
No. Item Content& Outgoing Condition 비고
Full accessory list is
Refer to BOM / And General
Accessory included in general
specification(3page)
specification
Game
Gamer 1
Mode
1ms Motion Blur
Off
Reduction
Adaptive‐Sync On
Game
Black Stabilizer 50
Adjust
Response Time Fast
Cross Hair Off
Game Reset No
Brightness 100
Contrast 70
Sharpness 50
Gamma Mode 2
Color Temp Custom
Picture
R/G/B 50/50/50
Adjust
Depending on input signal
Black Level High (RGB format)
Outgoing Low (YUV format)
2
Condition DFC Off
Picture Reset No
Input List HDMI1
Input
Aspect Ratio Full Wide
Language Depend on the sale region
SMART ENERGY
Low
SAVING
Power LED Off
Automatic Standby Off(EU/EK/PD/EW/MA,4H)
HDMI Compatibility
Off
General Mode
DisplayPort 1.4 Enable Depend on signal
OSD Lock Off
Serial Number,
Information Total Power On Time
Resolution
Reset No

6. Signal composition for adjustment

6.1 I2C (100K BPS)

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 LG ELECTRONICS INC. / MONITOR DIVISION
Establish : 2019/03/29
LM61C ADJUSTMENT SPECIFICATION 8/11
Revision : 1
6.2 COMMUNICATION START

START 6E A STOP 50Ms

#Until ACK BIT goes LOW, Repeat it.

6.3 Command form.
Command form use DDC2AB standard communication protocol.

START 6E A 50 A LEN A 03 A CMD A 00 A VAL A CS A STOP

a. LEN : DATA BYTE number to send.

b. CMD : Command language that monitor executes.
c. VAL : FOS DATA
d. CS : Dada’s CHECHSUM that transmit
e. DELAY : 50MS
f. A : Acknowledge

6.4 Screen adjust command (LENGTH = 84)

No. Adjustment contents CMD(hex) ADR VAL(hex) Explanation

1 EEPROM ALL INITIAL E4 00 00 adjustment Initialization
2 EEPROM READ E7 Slave At EEPROM Read
add
3 EEPROM WRITE E8 Slave Data Write data at EEPROM
add
4 R GAIN 16 00 00‐64
5 G GAIN 18 00 00‐64 Tune Gain
6 B GAIN 1A 00 00‐64
7 BRIGHT(Backlight) 10 00 00‐64 Tune Analog Bright
8 FACTORY RESET F0 00 00 Factory reset
9 AUTO COLOR Tuning
AUTO_COLOR_ADJUST F1 00 0
0:Auto color

01 6500K
10 COLOR_MODE_CHANGE F2 00
02 9300K

Aging off &Clear elapsed

11 Elapsed time Clear E9 00 00
time
Start White Balance
12 WHITEBALANCE_START ED 00 adjustment (Display
Internal Pattern)
13 Aging On/Off F3 00 FF/00 FF:ON / 00:OFF
0xD0 1:DisplayPort
14 Input Select F4 00 0x90 2:HDMI1
0x91 3:HDMI2
15 SYSTEM RESET F5 00 00 Restart System

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 LG ELECTRONICS INC. / MONITOR DIVISION
Establish : 2019/03/29
LM61C ADJUSTMENT SPECIFICATION 9/11
Revision : 1
00:English,
01: German
02: French
03: Spanish
04: Italian
05: Swedish,
06:Finnish
07: Portuguese
0x00 ~
16 Select Language 68 00 08: Brazil
0x0F
09: Polish
0A: Russian
0B: Greek
0C: Ukrainian
0D: Chinese
0E:Japanese
0F: Korean
11: Traditional Chinese
0x01 : HDMI1
17 EDID SN UPDATE 0x77 0 0x01~0x02
0x02 : HDMI2

18 HDCP 2.2 write F9 00 00 Write HDCP 2.2 key

19 HDCP 2.2 read F8 data Read HDCP 2.2 key

Send 24 byte(EDID
20 Send Serial data 75 data SN(4byte) + date (2byte)
+ Ascii SN(18byte))
Read checksum data of
21 Read C/s of Serial data 76 data
24 byte

22 Module selection LM270WQA-SSA1

6.5. EEPROM Data Write

6.5.1 Siganl TABLE
START 6E A 50 A 84+n A 03 A CMD A ADH A ADL A

Data_1 A ... Data_n A CS A STOP Delay 20m

LEN : 84h+Bytes
CMD : E8h

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 LG ELECTRONICS INC. / MONITOR DIVISION
Establish : 2019/03/29
LM61C ADJUSTMENT SPECIFICATION 10/11
Revision : 1
ADH : E2PROM Slave Address(A0,A2,A4,A6,A8,AA,AC,AE), Not 00h(Reserved by Buffer To EEPROM)
ADL : E2PROM Sub Address(00~FF)
Data : Write data
Delay : 20ms

6.5.2. Command Set

No. Adjustment contents CMD(hex) LEN Explanation
1 EEPROM WRITE E8 94 16‐Byte Write
2 (84+n) n‐byte Write
* Use
„ FOS Default write :
<14mode data> write
SyncFlags,HPeriodH, HPeriodL, VtotalH,VtotalL, SrcHTotalH, SrcHTotalL
SrcHStartH, SrcHStartL, SrcVStartH,SrcVStartL, HsyncPhase
„ Temporary Data write: Write to particular address of EEPROM.

6.6 E2PROM Data Read

6.6.1 Signal TABLE
START 6E A 50 A 84 A 03 A CMD A ADH A ADL A CS A STOP

Delay 150ms

START 6F A D1 A ‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐‐ Dn A STOP

128 Bytes
6.6.2 COMMAND SET
No. Adjustment contents CMD(hex) ADH(hex) ADL(hex) Explanation
1 EEPROM READ E7 A0 0 0‐Page 0~7F Read
2 80 0‐Page 80~FF Read
3 A2 0 1‐Page 0~7F Read
4 80 1‐Page 80~FF Read
5 A4 0 2‐Page 0~7F Read
6 80 2‐Page 80~FF Read
7 A6 0 3‐Page 0~7F Read
8 80 3‐Page 80~FF Read
9 A8 0 4‐Page 0~7F Read
10 80 4‐Page 80~FF Read
11 AA 0 5‐Page 0~7F Read

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LM61C ADJUSTMENT SPECIFICATION 11/11
Revision : 1
12 80 5‐Page 80~FF Read
13 AC 0 6‐Page 0~7F Read
14 80 6‐Page 80~FF Read
15 AE 0 7‐Page 0~7F Read
16 80 7‐Page 80~FF Read
6.6.3 Use
„ Read E2PROM’s specific area as unit of 128(80h)‐byte. ( 84h )
6.6.4 EDID Write
EEPROM access by using DDC2B protocol
„ 1‐Byte write
START A0 A L A D A STOP

L : 0x00~0x7F
D : data
„ 8‐byte write
START A0 A L A Data1 A …. A Data8 A STOP

L : 0x00,0x10,….0x70
6.6.5 EDID Read
DDC2B Command.(A0/A1)
START A0 A 00 START A1 A Data1 ... Data128 A CS A STOP
‐ 128 Byte transfer of EDID Buffer of MICOM

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 PORT NO.:HDMI1 (HDMI2.0) PORT NO.:HDMI2(HDMI2.0) HDMI2.0 SWITCH
JK102
HDM2LB-19BG2RN3G

HDMI_SELECTION
JK101
HDM2LB-19BG2RN3G
DATA2+

HDMI_RXC-
HDMI_RXC+
HDMI_RX0-
HDMI_RX0+

HDMI_RX1-
HDMI_RX1+
HDMI_RX2-
HDMI_RX2+
1

HDMI_HPD

HDMI_SDA
HDMI_SCL
DATA2_SHIELD AR107
DATA2+ 2 5.1

HDMI2 (Straight)
1
DATA2- HDMI2_RX2+ +3.3V_NORMAL
DATA2_SHIELD AR102 3
2 5.1 HDMI2_RX2-
DATA1+

HDMI1 (Straight)
DATA2- 4 HDMI2_RX1+
3 HDMI1_RX2+
DATA1_SHIELD HDMI2_RX1-
DATA1+ HDMI1_RX2- 5
4 HDMI1_RX1+ DATA1-
DATA1_SHIELD 6 AR108 +3.3V_NORMAL R140 R141 R142
HDMI1_RX1- 5.1 C105
5 4.7K 4.7K 4.7K
DATA0+ 0.1uF
DATA1- 7 HDMI2_RX0+ 16V
6 AR101
DATA0_SHIELD

SEL2
SEL1

NC_1
5.1 +3.3V_NORMAL HDMI2_RX0-
8 TS3DV642A0RUAR

CEC
HPD
D3-
D3+
D2-
D2+

D1-
D1+
D0-
D0+
SDA
SCL

VCC
DATA0+

EN
7 HDMI2_RXC+
HDMI1_RX0+ DATA0- R137 IC100
DATA0_SHIELD 9 HDMI2_RXC-
8 HDMI1_RX0- 10K [EP]GND

17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
CLK+
DATA0- HDMI1_RXC+ 10
R138 CEC_A 18 42 SCL_A
9 HDMI1_RXC- R120 HDMI2_SCL
CLK_SHIELD 1K HPD_A SDA_A
CLK+ 11 19 THERMAL 41
10K HDMI2_DET HDMI2_HPD HDMI2_SDA
10 R134 0 CEC_B 43 40 SCL_B
R121 CLK- 20 HDMI1_SCL
CLK_SHIELD 1K 12 A1 HPD_B SDA_B
11 VR107 +5V_STANDBY 21 39
CEC 0 HDMI1_HPD HDMI1_SDA
R110 0 13 R127 10pF

22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
CLK- 0 VR105 HDMI1_DET 18V
12 R104 10pF A1 OPT AR109 C A2 HDMI2_5V
+5V_STANDBY NC OPT
OPT 18V C 14 AR106 3.3K
CEC OPT D102

D3-B
D3+B
D2-B
D2+B
B1-B
B1+B
D0-B
D0+B
NC_2
D3-A
D3+A
D2-A
D2+A
D1-A
D1+A
D0-A
D0+A
13 33
AR105 A2 SCL BAT54C_TSC
NC HDMI1_5V 15
14 3.3K HDMI2_SCL
AR100 D100 SDA
SCL 33 BAT54C_TSC 16 HDMI2_SDA
15 HDMI2_5V
DDC/CEC_GND
SDA HDMI1_SCL 17 C
16 HDMI1_SDA HDMI1_5V +5V_POWER R135 B Q101
DDC/CEC_GND 18 JP102
17 C MMBT3904(NXP)
HPD R132 560 10K
+5V_POWER R114 19 JP103 A1
B Q100 E

HDMI1_RXC-
HDMI1_RXC+
HDMI1_RX0-
HDMI1_RX0+
HDMI1_RX1-
HDMI1_RX1+
HDMI1_RX2-
HDMI1_RX2+

HDMI2_RXC-
HDMI2_RXC+
HDMI2_RX0-
HDMI2_RX0+
HDMI2_RX1-
HDMI2_RX1+
HDMI2_RX2-
HDMI2_RX2+
18 R136
JP100 MMBT3904(NXP) OPT C C104
HPD R108 560 10K VR106 VR108 10K
19 A1 20
This GND Pattern should be very thick 10pF 10pF A2 0.1uF
JP101 E 18V 18V
VR100 OPT C D103 16V
10pF C101 R115 VR109 VR110
A2 SHIELD BAT54C_Suzhou
20 18V 0.1uF 10K 10pF 10pF
VR103 18V OPT
16V 18V
10pF VR104 D101 R133
SHIELD 18V 10pF This GND Pattern should be very narrow 0
BAT54C_Suzhou
18V OPT HDMI2_HPD
VR102 R124 R139
10pF 0 0
18V
R109 OPT
0
R100 HDMI1_HPD R113
0 0

OPT

JK100
62L020S-34A1N-7T0201-HF_

DP AR103
DISPLAY PORT
ML_LANE_3- 5.1
1
1 DP_RX3N
GND_3
2
2 DP_RX3P
ML_LANE_3+
3 DP_RX2N
3 DP_RX2P
ML_LANE_2-
4
4
GND_2
5
5
ML_LANE_2+
6
6
ML_LANE_1-
7 AR104 +3.3V_NORMAL
7 5.1
GND_1
8
8 DP_RX1N
ML_LANE_1+
9 DP_RX1P OPT
9 DP_RX0N R116
ML_LANE_0-
10 1M
10 DP_RX0P
GND_0
11
11 DP_AUXP
ML_LANE_0+
12 +3.3V_NORMAL +3.3V_NORMAL
12
CONFIG1
13 R101
13
CONFIG2 0 R107 R111
14 R102 R117
14 10K 1M
AUX_CH+ 0 10
15 C102
15
16GND_4 0.1uF
16 DP_DET DP_RX_SDM
AUX_CH-
17 C103 For MAC mini DP issue
17
HOT_PLUG
18 R106 10 0.1uF
18 DP_RX3N DP_RX3P DP_RX2N DP_RX2P
DP_HPD OPT
RETURN
19 +3.3V_NORMAL R112 R118
19 R122 R125 R128 R130
OPT

OPT

OPT

OPT

DP_PWR[3.3V] 1M 10
20 100K 100K 100K 100K
20 OPT
R103
VR101

0 DP_AUXN
21 R105
100K
21
OPT
C100 R119 DP_RX1N DP_RX1P DP_RX0N DP_RX0P
0.1uF
16V 1M
R123 R126 R129 R131
OPT

OPT

OPT

OPT

100K 100K 100K 100K

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS 32GK850F 2017.04.13
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. SIGNAL INPUT 1 8
 IIC for Debugging WPN :
+3.3V_NORMAL +5V_STANDBY
+5V_STANDBY (from MP, delete this parts)
+3.3V_NORMAL wirte protection mode select
BUZZER

BLM15PX121SN1
Joystick Key 2017.03.27

BUZZER

HDMI_SELECTION
BU200 DE_BUG
P202
R258 R259 PKM13EPY-4002-B0 12507WS-04L

UART_RX_TCP
UART_TX_TCP
0 0 +3.3V_NORMAL

CONTROL_LED
R268 R271
OPT LCD PANEL e-DP

AMP_RESET
HDMI1_DET

AMP_nMUTE
1 10K 10K

L201
+3.3V_NORMAL
1
L202 OPT OPT P203
P200 BLM15PX121SN1 BUZZER 2 AMP_nMUTE
+5V_STANDBY R257 AR207 20525-060E-01
12507WR-08L OPT 10K JP202 AMP_RESET
1K 3
2 R305 0 OPT
BEEP DE_BUG

OPT
C200 4
1uF R262 BUZZER UZZER JP201 +3.3V_NORMAL R306 0 OPT
4.7K C AR200 33
1 10V R213 R214 R256 BUZZER 5 1
3.3K 3.3K 33 B Q205 R307 0 OPT
BUZZER_PWM 2
JP204 R216 2N3904S
10 OPT R308 0 OPT 3
2 KEY1 R238 R239
E R222 OPT 0 10K 4
VBUS_UP 10K

PANEL_VCOM_SDA
R225 IR
JP205 USB_HUB_RESET Ready for IR/3.3V amp on +3.3V_NORMAL 5
10

10
3 KEY2 OPT 6
walkie-talkie IR

+1.15V_VDD_DDR_B
VR201 OPT R270 PANEL_VCOM_SCL

1K
ZD200 VR202 C212 R269 R211 1K OPT 7
10pF 10pF walkie-talkie R228 0 0 R302
JP206 1uF C221 4.7K DP_DET
18V 100K 8

R210
4 18V 10V 1uF 5V_ST_ON

VDD_DRAM_B

+1.15V_VDD
9

+1.15V_VDD
10V EDP2_AUXN

100
R230
PD_CTL_DDR

AVDD_PLL
AVDDL_RX
JP207 10

VDDIO_B
EDP2_AUXP OPT

R265 AMP10
AVDD_RX
5 SYS_EEPROM_WP R303 11

PANEL_ON
OPT

AMP
Q204 100K
IR C 2N3904S R227 BUZZER R264 0
R309 BUZZER_PWM EDP2_TX3N 12
R212 0

KEY2
KEY1
JP208 OPT OPT 4.7K
10 13

0 OPT R224
B

R219
6 VR203 C201 EDP2_TX3P
CONTROL_LED WLED_ADIM
10pF 68pF R280 OPT 0 14
18V 50V R263 0 WPN_CONTROL
WLED_PDIM 15
E R226 VDDP EDP2_TX2N
7 JP210 4.7K WLED_ENABLE 16
OPT EDP2_TX2P

CD_SENSE3/GPIO_X30

CD_SENSE4/GPIO_X40
IR

DDCD0_DA/GPIO_X34
DDCD0_CK/GPIO_X33

CABLE5V3/GPIO_X31

DDCD1_DA/GPIO_X44
DDCD1_CK/GPIO_X43

CABLE5V4/GPIO_X41
R310 R229 10 PD_CTL 17
R204 HDMI_5V 0 OPT
100 R281 10 18

SAR3/GPIO_SAR3
SAR2/GPIO_SAR2
SAR1/GPIO_SAR1
SAR0/GPIO_SAR0

GPIO57/EXTINT3
GPIO56/EXTINT2
GPIO55/EXTINT1
GPIO54/EXTINT0
8 EDP2_HPD EDP2_TX1N

DVDD_DDR_RX_B
IR
R279 10 19

VDD_DRAM_B_3
VDD_DRAM_B_2
VDD_DRAM_B_1
EDP1_HPD EDP2_TX1P

GPIO25/CEC2
GPIO24/CEC3
GPIO23/PWM5
GPIO22/PWM4
GPIO21/PWM3
GPIO20/PWM2

VDD_NODIE_2
R209

HPD3/CBUS3

HPD4/CBUS4

AVDD_PLL_3

DVDD_DDR_B

GPIO26/CEC

EDP_HPD[3]
EDP_HPD[2]
EDP_HPD[1]
EDP_HPD[0]
10 20
9

VDDIO_B_3

VDDIO_B_2
VDDIO_B_1

GPIO27/IR
JP203

AVDDL_RX
EDP2_TX0N 21

AVDD_RX
RX2_2P
RX2_2N
RX2_1P
RX2_1N
RX2_0P
RX2_0N
RX2_CP
RX2_CN

GND_23
RX1_2P
RX1_2N
RX1_1P
RX1_1N
RX1_0P
RX1_0N
RX1_CP
RX1_CN

VDD_10

VDDP_4
GND_22
R232 OPT 22

VDD_9

VDD_8
C262 EDP2_TX0P
100K

[EP]
C205
0.1uF 1uF 23
16V 10V VDDP
EDP1_TX3N 24
EDP1_TX3P 25

256
255
254
253
252
251
250
249
248
247
246
245
244
243
242
241
240
239
238
237
236
235
234
233
232
231
230
229
228
227
226
225
224
223
222
221
220
219
218
217
216
215
214
213
212
211
210
209
208
207
206
205
204
203
202
201
200
199
198
197
196
195
194
193
R231 1K SAR10/GPIO_X10 VDDP_3 26
HDMI2_DET 1 192
CABLE5V1/GPIO_X11 AUXTXP3 EDP1_TX2N 27
2 THERMAL 191
DDCD3_CK/GPIO_X13 AUXTXN3 EDP1_TX2P 28
R245 10 3 257 190
HDMI_SCL 29
DDCD3_DA/GPIO_X14 AUXTXP2 +1.15V_VDD
FLASH MEMORY HDMI_SDA
R246 10
VDDP VDDP_1
4
5
189
188 AUXTXN2 EDP1_TX1N 30
31
GND_1 6 187 AUXTXP1 C229 0.1uF 16V EDP1_TX1P
+1.15V_VDD EDP2_AUXP 32
VDD_1 7 186 AUXTXN1 C238 0.1uF 16V +3.3V_NORMAL
EDP2_AUXN 33
HPD1/GPIO_X12 8 185 AUXTXP0 C244 0.1uF 16V EDP1_TX0N
HDMI_HPD EDP1_AUXP OPT 34
HRX0_CN 9 184 AUXTXN0 C247 0.1uF 16V R298 EDP1_TX0P
HDMI_RXC- EDP1_AUXN 100K 35
IC202 HRX0_CP 10 183 VDD
+3.3V_NORMAL HDMI_RXC+ 36
GD25Q16CSIGY AVDD_HRX0 AVDD_HRX0 11 182 LVA0P EDP1_AUXN
HRX0_0N LVA0M EDP1_AUXP 37
C266 12 181 OPT
AR201 0.1uF HDMI_RX0- R299 38
16V HRX0_0P 13 180 LVA1P 100K
33 CS# VCC HDMI_RX0+ 39
1 8 GND_2 14 179 LVA1M
CS 40
R261 HRX0_1N 15 178 LVA2P
SDO HDMI_RX1-
SO
FLAH HOLD#
10K HRX0_1P 16 177 LVA2M 41
2 16MBIT 7 HDMI_RX1+ 42
HOLD AVDDL_HRX0_1 17 176 LVACKP
R254 EDP2_HPD 43
AVDDL_HRX0 AVDDL_HRX0_2 18 175 LVACKM
33 WP# SCLK AVDD_MOD EDP1_HPD 44
3 6 AR204 HRX0_2N 19 174 LVA3P R304 R300
WP_SPI HDMI_RX2- 47K 47K 45
33 HRX0_2P 20 173 LVA3M
HDMI_RX2+ AVDDL_PREDRV
R251
4.7K
VSS
4 5
SI SCK
SDI AVDD_DP
GND_3
AVDD_DP
21
22
IC200 172
171
LVA4P
LVA4M
AVDDL_MOD
46
47
48
OPT OPT R296 0 DPRX_0P 23 170 AVDD_MOD_3
C290 C291 DP_RX0P 49
DPRX_0N AVDDL_PREDRV_3 +10V_PANEL
68pF
50V
68pF
50V DP_RX0N R235

R297
0

0
GND_4
DPRX_1P
24
25
26
MST9U36RQ1 169
168
167
GND_21
AVDDL_MOD_3
JP213
50
51
DP_RX1P 52
R247 0 DPRX_1N 27 166 GND_20
DP_RX1N OPT 53
AVDDL_DP AVDDL_DP 28 165 LVB0P C299 C321 R301
DPRX_2P LVB0M 4.7uF 4.7uF 10K 54
DP_RX2P R248 0 29 164 25V 25V
DPRX_2N LVB1P 55
DP_RX2N R249 0 30 163
GND_5 LVB1M 56
31 162
DPRX_3P LVB2P/VBY1_0-/EDP0+ C276 0.1uF 16V 57
DP_RX3P R250 0 32 161 EDP1_TX0P
DPRX_3N LVB2M/VBY1_0+/EDP0- C277 0.1uF 16V 58
DP_RX3N R236 0 33 160 EDP1_TX0N
AUXN LVBCKP/VBY1_1-/EDP1+ C278 0.1uF 16V 59
SYSTEM EEPROM DP_AUXN
DP_AUXP
AUXP
34
35
159
158 LVBCKM/VBY1_1+/EDP1- C279 0.1uF 16V
EDP1_TX1P
EDP1_TX1N
60

+3.3V_NORMAL NC_1 36 157 LVB3P/VBY1_2-/EDP2+ C280 0.1uF 16V

EDP1_TX2P 61
NC_2 37 156 LVB3M/VBY1_2+/EDP2- C281 0.1uF 16V
C267 EDP1_TX2N
0.1uF NC_3 38 155 LVB4P/VBY1_3-/EDP3+ C282 0.1uF 16V
EDP1_TX3P

JP214
16V VDD_2 LVB4M/VBY1_3+/EDP3- C283 0.1uF 16V
+1.15V_VDD 39 154 EDP1_TX3N
GND_6 40 153 GND_19
IC201 +1.15V_VDD
R260 GND_7 41 152 AVDD_LPLL
BR24G32FJ-3AGTE2
10K GND_8 42 151 VDD_6
AR203
10K AVDD_ADC 43 150 LVC0P/VBY1_4-/EDP4+ C300 0.1uF 16V
AVDD_ADC EDP2_TX0P
A0 VCC BIN0M LVC0M/VBY1_4+/EDP4- C301 0.1uF 16V
1 8 44 149 EDP2_TX0N
BIN0P 45 148 LVC1P/VBY1_5-/EDP5+ C302 0.1uF 16V
R255 EDP2_TX1P
33 GIN0M 46 147 LVC1M/VBY1_5+/EDP5- C303 0.1uF 16V
A1 WP EDP2_TX1N
2 7 GIN0P LVC2P/VBY1_6-/EDP6+ C304 0.1uF 16V
SYSTEM SYS_EEPROM_WP 47 146 EDP2_TX2P
SOGIN0 LVC2M/VBY1_6+/EDP6- C305 0.1uF 16V
A2
EEPROM SCL
48 145 EDP2_TX2N
RIN0M 49 144 LVCCKP/VBY1_7-/EDP7+ C306 0.1uF 16V
3 6 AR202 EDP2_TX3P
33 RIN0P 50 143 LVCCKM/VBY1_7+/EDP7- C307 0.1uF 16V
AVDD_AUDIO EDP2_TX3N
SYS_EEPROM_SCL HSYNC0 51 142 LVC3P AVDDL_MOD
GND SDA
4 5 SYS_EEPROM_SDA VSYNC0 LVC3M
52 141
AVDD_AUDIO_1 53 140 LVC4P
OPT OPT AVDDL_PREDRV
C292 C293 LINEIN_L0 54 139 LVC4M
68pF 68pF LINEIN_R0 AVDDL_MOD_2
50V 50V 55 138 AVDD_MOD
Close to IC L200 VRM_ADC 56 137 GND_18
C263 VAG AVDDL_PREDRV_2
10uF 57 136
2017.03.24 HK Cho 10V LINEOUT_L0 AVDD_MOD_2
58 135
AMP_I2C ready R242 C264 LINEOUT_R0 59 134 LVD0P
1000pF GND_9 LVD0M
200K 50V R243 C265 60 133
1000pF EAROUT_L LVD1P
200K 50V 61 132
EAROUT_R 62 131 LVD1M
AVDD_AUDIO_2 63 130 LVD2P
+3.3V_NORMAL BOOT-STRAP OPT
R240 33 SPDIFO/GPIO_A8 64 129 LVD2M
OPT HDMI1_5V

100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
KEC
OSCO

OSCI

R241 33
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
ALPHA AND OMEGA
CRYSTAL Q201 Q201-*1
HP_DET KMA3D7P20SA AO3435
AUMCK/GPIO_A7
AUWS/GPIO_A6
AUSD0/GPIO_A2
AUBCK/GPIO_A1
AUMUTE/GPIO_A0
DDCA_CK/RS232_RX
DDCA_DA/RS232_TX
GPIO42/PWM6
GPIO43/PWM7
GPIO44/PWM8
GPIO45/PWM9
GND_10
RESET
GND_11
VDD_NODIE_1
VDDP_2
CSZ
SDO
SDI
SCK
WP/GPIO10
HOLD/GPIO11
GPIO00/MSCL0
GPIO01/MSDA0
GPIO02/PWM0
GPIO03/PWM1
MSCL0/GPIO04
MSDA0/GPIO05
GPIO06/PWM4
GND_12
XOUT
XIN
AVDD_PLL_1
GND_13
VDD_3
CID
VBUS
AVDD_U33
GND_14
USB_DM
USB_DP
DVDD_DDR_A
DVDD_DDR_RX_A
AVDD_PLL_2
VDDIO_A_1
VDDIO_A_2
VDD_4
VDDIO_A_3
VDD_DRAM_A_1
VDD_DRAM_A_2
VDD_DRAM_A_3
VDD_5
GND_15
AVDDL_PREDRV_1
GND_16
AVDDL_MOD_1
LVD4M/HTPDN
LVD4P/LOCKN
LVD3M
LVD3P
AVDD_MOD_1
GND_17
LVDCKM
LVDCKP

D
OPT OPT

D
R200 R202 R205 R207
10K 10K 10K 10K X200
12MHz
BOOT1 GPIO42 R218 G G
4.7K
BOOT2 GPIO43
C260 C259 AUD_MCLK R287 33
BOOT3 GPIO44 18pF 18pF R215
50V AUD_LRCK R288 33 0 C
50V C204
AUD_DATA R290 33 1uF
BOOT4 GPIO45 10V B Q200
33 HDMI1_5V_SEL
R244

AUD_SCK R291 2N3904S

OPT OPT R220 HP_MUTE HDMI_5V
0

R201 R203 R206 R208 4.7K E

10K 10K 10K 10K HDMI2_5V_SEL
Close to scalar P79

NXP_SCALER_SCL
NXP_SCALER_SDA D200
R217 20170211 K.B.W
4.7K Crystal matching test BAT54C_TSC
OSCO
OSCI

+1.15V_VDD_DDR_A

VDDIO_A
AVDD_PLL

AVDD_MOD
CS
SDO
SDI
SCK
WP_SPI
HOLD
SYS_EEPROM_SCL
SYS_EEPROM_SDA

AVDDL_MOD
AVDD_USB
+1.15V_VDD

VDD_DRAM_A
+1.15V_VDD
HP_OFF
VDDP

AVDDL_PREDRV
A2
DP_RX_SDM

HDMI1_5V_SEL 15pF->18pF
DP_HPD

OPT
R145
RESET
+3.3V_NORMAL
A1
C

2.2K
SOLDER PRE-FORM
+5V_STANDBY HDMI2_5V
OPT
S1 R144 OPT KEC ALPHA AND OMEGA
RAC34057401 2.2K C294 C203 Q203 Q203-*1
GPIO45 GPIO44 GPIO43 GPIO42 FUNCTION +3.3V_NORMAL 10uF 10uF R234 KMA3D7P20SA
33
AO3435

D
10V 10V

D
S2
RAC34057401
L L H H BOOT from 51 C202 R233
0.47uF 10K
S3 50V R221 G G
RAC34057401 4.7K
L H L L SBUS
+3.3V_HP_AMP OPT
S4 AR208
10K 33 AR210
RAC34057401 C
L H L H BOOT from R2 HP_SDA
B Q202
S5 HP_SCL HDMI2_5V_SEL 2N3904S
RAC34057401
H L L L EXT RIU 33 AR211
+3.3V_NORMAL E
AR209 USB_HUB_SDA
10K
USB_HUB_SCL
BOOT1
BOOT2
BOOT3
BOOT4

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS 32GK850F 2017.04.13
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. MAIN IC / Key 2 8
MAIN IC POWER LINE - CAPACITOR

+3.3V_NORMAL
+1.8V_DDR VDD_DRAM_A
AVDD_PLL
+1.15V_VDD_DDR_A L111
+1.15V_VDD
BLM15PX121SN1
close to Q1 L116 close to Q1
BLM15PX121SN1
L100 close to Q1
BLM15PX121SN1 C175 C181 C187 C191 C196
10uF 10uF 0.1uF 0.1uF 0.1uF C213 C308 C255 C233 C241
-> 174.6mA 16V 16V -> 26mA 10uF 10uF 1uF 0.1uF 0.1uF
-> 23mA 10V 10V 16V 16V 16V
C111 C310 C127 C136 OPT 10V 10V 10V
10uF 10uF 4.7uF 0.1uF OPT
10V 10V 6.3V 16V
VDD_DRAM_B
OPT OPT
AVDD_RX
L112
+1.15V_VDD_DDR_B close to Q1 L117 close to Q1 Reserved on Botton side
L101 close to Q1 BLM15PX121SN1
BLM15PX121SN1
BLM15PX121SN1
C176 C182 C188 C192 C197 OPT
10uF 10uF 0.1uF 0.1uF 0.1uF C214 C222 C232 C242 C257
-> 23mA C112 C311 C128 C137 -> 173.6mA 16V 16V -> 115.6mA 10uF 10uF 1uF 0.1uF 0.1uF
10uF 10uF 4.7uF 0.1uF 10V 10V 16V 16V 16V
16V OPT 10V 10V 10V
10V 10V 6.3V OPT
OPT OPT
VDDIO_A AVDD_HRX0
AVDDL_RX
L102 close to Q1 L118 Reserved on Botton side
BLM15PX121SN1
Place Cap on Botton side L113 close to Q1 Reserved on Botton side BLM15PX121SN1
close to Q1
BLM15PX121SN1
OPT OPT
-> 38mA C108 C312 C129 C138 C153 OPT C215 C223 C248 C234 C251
10uF 10uF 1uF 0.1uF 0.1uF C177 C183 C193 C198 C208 C206 -> 135.4mA 10uF 10uF 1uF 0.1uF 0.1uF
10V 10V 10V 16V 16V 10uF 10uF 0.1uF 0.1uF 0.1uF 0.1uF 10V 10V 10V 16V 16V
10V 10V 16V 16V 16V 16V
OPT OPT -> 100.5mA OPT
OPT

AVDDL_HRX0 VDDIO_B AVDD_DP

L103 close to Q1 Place Cap on Botton side
BLM15PX121SN1 L119 Reserved on Botton side
L114 close to Q1 BLM15PX121SN1
close to Q1
OPT OPT BLM15PX121SN1 Reserved on Botton side
C109 C120 C313 C314 C130 C139 C154 C160
-> 75.2mA 10uF 10uF 10uF 10uF 0.1uF 0.1uF 0.1uF 0.1uF OPT
16V 16V 16V OPT C216 C224 C235 C252
10V 10V 10V 10V 16V C178 C184 C194 C199 C209 C207 10uF 10uF 0.1uF 0.1uF
OPT OPT -> 99.8mA 10uF 10uF 0.1uF 0.1uF 0.1uF 0.1uF -> 46.8mA 16V 16V
16V 16V 16V 16V 10V 10V
10V 10V OPT
OPT
AVDDL_DP
L104 close to Q1 Place Cap on Botton side
AVDD_ADC
BLM15PX121SN1
L120 Reserved on Botton side
OPT OPT BLM15PX121SN1
close to Q1
C110 C122 C315 C316 C117 C131 C155 C161
-> 159mA 10uF 10uF 10uF 10uF 1uF 0.1uF 0.1uF 0.1uF
16V 16V OPT
10V 10V 10V 10V 10V 16V C217 C225 C236 C253
OPT OPT 10uF 10uF 0.1uF 0.1uF
-> 49.1mA 16V 16V
10V 10V
OPT

VDDP
L121 close to Q1
BLM15PX121SN1

OPT
C220 C226 C230 C239 C245 C249
-> 25.6mA 10uF 10uF 0.1uF 0.1uF 0.1uF 0.1uF
Reserved on Q1 bottom layer. 10V 10V 16V 16V 16V 16V
close to Q1 pin99/pin116/pin7/pin216

AVDD_AUDIO
OPT OPT OPT OPT OPT
C107 C114 C123 C318 C319 C133 C141 C147 C152 C157 C162 C164 C167 C169 C170 C174 C179 C185 C189
-> 1291mA 100uF 10uF 10uF 10uF 10uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF L122
16V 10V 10V 10V 10V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V BLM15PX121SN1
close to Q1
OPT OPT

C218 C227 C237 C243

-> 5.8mA 10uF 10uF 0.1uF 0.1uF
AVDDL_MOD Reserved on Q1 bottom layer. 16V 16V
L107 Far away AVDDL_PREDRV 10V 10V
close to Q1 pin167 OPT
BLM15PX121SN1
AVDD_MOD
OPT
C115 C320 C134 C142 C148 C163
-> 4.6mA 10uF 10uF 0.1uF 0.1uF 0.1uF 0.1uF L123 close to Q1
10V 10V 16V 16V 16V 16V BLM15PX121SN1
OPT

C219 C228 C231 C240 C246 C250

-> 76.4mA 10uF 10uF 0.1uF 0.1uF 0.1uF 0.1uF
10V 10V 16V 16V 16V 16V
OPT
AVDDL_PREDRV Reserved on Q1 bottom layer. AVDD_USB
L108 L124
close to Q1 pin169
BLM15PX121SN1 BLM15PX121SN1

OPT
C116 C317 C144 C151 C156 C166 C297 C309
-> 11.7mA 10uF 10uF 0.1uF 0.1uF 0.1uF 0.1uF -> 8.8mA 10uF 10uF C298
10V 10V 16V 16V 16V 16V 10V 10V 0.1uF
OPT OPT 16V

20141028

close to s.w. power Far away +1.15V_VDD bypass cap

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS 32GK850F 2017.04.13
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. MAIN IC-CAP 3 8
 DC-JacK (Straight Type)
JK400

JP402

JP403

JP404

JP405
+19V
DS439-F01T1BA-A JP400

4 4

2 2
C409 C410
0.1uF 68uF
1 1 50V 35V
105C
For Jig Test

JP401

R405
1.8V, 1.15V

100
12V for panel PANEL_ON
R436
100K OPT +1.15V_VDD +5V_STANDBY
C414 17.03.16 change the panel volate value for AUO panel +1.8V_DDR
0.1uF
IC402 16V IC403
+19V Setting: 10.4V(=0.8(1+120K/10K)
MP2315S R425 MP2122AGJ R433
+10V_PANEL
36K 24K

BLM15PX121SN1
1% 1%
R401
9.1K AAM FB R427 R432
1 8 FB2 FB1
200K 200K
1 8
IN VCC R426 R434
L403 C440 33K 47K C439

L408
2 7
10.0uH 33pF 1% EN2 IN 1% 33pF
L400
BLM15PX121SN1
C401 C403 C406
SW
3
3A 6
EN
50V

L409
2 7
L410
50V

4.7uF 4.7uF 0.1uF

25V 25V 50V 2.2uH SW2 SW1 2.2uH
OPT C418 3 6
20141112 OPT->APPLY GND BST R413
4 5 0.1uF
2K 16V
R400
R408
C420 ZD402 C442 C429 C430 C431 EN1 GND C434 C435 C436 C441 ZD403 C437 C438
100 120K C424 C427 C428 4 5
2.5V 10uF10uF 10uF 0.1uF 0.1uF 10uF 10uF 10uF 2.5V 10uF 0.1uF
0.1uF 4.7uF 4.7uF 4.7uF 10V 16V 10V 10V 10V 50V
R414
1% 10V 10V 16V 10V
50V 25V 25V 25V OPT OPT
51K
C415
0.1uF
50V
R422
10K R430
100
1%
PD_CTLZ_1.8V

R431
100
PD_CTLZ_1.15V

OPT OPT
C432 C433
0.47uF 0.1uF R428 R429
50V 50V 10K 10K

3.3V OPT
R406
100K

OPT
R435
100K OPT
C405
OPT 0.1uF
IC400 16V
+19V Setting: 3.37V(=0.8(1+18K/5.6K)
MP2315S
+3.3V_NORMAL
OPT

BLM15PX121SN1
R402
5.6K AAM FB
1 8

OPT
IN VCC L402

OPT
L404
2 7
10.0uH

OPT
L401
BLM15PX121SN1 OPT
C400
OPT
C402
OPT
C404
SW
3
3A 6
EN
4.7uF 4.7uF 0.1uF
25V 25V 50V OPT OPT
R409 C408
20141112 OPT->APPLY GND BST OPT
4 5 0.1uF
15K R411
16V
OPT OPT
R407 18K OPT OPT OPT
100 C411 C412 C413 C416
1%
OPT 0.1uF 4.7uF 4.7uF 4.7uF
OPT R410 50V 25V 25V 25V
51K
C407
0.1uF
50V OPT
R412
5.6K
1%

Power sequence Circuit for 1.8V / 1.15V

+3.3V_NORMAL +3.3V_NORMAL

AR400
10K AR401
10K
PD_CTLZ_1.15V PD_CTLZ_1.8V

D
Q400 R404
G D R424
T2N7002AK Q402
10K G 10K
C T2N7002AK C
R403 R423
S Q401 B 1K 1K
Q403 B
2N3904S PD_CTL S 2N3904S PD_CTL_DDR

E E

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS 32GK750F 2017.04.13
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. MAIN POWER 4 8
 Headphone AMP
HP_LOUT

VR503
ICVL0518100Y500FR_
R532 18V
47K C539 VR504
220pF ICVL0518100Y500FR_ HP_ROUT
50V
18V
R537 C552
47K 220pF
50V
HP_AMP_3.3V +3.3V_NORMAL +3.3V_HP_AMP +3.3V_NXP R528
5.1 R536
5.1
OPT
R541 R146
0 0

C535 C545
22uF 22uF
Q505 16V 16V R553 OPT
SSM3J332R 0 R556
0

D
S
+3.3V_NORMAL OPT
L506 R557
OPT BLM15PX121SN1 0
C542 C543 C548

G
R539 C546 C551
10K 2.2uF 1uF 10uF
10V 10V 10V 0.1uF 4.7uF
16V 10V
OPT
R534
10K R540
1K

R535 C
4.7K

LINE_OUT_R
B Q504
HP_OFF

[EP]DGND
2N3904S +3.3V_HP_AMP

AVDD_2
E

AGND

VREF

NC_6

NC_5
+3.3V_NORMAL
OPT +3.3V_HP_AMP
R538 L505

24

23

22

21

20

19
4.7K BLM18PG121SN1D
OPT
LINE_OUT_L NC_4 R554
1 18
THERMAL 4.7K
AVDD_1 25 NC_3
2 17 OPT
NC_1 CDEPOP R551
0 OPT
3 IC501 16 R555
C536 C538
Close to IC NC_2 OSC_EN 1K
1000pF 1uF
4
ALC5629 15 HP_MUTE
50V 10V
LRCK SDA
5 14
C556
BCLK SCLK R552
6 13 1uF 0
10V

10

11

12
7

9
AR500

SDAC

XTI

XTO

DGND

DCVDD

DBVDD
R524 33
0
R525
AUD_LRCK 0 HP_SDA
AUD_SCK
HP_SCL
AR501
R526 33
0 OPT +3.3V_HP_AMP
AUD_DATA R527 R550
0 0
AUD_MCLK

C537 C540
22pF 22pF C547 C553
50V 50V 1000pF 1uF Close to IC
50V 10V

+3.3V_HP_AMP +3.3V_NORMAL

H/P OUT OPT

R529 R542
470K 470K

ICVL0518100Y500FR_
R533 HP_DET
1K
JK500
PJ-3517HAGR
JP506
3 E_SPRING C544
JP507 1uF
VR501
10V

HEADPHONE JACK
6A T_TERMINAL1

7A B_TERMINAL1
JP508
4 R_SPRING
HP_ROUT
JP509
5 T_SPRING
HP_LOUT

7B B_TERMINAL2

6B T_TERMINAL2

8 SHIELD_PLATE

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS 32GK850F 2017.04.13
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. AMP / HP 5 8
 LED Driver
+19V +19V

L702 D700 L705 D701

33uH BR210 33uH BR210

100V 100V
High : 1.5V High : 1.5V
C712 C715 C733 C736
4.7uF 4.7uF 4.7uF 4.7uF
25V 25V 25V 25V

R718 R748
MP3378E_OLD 1K MP3378E_OLD 1K
WLED_ENABLE WLED_ENABLE
IC700 IC701
C709 R716 C730 R746
MP3378E [EP]GND NO_MOTION 0.1uF 100K
MP3378E [EP]GND NO_MOTION 0.1uF 100K
R713 16V R743 16V
0 0
MOTION MOTION
R719 R749
WLED_ADIM GND1 PWM 0
WLED_ADIM GND1 PWM 0
1 28 WLED_PDIM 1 28 WLED_PDIM

THERMAL

THERMAL
R706 R708 R736 R738

29

29
R700 0 220K OSC EN1 R730 0 220K OSC EN1
2 27 2 27
100 100
1% C704 1% C725
34GL740 27GL850 34GL750 27GL850
R709-*1 R707 R709 4700pF R739-*1 R737 R739 4700pF
2.7K 2.7K 2.4K ISET COMP 50V D 2.7K 2.7K 2.4K ISET COMP 50V D
3 26 3 26
1/16W R712 C708 Q700 R742 C729 Q701
1% 1% +19V G AOD2922 1% 1% 1% +19V G AOD2922
1%
ADIM VCC1 270 0.47uF S ADIM VCC1 270 0.47uF S
4 25 1% 50V 4 25 1% 50V
C700 C705 C721 C726
OPT C711 OPT C732
1uF 1uF 1uF 1uF 1uF 1uF
16V 25V 25V 16V 25V 25V
LED4 VIN1 LED4 VIN1
5 24 5 24

R714 R744
LED3 GATE 33 LED3 GATE 33
6 23 OCP = 3A
6 23 OCP = 3A
R723 R753
LED2 ISENSE 100 LED2 ISENSE 100
1% 1%
7 22 7 22
R724 R754
R717 R722 0.1 R747 R752 0.1
LED1 SYNC 1K 200 1% LED1 SYNC 1K 200 1%
R701 8 21 1% 1W R731 8 21 1% 1W
470K 470K
1/16W 1/16W
1% R711 R715 1% R741 R745
OVP BST 100 10K OVP BST 100 10K
9 20 9 20
27GL850 34GL750 C701 27GL850 C722
R703-*1 R703 NC_1 AGND R733-*1 R733 NC_1 AGND
1000pF 1000pF
10K 12K 50V 10 19 C706 10K 12K 50V 10 19 C727
1/10W 1/8W 1/10W 1/8W
0.1uF 0.1uF
1% 1% 1% 1%
50V 50V +3.3V_NORMAL
NC_2 GND2_2 NC_2 GND2_2
11 18 11 18
+19V +19V
+19V +19V
Setting: 5.08V(=0.8(1+75K/14K)
FB GND2_1 FB GND2_1
OPT 12 17 +5V_STANDBY 12 17
R704 Idc : 3.4A R734 Idc : 3.4A
100K L701 470K L704
EN2 SW 10uH EN2 SW 10uH
R702 13 16 13 16
5V_ST_ON 0

VCC2 VIN2 OPT OPT VCC2 VIN2 OPT

15K 14 15 C713 C714 C718 C743 75K 14 15 C734 C735 C739 C742
R705 0.1uF 10uF 10uF 10uF ZD700 R735 0.1uF 10uF 10uF 10uF ZD701
16V 10V 10V 10V 5.6V 16V 10V 10V 10V 5.6V
C702 C723
0.1uF C703 C707 C710 0.1uF C724 C728 C731
16V 0.1uF 4.7uF 4.7uF 16V 0.1uF 4.7uF 4.7uF
50V R720 50V R750
25V 25V 75K Curent ==> X5R Type. 25V 25V 18K
1% 1%

Setting: 3.37V(=0.8(1+18K/5.6K)
R710 R740
22K 51K

C716 C737
51k => 21k for Phase Margin. (11.10 by MPS Report) 1uF R725 OPT 1uF R755 OPT
50V 100K 50V 100K
R721 C719 C720 R751 C740 C741
14K 22uF 22uF 5.6K 22uF 22uF
1% 63V 63V 1% 63V 63V
C717 C738
1uF R726 1uF R756
50V 100K 50V 100K

L700 L703
BLM18PG121SN1D BLM18PG121SN1D

0
R763
0
R758

0
R765

OPT MP3378E_NEW MP3378E_NEW

IC700-*1 IC701-*1
MP3378E mask revison
[EP]GND MP3378E mask revison
[EP]GND

0
R762 GND1 PWM GND1 PWM
0
R757

1 28 1 28

THERMAL

THERMAL
29

29
OSC EN1 OSC EN1
2 27 2 27
OPT
ISET COMP ISET COMP

0
R766

0
R767
3 26 3 26

0 OPT ADIM VCC1 ADIM VCC1

R759 4 25 4 25

LED4 VIN1 LED4 VIN1

0 OPT 5 24 5 24
OPT
R764 LED3 GATE LED3 GATE
6 23 6 23
0
0 R768 OPT LED2
7 22
ISENSE LED2
7 22
ISENSE

R760
LED1 SYNC LED1 SYNC
8 21 8 21
0
R769 OVP
9 20
BST OVP
9 20
BST

NC_1 AGND NC_1 AGND

10 19 10 19

NC_2 GND2_2 NC_2 GND2_2

11 18 11 18
12507WR-06L

12507WR-06L

FB GND2_1 FB GND2_1
12 17 12 17
1

6
EN2 SW EN2 SW
13 16 13 16
P701

P702
7

7
VCC2 VIN2 VCC2 VIN2
14 15 14 15

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS 32GK850F 2017.04.13
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. LED Driver IC 7 8
 JK900
Added serial Resistor for protected by damage from short
SP12-12078-A01
Hyunseung Ku 150304
QUICK CHARGE PORT
USB3.0 DOWNSTREAM
1
1
USB1_D_PWR USB HUB
R920
2 2.2
2 USBDN_DM1 20150901 18pF->8pF
20160603 8pF->10pF +3.3V_HUB +3.3V_HUB +1.1V_HUB
R921 (C-Type connector : USB 3.0 Signal)
3 2.2
3 USBDN_DP1 C910 (PD Controller : USB 2.0 Signal)
10pF
50V

X-TAL_2
4 [Test pad guidance]

GND_2
4
Test pads(jig-point, test-point) and their connecting wire
C918 C920 C923 C925 C927 C928 C929 C931 C933 C935 C937 C939 C942 C946
is unacceptable for Gigabit rate links.
0.01uF

USB_UP_RX-
USB_UP_RX+

USB_UP_TX-
USB_UP_TX+
OPT 10uF 0.1uF 0.1uF 0.01uF 0.01uF 10uF 0.1uF 0.1uF 0.1uF 0.01uF 0.01uF 0.01uF 0.01uF
5

USB_DM_UP
USB_DP_UP
X900 50V
5 24MHz R910 R925 10V 16V 16V 50V 50V 10V 16V 16V 16V 50V 50V 50V 50V
USB_SSRXM_DN1 10K R932
C909 1M
10

2
10pF 1% USB_HUB_RESET

X-TAL_1

GND_1
6 50V
6 USB_SSRXP_DN1 OPT
C911 C912
1uF 2.2uF
7 10V 10V
7
R908 R912
2.7K 6.8K
1% 1%
8 0.1uF C902
8 USB_SSTXM_DN1

USB_SSRXM_UP
USB_SSRXP_UP

USB_SSTXM_UP
USB_SSTXP_UP
USB_DM_UP
USB_DP_UP
9 0.1uF C903
9 USB_SSTXP_DN1

VDD33_4

VDD33_3
USB3.0 Diode

USB3.0 Diode

USB3.0 Diode
RCLAMP0502BA

RCLAMP0502BA

RCLAMP0502BA

USB_R1
+1.1V_HUB

VDD_8

VDD_7
GRSTZ
[EP]

TEST
10
D901

D905

D909
TEST-POINT +3.3V_HUB

XI
XO
NC
10 5V

64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
VBUS_UP
R904 USB_DP_DN1 USB_VBUS
4.7K 1 48 VBUS_DET
R902 USB_DM_DN1 THERMAL OVERCUR2Z OPT
4.7K 2 47 R934 10 OCS_DN2
65 R939
USB_SSTXP_DN1 3 46 OVERCUR1Z 10K release option R733,R734
USB_SSTXM_DN1 AUTOENZ/HS_SUSPEND 10K->1K
4 45 OPT OPT OPT
R905 R942 R943 OPT
4.7K VDD_1 5 44 OVERCUR3Z R933 10 OCS_DN1 R941 10K R946 R948 R949
R903 10K 10K 10K 1K 1K 0.83V
JK902 4.7K USB_SSRXP_DN1 6 IC901 43 OVERCUR4Z
D900

1/16W
SP12-12078-A01 USB_SSRXM_DN1 7 42 GANGED/SMBA2/HS_UP R1026
TUSB8041IRGCR MMBD6100 100K
Added serial Resistor for protected by damage from short USB DN Port #2 VDD_2 8 41 PWRCTL_POL A2 1%
USB3.0 DOWNSTREAM

QUICK CHARGE PORT Hyunseung Ku 150304 USB_DP_DN2 40 FULLPWRMGMTZ/SMBA1/SS_UP C

USBDN_DP2 9 VBUS_DET
1 USB_DM_DN2 SMBUSZ/SS_SUSPEND A1
1 USB2_D_PWR USBDN_DM2 10 39
USB_SSTXP_DN2 11 38 SCL/SMBCLK 0.5V
USB_SSTXP_DN2 USB_HUB_SCL
R922 USB_SSTXM_DN2 SDA/SMBDAT
2 2.2 USB_SSTXM_DN2 12 37
2 USB_HUB_SDA
USBDN_DM2 VDD_3 36 PWRCTL1/BATEN1
13

1/16W
33 R961
R924 USB_SSRXP_DN2 14 35 PWRCTL2/BATEN2 AR900 20K
USB_SSRXP_DN2 1%
3 2.2 USB_SSRXM_DN2 VDD33_2
3 USBDN_DP2 USB_SSRXM_DN2 15 34
VDD33_1 16 33 PWRCTL3/BATEN3
4 [Test pad guidance]
4

17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
Test pads(jig-point, test-point) and their connecting wire OPT OPT
is unacceptable for Gigabit rate links. R936 R938
R927 10K 10K

USB_DP_DN3
USB_DM_DN3
USB_SSTXP_DN3
USB_SSTXM_DN3
VDD_4
USB_SSRXP_DN3
USB_SSRXM_DN3
USB_DP_DN4
USB_DM_DN4
USB_SSTXP_DN4
USB_SSTXM_DN4
VDD_5
USB_SSRXP_DN4
USB_SSRXM_DN4
VDD_6
PWRCTL4/BATEN4
5 10 OPT OPT
5 USB_SSRXM_DN2 EN_DN1_PWR R935 R937 R940
R929
10 1K 1K 1K
EN_DN2_PWR
6
6 USB_SSRXP_DN2
OPT
7 R930
USB Downstream Signals 4.7K
7
OPT +3.3V_HUB
R914 OPT
8 0.1uF C906 4.7K R931
8 USB_SSTXM_DN2 OPT 4.7K

USB_SSTXP_DN1
USB_SSTXM_DN1

USB_SSRXP_DN1
USB_SSRXM_DN1
R917
4.7K
9 0.1uF C907 OPT

USBDN_DM1
USBDN_DP1
9 OPT
USB_SSTXP_DN2 R926 R928
USB3.0 Diode

USB3.0 Diode

USB3.0 Diode
RCLAMP0502BA

RCLAMP0502BA

RCLAMP0502BA

TCP_DP
TCP_DM
4.7K 4.7K
10
D903

D907

D911

10 FW Update

USB DN Port #1

If you don't use USBDN_DP4, DM4, please apply R914, R916,R917,R918

JK903
SP12-12078-B01
[USB Pattern impedance guidance]
USB shall have a 90ohm of pattern impedance not a 100ohm.
USB3.0 UPSTREAM

(DP,DM,SSTX,SSRX)
VBUS
1 VBUS_UP

D-
2 USB_DM_UP

3
D+
USB_DP_UP 5V to 1.1V // 3.3V IC Power
GND
19V TO 5V (USB Down Stream 1.5A *2EA)
4

STDB_SSTX- 0.1uF C958 Current limit 1.64A (USB Port#1)

5 USB_UP_TX-
Current limit 1.64A (USB Port#2)
STDB_SSTX+ 0.1uF C959
6 USB_UP_TX+
C930
GND_DRAIN 2200pF OPT
7 R953 50V C932
10K C934
100pF 0.047uF R958
+3.3V_HUB USB_5V 1%
50V 25V 6.8K
STDB_SSRX- R950 R955 1%
8 USB_UP_RX- 14K 10K
IC900 1%
24.9K
MP2122AGJ Close to IC R952 R2
STDB_SSRX+ R919 14K
9 USB_UP_RX+ R900 27K 1% C944 C948 C951 C954
USB3.0 Diode

USB3.0 Diode

USB3.0 Diode

24.9K
RCLAMP0502BA

RCLAMP0502BA

RCLAMP0502BA

1% R954 10uF 10uF 10uF 10uF

1% 120K
10 R906 R915 1% 10V 10V 10V 10V
D904

D908

D912

200K FB2 FB1 200K

RSET2

RSET1
1 8

[EP]

AGND

RLIM

COMP
OPT +19V OPT
SHIELD

FB

SS
+1.1V_HUB R923 C955 C938 R959
120K 33pF 82pF 51K
OPT EN2 IN 1%
C956 50V 50V 1%
R901

28

27

26

25

24

23

22
2 7
33pF 20K VIN_1 LX_3
1% 1 21 L902
50V L900 L901 R1
2.2uH SW2
2A SW1 2.2uH OPT VIN_2 2
THERMAL
29 20 LX_2
4.7uH
USB_5V
3 6 C919 C921 C924
4.7uF 4.7uF 4.7uF VIN_3 3 19 LX_1 C936 Vout=0.6*(1+R1/R2)=5.1V
25V 25V 25V 0.047uF
EN1 GND C916 C917 PGND_1 IC902 BST 25V
OPT C913 C914 OPT 4 18 +3.3V_HUB
C957 4 5 0.1uF 10uF C915 ZD901 10uF 0.1uF
OPT C900 C901 C904 10V 50V
10uF 0.1uF 16V 10V 10uF 5V PGND_2 5 17 SW_IN2
ZD900 10uF 10uF 10V
2.5V 10V 10V 10V 16V
PGND_3 6 6A 16 SW_IN1
C940
V7V NFAULT1 1uF
7 15 10V
R911

10

11

12

13

14
C922 R960 R962

9
100K 1uF
100K 100K
25V

MODE/SYNC

EN

SW_OUT2

SW_OUT1

SW_EN2

SW_EN1

NFAULT2
R913
100K OCS_DN2
USB_5V
R945 OCS_DN1
OPT 100
C908 5V_ST_ON
C905 0.47uF
0.47uF R907 R909 R956 USB2_D_PWR
16V 50V 68K 68K OPT 47K
OPT 1.5A
C926 R947
0.1uF 20K
50V OPT R957
R951 47K
100K

C941 C943 C945 C949 OPT 1.5A

10uF 10uF 10uF 10uF ZD902 USB1_D_PWR
10V 10V 10V 10V 5.6V

C947 C950 C952 C953 OPT

10uF 10uF 10uF 10uF ZD903
10V 10V 10V 10V 5.6V

EN_DN1_PWR

EN_DN2_PWR
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS 34UCxx 2019.02.12
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. USB HUB 8 8
 UPDATE
DPM_OFF

+3.3V_NXP
+3.3V_NXP

AR1003
C1000 C1001 C1017 C1003 10K
10uF 10uF 0.1uF 0.1uF
10V 10V 16V 16V
DEBUG
P1000
+3.3V_NXP 12507WS-06L
C1004 C1018 C1006 MICOM_SWCLK
0.1uF 0.1uF 0.1uF
16V 16V 16V MICOM_SWDIO
1
R1000 UART_RX_DEBUG 1
10K
UART_TX_DEBUG 2
MICOM_SWDIO DEBUG 2
MICOM_RESET C1010
0.1uF
16V 3

PIO0_16/WAKEUP
3

SWDIO/PIO0_15
+3.3V_NXP
4
MICOM_SWCLK 4

DEBUG

PIO0_23

PIO0_17

PIO0_18
5
R1014 0 5

PIO_19

RTCXIN
UART_RX_DEBUG

VSS_3
VDD_2
DEBUG

VDDA
VSSA

VBAT
R1005 6
10K R1006 R1015 0 6
OPT UART_TX_DEBUG
AR1002 15K OPT
10K R1016 0 7
37 MICOM_RESET
38
39
40
41
42
43
44
45
46
47
48
PIO1_13 RTCXOUT 7
36 1
VREFN 35 2 VSS_1
Scaler AR1000 VREFP 34 3 RESET/PIO0_0
33
TRST/PIO0_14 33 4 PIO0_1
UART_TX_TCP TDO/PIO0_13 IC1000 VSS_2 OPT C1007
32 5 R1007 0.1uF
UART_RX_TCP TMS/PIO0_12 PIO2_0/XTALIN 10K 16V
31 LPC11U68JBD48 6
TDI/PIO0_11 30 7 PIO2_1/XTALOUT
OPT DEBUG
AR1001 PIO0_22 29 8 VDD_1 P1001
33
SWCLK/PIO0_10 I2C Master PIO2_5 12507WS-04L
28 9 X1000
PIO0_9 PIO0_20 12MHZ
27 10
R1004 PIO0_8 26 11 PIO0_2 3 2 DEBUG
10K X-TAL_2 GND_1 R1024
PIO1_21 25 12 PIO2_2 10 1
4 1
GND_2 X-TAL_1
24
23
22
21
20
19
18
17
16
15
14
13

C1009 C1008 DEBUG

8pF 8pF R1025 10
50V 50V 2
PIO0_7
PIO0_6
PIO1_24
PIO2_7
USB_DP
USB_DM
PIO1_23
PIO0_21
PIO0_5
PIO0_4
PIO0_3
PIO1_20

3
+3.3V_NORMAL

5
R1010 R1011
2.2K 2.2K
TO USB HUB SCL
R1029 10
TCP_DP SDA
R1030 10
TCP_DM
+3.3V_NXP
R1020 10
NXP_SCALER_SCL
R1001 R1021 10
NXP_SCALER_SDA
SCL SDA 220
TP1001 VBUS_DET OPT OPT To SCALER
R1027 R1028
TP1002 2.2K 2.2K

R1002
2.2K +3.3V_NXP

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS 34UCxx 2019.02.12
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
UPDATE 10 10
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.