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An in-depth security evaluation of the Nintendo DSi

gaming console

Abstract—The Nintendo DSi is a handheld gaming console B. Responsible disclosure


released by Nintendo in 2008. It was designed as a small upgrade
to its predecessor, the Nintendo DS, and was succeeded by the In the case of the Nintendo DSi, disclosing the discovered
Nintendo 3DS. While the security systems of the DS and 3DS vulnerabilities to the vendor is more complicated than in
have been fully analyzed and defeated, this has not yet been other situations due to the device being out of support.
the case for the DSi. The goal of this research is to analyze On their main website, Nintendo has a ‘Support’ section,
the previously unexamined parts of the security system of the
Nintendo DSi, more precisely, its boot ROMs which have never
which is both strongly regionalized and split into many
been extracted, reverse-engineered and analyzed before. This different categories for many different cases of problems.
paper concerns itself about these boot ROMs, and possible Reporting security vulnerabilities — or hardware issues in
security vulnerabilities residing therein. The extraction and general — does not appear to be possible there either, as no
analysis of the boot ROMs is conducted. From this, new practical proper category for such issues could be found.
exploits against the system are developed.
Index Terms—Nintendo DSi, boot ROM, fault injection, Due to the above factors, vulnerability disclosure to the
secure boot, modchip, embedded security vendor is currently not considered.

II. BACKGROUND AND RELATED WORK


I. I NTRODUCTION A. The Nintendo DSi gaming console
The Nintendo DSi is a handheld gaming console re- The DSi is an interesting hybrid between the DS and 3DS:
leased by Nintendo in 2008. It was designed as a small it keeps the former’s CPU and GPU, while the peripherals,
upgrade to its predecessor, the Nintendo DS, adding extra chipset, boot process and overall security architecture resem-
‘multimedia’ features such as cameras and a web browser. ble those of the 3DS much more closely.
The DS and DSi combined reached over 150 million sales, The DSi, much like the DS, has two CPU cores, an
more than any other line of video game console released ARM7TDMI and an ARM946E-S (typically shortened to
by Nintendo [23]. Thanks to this success, these consoles resp. ARM7 and ARM9). It has SoC-internal SRAM specific
still have active homebrew communities of people making to each separate CPU core, with configurable mapping
their own, self-published games and programs, while further options, and external DRAM shared between the two cores.
reverse-engineering the undocumented parts of the hardware. These CPUs can also communicate using a FIFO interface.
(Nintendo never released official hardware documentation to Unlike the DS, it boots from eMMC NAND, which contains
the public.) the second-stage bootloaders (in raw eMMC blocks) as well
The security systems of the DS [4] and 3DS (the successor as the system menu and various apps (on an encrypted FAT32
of the DSi) [31, 6, 32] have been fully analyzed and defeated. filesystem). It has extra peripherals such as cameras and an
This has not yet been the case for the DSi. SD card slot. More information about the DS and DSi can
The goal of this research is to analyze the previously be found in [15].
unexamined parts of the security system of the Nintendo The DS only used symmetric-key Blowfish encryption
DSi, more specifically, its boot ROMs. This would allow without authentication, and a system menu residing in exter-
for better hardware preservation and brick recovery: current nal flash without cryptographic protection mechanisms [4].
exploits [18] rely on the second-stage bootloader (residing Compared to this, the DSi and 3DS both use a full secure
in eMMC NAND) existing and having a correct digital boot chain using digital signatures and AES encryption, from
signature. This NAND IC is not very reliable. Furthermore, the first bootloader [7, 6] down to individual games and
this work can be used as inspiration on how to tackle other, applications [8, 9, 25].
similar targets.
B. Fault injection
Fault injection is an attack method targetting the physical
A. Contributions
implementation of a device, by actively tampering with
This work presents the following contributions: We extract its operation. By bringing one or more environmental pa-
the remaining boot ROM of the DSi using a second-order rameters (such as supply voltage, clock signal, incident
EMFI attack. We then look into the security aspects of this electromagnetic field, etc.) outside the operating range of the
ROM, completing the security analysis of the Nintendo DSi. device for a short amount of time, the target can be made
Finally, we develop a modchip able to jailbreak the system to malfunction without crashing or shutting down. After
in its very first bootstage. This modchip attack can be used these parameters return to their normal range, the effects
to revive consoles with a broken eMMC. of this malfunctioning can still propagate logically, possibly
subverting the security properties of the device. Readers is injected to take control of the ARM7. The payload then
interested in the details, applications and implementation continues booting normally, but ‘forgets’ to detach the ROMs
may read [2, 44, 29, 1, 34, 42]. from the system buses. This will leave the ARM9 stuck in an
Fault injection can be used to circumvent security infinite loop. A second fault can be injected here to break the
checks [13, 19], tamper with cryptographic algorithms to latter core out of this loop, and continue the boot process
obtain secrets [10, 35, 20], and even directly take control normally, but with both ROMs still readable. As soon as
over the execution flow of a processor [14, 28, 38]. In the execution ends up in an applet or game (running custom
context of gaming consoles, this often translates to obtaining code inserted using a pre-existing exploit), the ROM can be
decryption keys and arbitrary code execution capabilities in read out and e.g. be saved to the SD card.
a high-privilege environment (e.g. a bootloader, hypervisor,
B. Practical considerations
or security coprocessor). Examples of this can be found in
[21, 24, 12, 6, 11, 37, 20]. The method described above is a second-order fault in-
jection attack, i.e. it requires two successful faults to work.
C. Earlier work on the DSi While such attacks tend to be seen as difficult to pull off (e.g.
Interestingly enough, it was the 3DS of which the security [40]), and countermeasures rarely exist, they have already
system was fully broken first. From software exploits in the been performed successfully in the past [3, 11, 39].
operating system [25, 36] though bootloader ‘unlocks’ [22, As fault injection mechanism, EMFI is selected, as it
5], the boot ROMs finally got extracted as well [6], in which seemed more practical with the wire-bond BGA package
fatal flaws were found [31, 32]. More specifically, using of the SoC, and the complex layer stackup and connection
SRAM that persisted across SoC resets in combination with layout of the PCB. The setup built employs a NEWAE
exception vectors not being reinitialized quickly enough, ChipSHOUTER as EMFI injector, and a ChipShover as
it was possible to obtain arbitrary code execution really positioning stage.
early in the boot process using fault injection, by raising A Raspberry Pico controls the setup: it sends glitch pulses
undefined instruction exceptions [6]. After ROM images had to the ChipSHOUTER using signals from the target as trigger
been obtained, it became clear that the boot ROMs contain a inputs. It is able to assert the reset line of the target, and it
buffer overflow vulnerability in the PKCS#1 ASN.1 parsing acts as a new device on the target’s I2C bus as a backchannel
code [32]. for printf-style debugging of payloads. A desktop com-
Meanwhile, the DSi had survived earlier attempts at break- puter sends FI parameters to the Pico (using a USB-UART
ing into its security system, and still stood strong. However, connection) and controls the ChipShover positioning.
as the 3DS included a DSi backwards compatibility mode To find the optimal combination of fault injection parame-
(including emulating the DSi bootchain starting from the ters, a divide-and-conquer approach is used. A first parameter
second-stage bootloader), the defeat of the 3DS opened a run determines the probe positioning, coil voltage and pulse
new avenue for analyzing its predecessor. As it was now pos- width to raise an undefined instruction exception in the
sible to reverse-engineer the DSi’s second-stage bootloader, ARM7 (on a test payload trying to replicate the situation
a vulnerability was found [18]. with the boot ROM running). The next run then determines
This proved to be a useful starting point for analyzing the timing offset from reset release to inject these faults
the DSi boot ROMs. By using the same fault injection (against the real boot ROM, replicating [26]). Finally, the
exploit as on the 3DS, it was possible to extract the ARM7 probe positioning, coil voltage and pulse width for breaking
boot ROM [26]. Though, unlike the 3DS, no easy way the ARM9 out of an infinite loop are determined as well
of dumping the ARM9 boot ROM was found (compare (again on test code). Once these steps have been completed,
with [32]). Furthermore, it is the latter core’s ROM that the parameters can be combined for the final boot ROM
contains the actual cryptographic verification routines, thus extraction attack.
no vulnerabilities could be found yet either. A photo of the setup is provided in Figure 1.
C. Results
III. ARM9 ROM EXTRACTION
The attack worked, and the ARM9 boot ROM has
A. Method been extracted successfully. The SHA3-256 hash of the
To extract the second ROM of the target, a few implemen- 64 KiB binary is cb886a6a02164ee8d4e1409d6e4c9bec
tation details of these ROMs first need to be understood. 9736958e6e879f3ea7e44561ab667c6f. The timeline of
Right before jumping to the code of the second-stage a successful exploit is shown in Figure 2. The success rate
bootloader (after the latter has been decrypted and verified was high enough to obtain a dump once every ≈ 90 minutes.
by the boot ROMs), both ROMs are completely detached When running more tests and dumping CPU registers,
from the system memory buses. More specifically, the ARM7 the ARM7 fault mechanism seems to be a direct corruption
ROM writes to an MMIO register to disable both ROMs [17], of the program counter, rather than the ability to raise an
while the ARM9 waits for this transaction to be completed. undefined instruction exception. (cpsr reports the CPU to
The fault injection exploit used in [26] (and described be in system mode, rather than exception mode. SRAM is
in the previous section) can be used as a starting point to filled with shellcode that jumps to the payload right before
extract the ARM9 ROM. Once the console boots, a first fault resetting.)

2
emulator melonDS (typically used for gaming) is patched1 to
support booting from the boot ROMs and enable debugging
using GDB. This way, an exploit can be tested in the full boot
process, with instruction stepping and memory inspection.
B. Functional description
The boot ROMs load, decrypt and verify the second-stage
bootloader as follows: first, the ARM7 reads configuration
bytes from an external SPI EEPROM. Depending on this
configuration, it will boot from either eMMC or this same
EEPROM. If a special key combination is pressed, the game
cartridge will be booted from instead, just like the 3DS [32].
Then, a 512-byte boot header is read from the boot medium.
This header contains information on the offset, size, load
address, and optional compression flags of the second-stage
payload binaries, as well as an RSA-1024 signature. The
ARM7 sends this boot header to the ARM9 over the FIFO
interface, and the ARM9 then verifies the RSA signature,
Figure 1: A photo of the EMFI setup to extract the boot
sending the result back to the ARM7.
ROM. The target DSi sits on the stepper table, with a
The ARM7 then sets up its AES accelerator peripheral
ChipSHOUTER hanging above. In front sits a breadboard
and DMA engine to read and decrypt the first payload (the
with a Raspberry Pico and supporting components (e.g. a
ARM7 binary of the second-stage bootloader). The plaintext
level shifter), under which a logic analyzer is placed to
is then sent to the ARM9, which then calculates its SHA-1
inspect the whole system. The controlling desktop computer
hash. The procedure is repeated for the second payload (the
is not included in this photo.
ARM9 binary). Once the two hashes have been calculated,
the ARM9 compares them against the ones from the RSA
signature, and communicates back the result to the ARM7. If
everything verified correctly, both ROMs then jump to their
respective second-stage binaries.
The above is a very rough overview, for a much more de-
tailed explanation, see the full thesis text. The next sections
do depend on a few details, they are thus discussed here:
Both second-stage payloads can optionally be compressed
using an LZ variant, this can be configured separately per
core. Normally, the payload is sent by writing it to a specific
Figure 2: Logic analyzer capture of the ARM9 boot ROM SRAM bank that can be mapped privately between both
extraction process. Some time after reset release, a first fault CPU cores. However, when this compression option is used,
is injected (1). The ARM7 payload then starts mimicking another option becomes available. It allows the data to be
the regular boot ROM execution (2-4). After this, the SoC sent over the FIFO, and the ARM9 then decompresses it
hangs as the ARM9 waits for the ROMs to be locked away upon reception (instead of the ARM7 after reading from its
(5), which the ARM7 payload does not do. After injecting AES accelerator). This new option applies to both cores. The
a fault into the ARM9 successfully (not pictured on the compression options are ignored when booting from a game
GLITCH_OUT line), the console continues booting (6) and cartridge, such payloads are always uncompressed.
the result is transferred over I2C (7). The RSA signature format is rather peculiar: instead of
using PKCS#1 v1 or v2, a custom format is used. The
RSA signature appendix contains the hashes of the boot
IV. ARM9 ROM ANALYSIS header, decrypted second-stage binaries, a partial AES key,
and a hash of all the previous hashes concatenated. The
RSA public key resides in the rodata section of the ARM9
A. Method ROM. PKCS#1 v1-style padding is used, but without ASN.1
encoding.
To properly analyze the functioning of the boot ROMs, a
The payload binaries are encrypted using AES-CTR. The
combination of multiple tools is needed. Ghidra serves as a
key is derived from two 128-bit partial keys, using a KDF
base for static analysis to discover possible vulnerabilities.
implemented in hardware [16] (which is cryptographically
These are then tested in small ‘unit tests’ using Unicorn and
weak [25]). One partial key is hardcoded in the boot ROM,
Python scripting. However, this environment does not suffice
to emulate the full boot procedure with both ARM cores 1 Available at https://github.com/melonDS-emu/melonDS/pull/
active at the same time. To overcome this, the Nintendo DS 1583

3
the other comes from the RSA signature appendix. The IV 3) DTCM is marked as no-execute by the MPU. Thus,
is 96 bits in size, and consists of the corresponding binary’s use ROP [33] to copy the payload to ITCM (which is
size repeated three times (the first time as-is, the second time read-write-execute), and jump to it. The ARM9 is now
its binary complement, the third time its two’s complement). in full control of the attacker.
4) The ‘ARM7’ payload (running on the ARM9) uses the
C. Vulnerabilities FIFO interface to tell the ARM7 to now load the next
The cryptography of the ROMs seems rather interesting, second-stage binary (meant for the ARM9).
with its custom signature format and use of outdated prim- 5) Set the load address of the second-stage ARM9 binary
itives. However, no ‘easy’ way of forging such a signature to an ARM7 stack address, and do not use compression
seems to be possible, without either factoring the modulus or for this binary.
creating a second preimage of a SHA-1 hash. Its method of 6) The ARM7 will load the decrypted ARM9 binary into
deriving the AES IV could be problematic: if both binaries its address space (to then send it to the ARM9 by
are equal in size, the CTR keystream would be reused, remapping the SRAM bank backing it), but instead it
making decryption much easier. Though, this does not occur will take over control of the ARM7. The ARM7 stack
in practice. is executable, thus no further steps need to be taken.
The ROM software does not seem to include any ‘obvious’ The attacker is now in control of both cores, with the
vulnerabilities, as (unlike the 3DS ROM) it performs no boot ROMs still mapped into memory.
parsing. The boot header format is a C struct with fixed B. Implementation
offsets and sizes, and no ASN.1 encoding is used in the The above attack works in theory and has been validated to
RSA signatures. There seem to be a few oversights, though work with the EMFI setup. To be implemented in a practical
on their own they do not compromise the security of the manner, however, several questions still need to be answered.
system. The first one is that the return value of the function The first is the choice of the boot medium. A custom
checking the RSA signature padding is ignored (though the game cartridge would be ideal in terms of practicality, but
hash-of-hashes as described in the previous section will catch this is not possible: compression cannot be used with a game
randomly-generated RSA signatures). The second one is that cartridge, while the exploit relies on its use. The eMMC
the payload binary sizes and load addresses are never sanity- memory is also not a possibility, as modifying its contents
checked (the validity of these thus relying entirely on the in-situ is difficult, and one goal of this exploit is to boot the
authenticity of the RSA signature). console with a malfunctioning eMMC memory. The final
One particular spot in the ARM9 ROM code seems to option is thus to use the SPI EEPROM as boot medium.
be particularly vulnerable to fault injection. Right after the Luckily, this IC resides on a daughterboard (instead of being
RSA signature verification, the ROM checks the ‘hash of directly soldered onto the motherboard), thus replacing the
hashes’ and the hash of the boot header. The corresponding daughterboard with one with malicious contents is relatively
assembly code is constructed such that, upon failure, a single easy.
‘load-bearing’ mov instruction changes the return value in This replacement daughterboard can thus serve as a mod-
both cases. If this mov instruction were to be faulted, both chip. For practicality reasons, voltage glitching will have to
hash checks can be skipped. This however still leaves the be the fault injection mechanism. (EMFI or LFI modchips
second-stage payload binary hashes in place. have never been made, as far as the authors know.) This
can be done by using a crowbar MOSFET [20] on the 1.2V
V. P RACTICAL EXPLOITATION
SoC core power rail. As the Raspberry Pico was used in
A. Method the ROM extraction setup, reusing the RP2040 here is also
a straightforward choice. Several other modchips use this
With the elements from the previous sections, we can now
microcontroller as well [43, 41]. A photo of the modchip in
devise an exploitation method that uses a single injected fault
action, able to take over the boot ROMs of the target, can
to take control over both ARM cores, while the boot ROMs
be seen in Figure 3.
are still mapped into the address space. It works as follows:
1) Use fault injection to bypass both the boot header hash VI. C ONCLUSION
check and the ‘hash of hashes’ check at once. The DSi used a much more ‘ad-hoc’ and ‘home-built’
2) Set the load address of the second-stage ARM7 binary security system compared to the 3DS, with its custom
(which gets loaded first) to an ARM9 stack address (in signature format and lack of operating system being able to
its DTCM), and have it be LZ-compressed, with the enforce security boundaries. Nevertheless, it ended up being
FIFO option enabled. This will make the ARM7 send more difficult to actually break, from finding an entrypoint
the decrypted, compressed binary to the ARM9 over to extracting and exploiting the boot ROMs. This stands in
the FIFO interface. The ARM9 then decompresses it contrast to the fact that (especially with its use of outdated
and writes it to the destination address in its own primitives), it looks much weaker on paper. Though, this
address space (i.e. the DTCM). This all happens before does not mean using the DSi’s security system in a different
the ARM9 has a chance to calculate the hash of the context is a good idea: it is very specialized towards a
decrypted and decompressed second-stage binary. gaming console, and depends on custom hardware (not

4
attacks. This question is relevant in the context of IoT
security, where users may want to use such attacks to disable
features that harm their privacy or safety [30]. This is already
demonstrated by their reluctance to even let such devices be
connected to the internet [27].
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