AN2236

PIC16F Full-Bridge Class D Audio Amplifier

Author: Willem J. Smit This application note provides an example of using a

Microchip Technology Inc. PIC16(L)F1769 device together with several core inde-
pendent peripherals (CIPs) to implement a low-cost,
low-power, full-bridge, Class D audio amplifier. It uses
INTRODUCTION minimal components and was designed to be
This application note focuses on how to use a PIC16F implemented in a small and compact form factor.
microcontroller (MCU) for implementing a low-cost,
Class D full-bridge audio amplifier. CLASS D TOPOLOGY
The basic operation of the class-D amplifier is to con-
A Class D amplifier requires several main components
vert an analog input signal into a pulse-width modulator
to be functional. They are listed below:
(PWM) output. The PWM output is used to drive a pair
of pMOSFET and nMOSFET, which provide amplifica- • Input Signal
tion. The amplified signal is then externally filtered via • Triangle Waveform Generator
an X-order low-pass LC filter, which reproduces the • Comparator
original analog signal with the exception being • PWM Output Stage
amplified. • Amplification
• Low-pass Filter
Because MOSFET operates by being either fully OFF
or fully ON, the efficiency of a Class D amplifier is sig- Figure 1 demonstrates the basic operation of a Class D
nificantly higher than that of a linear amplifier. This is amplifier.
due to fact that less power is dissipated as heat in the
amplifier circuit.
By comparison, the efficiency of a Class D amplifier can
easily be greater than ~90%, whereas a typical linear
class-A amplifier has a theoretical maximum efficiency
of ~50%, due to the designed operation of being always
ON.

FIGURE 1: CLASS D AMPLIFIER BLOCK DIAGRAM

VCC LPͲFilter VCC

Speaker

TriangularWave

AnalogAudio

AnalogAudio

 2016 Microchip Technology Inc. DS00002336A-page 1

AN2236
The input signal, triangular waveform, and comparator
(CMP) are used in combination to generate the PWM
signal, which is later amplified.
The duty cycle of the PWM is directly proportional to
the magnitude of the analog signal. As the magnitude
increases or decreases, the PWM duty cycle also
increases or decreases, equivalently. The resulting out-
put of the comparator is a PWM digital representation
of the original analog input signal. Figure 2
demonstrates this output.

FIGURE 2: PWM PROPORTIONAL TO ANALOG SIGNAL MAGNITUDE

When amplifying the PWM output, either a half- or full- provide an optimal performance using a 1st or 2nd order
bridge amplifying stage can be used. As shown in LC filter. In other cases, Class D amplifier applications
Figure 1, this application of a Class D amplifier is imple- can simply rely on the speaker’s coil capacitance and
mented using a full-bridge amplifying stage, which inductance to act as a LC low- pass filter. In many
means it differentially drives the speaker. A full-bridge cases, depending on the quality of audio needed in the
topology offers greater performance over a half-bridge application, the speaker itself is a sufficient low-pass
topology by lessening rail voltage fluctuations on the LC filter.
power supply, due to the energy being fed back into it
by the amplifier.
With a full-bridge stage, there are two complementary
half-bridge stages, thus either side provides a path to
ground. Consequently, less energy is fed back to the
power supply. In addition, a full-bridge can also be
helpful at canceling out DC offsets and harmonic distor-
tion. A full-bridge topology also offers an increase in
maximum power output versus a half-bridge topology
by producing twice the swing on the speaker, because
it is being driven differentially.
The filtering stage of Class D depends on how closely
the user wants to reproduce the original input analog
signal or audio signal. The trade-off is represented by
the number of components versus retaining the original
analog signal and the resulting quality of the audio out-
put. The recommended filter for a Class D amplifier is
a low-pass LC filter.
An LC filter has no internal resistance, so it is not wast-
ing energy – which can result in lower audio volume
and reduced efficiency. Many Class D amplifiers can

DS00002336A-page 2  2016 Microchip Technology Inc.

 AN2236
IMPLEMENTING A FULL-BRIDGE
CLASS D AUDIO AMPLIFIER USING A
PIC16(L)F1769
In order to implement the Class D amplifier in Figure 1,
a PIC16(L)F1769 MCU is used, featuring its CIPs and
other on-board peripherals. The following peripherals
are need:
• Master Synchronous Serial Port (MSSP)
• Digital to Analog Converter (5 and 10-bit DAC)
• Timer2 & Timer4
• Programmable Ramp Generator (PRG)
• Voltage Comparator (CMP)
• Complementary Output Generator (COG)
Figure 3 shows how these peripherals are used and
configured to create a full-bridge Class D audio
amplifier with audio playback using a PIC16(L)F1769
MCU.
In this application, the source of the audio is stored in
digital form in an external EEPROM, which is read back
via the MSSP. It is also possible to modify this applica-
tion to use the UART to stream digital data from a com-
puter to other sources. After the digital audio data is
received, it is converted into analog by feeding it
through the 10-bit DAC. This application can also easily
be modified to bypass the digital input method to pro-
vide an analog signal directly to the positive input of the
CMP.

FIGURE 3: PIC16(L)F1769 MCU FULL-BRIDGE CLASS D AUDIO AMPLIFIER WITH DIGITAL

SOURCE

MSSP DAC
EEPROM SPI/I2C 10Ͳbit Complementary
2 TC4427
SPI/I C OutputGenerator

Programmable
Ramp
Generator
(SquareWave)

Timer DAC
PWM
8Ͳbit 5Ͳbit PIC16F176X

 2016 Microchip Technology Inc. DS00002336A-page 3

AN2236
Figure 4 outlines the analog input method. In addition,
this example demonstrates how the internal opera-
tional amplifier can be used for gaining up the incoming
analog signal in an application that has a low amplitude
input signal.

FIGURE 4: PIC16(L)F1769 MCU FULL-BRIDGE CLASS D AUDIO AMPLIFIER WITH ANALOG

SOURCE

AnalogAudio
Complementary TC4427
OutputGenerator

Programmable
Ramp
Generator
(SquareWave)

Timer DAC
PWM
8Ͳbit 5Ͳbit PIC16F176X

The PRG is used to generate the required triangular

waveform. To do so, one PWM was used as the timing
source for the rise and falling edges of the PRG at a fre-
quency of 128 kHz. A single 5-bit DAC is used as the
voltage source for the PRG.
Before passing the data from the MSSP to the DAC, a
timing factor needs to be taken into account. Because
the audio data is stored in digital form, a certain sample
rate is associated with it. In this case, the data is stored
in RAW (header-less), unsigned, 8-bit form with a sam-
ple rate of 8000 Hz. To get the best representation of
the original analog signal and to playback the audio at
the correct speed, the digital audio data needs to be
read back from the EEPROM every 125 μs (1/8000Hz).
To adequately and easily read data from the EEPROM
every 125 µs, a TMR interrupt was implemented. The
overflow of the TMR interrupt triggers an EEPROM
read, and the retrieved byte is then passed to the DAC,
where it is converted to the appropriate analog level.
The analog level is then compared to the triangular
waveform via the CMP, resulting in a proportional duty
cycle of the PWM in relation to the analog level.
Given that this application makes use of a full-bridge
amplifier, a complementary PWM signal is required to
drive it. To generate these signals, the PWM signal is
passed through a COG which produces two comple-
mentary PWM signals. The complementary PWM sig-
nals are then passed to the full-bridge amplifier for
audio playback and amplification.

DS00002336A-page 4  2016 Microchip Technology Inc.

 AN2236
CONCLUSION
With the wide range of both analog and digital periph-
erals on the PIC16(L)F176X device, it provides a com-
plete solution to implement a full-bridge, Class D audio
amplifier on a PIC16F microcontroller.
This design quashes the need to use expensive exter-
nal active components. It also has been optimized to
reduce the number of external passive components
that are needed. This allows the user to implement a
cost-efficient, small and compact form factor,
full-bridge, Class D audio amplifier.

REFERENCES
For more information on how to use and configure the
modules mentioned in this application note, see the
following reference documents:
1. Interfacing Serial EEPROMs with 8-Bit PIC®
Microcontrollers (AN2045)
2. Complementary Output Generator Technical
Brief (TB3119)
3. Operational Amplifier Module of 8-Bit PIC®
Microcontrollers (TB3132)
4. Programmable Ramp Generator Technical Brief
(TB3140)
5. High Efficiency Solutions for Portable LED
Lighting (DS01427A)
6. PIC16(L)F1764/5/8/9 Data Sheet
(DS40001775)

 2016 Microchip Technology Inc. DS00002336A-page 5

 APPENDIX A: SCHEMATICS
DS00002336A-page 6

AN2236
FIGURE A-1: SCHEMATICS A

VDD U1 U2A
18 16
VDD RA0/AN0/Vref-/DAC1234REF-/DAC1234OUT1/C1IN0+/C3IN0+/ICSPDAT PGD PIC_LED1
15 2 7
RA1/AN1/VREF+/DAC1234REF+/C1234IN0-/ICSPCLK PGC COG1B SPK2
17 14
C1 C2 VSS RA2/AN2/ZCD/T0CKI/COG12IN/INT COG1A
1
0.1uF 0.010uF RA3/T6CKI/DSM12CH/MCLR/VPP MCLR
20 6 3
10V 25V RA4/AN3/T1G/SOSCO/DSM12CL/OSC2/CLKOUT TX SPK_VDD VDD GND
GND 19
0603 0603 RA5/T1CKI/T2CKI/SOSCI/CLCIN3/DSM12MOD/OSC1/CLKIN BOOST_EN
TC4427A
10 GND
RB4/AN10/OPA1IN0-/SDI/SDA SDO
9 U2B
RB5/AN11/OPA1IN0+/RX SDI
GND 8
RB6/C1IN1+/C3IN1+/SCL/SCK SCK
7 4 5
RB7/C2IN1-/C4IN1+/CK EEPROM_SS COG1A SPK1
TP1 13
RC0/AN4/C2IN0-/C4IN0+/T5CKI COG1B
12 6 3
GND RC1/AN5/C1234IN1-/T4CKI/CLCIN2 RX SPK_VDD VDD GND
11
TP LOOP Black TH RC2/AN6/OPA1OUT/OPA2IN1-/OPA2IN1+/C1IN2-/C2IN2-/RG1IN0/RG2IN1 RHEO_SS
4 TC4427A
RC3/AN7/OPA2OUT/ OPA1IN1-/OPA1IN1+/C1234IN3-/RG2IN0/RG1IN1/T5G/CLCIN0 SW3
3 GND
RC4/RG1R/RG2R/T3G/CLCIN1 SW2
2
RC5/RG1F/RG2F/T3CKI/CCP1 SW1
5 U2C
RC6/AN8/OPA2IN0-/SS HOLD
6 1 8
RC7/AN9/OPA2IN0+ WP NC NC
PIC16F1769-I/ML

LD1 6 3
R9 SPK_VDD VDD GND
J1
PIC_LED1 VDD
TC4427A
MCLR 430R
5 4 3 2 1

BLUE GND
VDD 0603 C3
GND 5% 0.1uF
PGD 10V
PGC 0603
VDD
HDR-2.54 Male 1x5 1 8
EEPROM_SS CS VCC
6 GND
SCK SCK
5 2
SDO SI SO SDI C4
3
WP WP 0.1uF
VDD 10V C5
7 4
HOLD HOLD VSS 0603
R1 U3 DNP
10k GND GND 25V
0603 0603
L1 L2
5% S1 SPK1 SPK2
SW1 10uH 10uH
TACT SPST

1
 2016 Microchip Technology Inc.

GND
C6 C7
0.47uF 0.47uF
VDD 25V SP1 25V
VDD 0805 0805
R2
10k R3 GND GND
0603 10k
5% S2 0603
5% S3
SW2
TACT SPST SW3
TACT SPST
GND
GND
 FIGURE A-2: SCHEMATICS B
 2016 Microchip Technology Inc.

R8

DNP
0603
L3 5% D1
SPK_VDD
4.7μH
PMEG2005EH,115
USB2.0 MICRO-B FEMALE R4
J2 U4 510k

1
VDD MCP1661 0805

SW
1 5%
VBUS
2 5 3
D- USB_D_N VDD VIN FB FBA
3
D+ USB_D_P C8
ID
4
C9 BOOST_EN
4
E
EN R5 10uF
5 DNP
GND 10uF 25V

D
GND
0603 FBB
25V 1206

GN
5%

G
0

1206

2
R6
GND 51k
0603
GND GND 5%

GND GND

GND
C10
VDD
0.1uF
10V C11
R7 GND 0.1uF
10k U5 0603
MCP4162 MSOP-8 10V
0603 VDD 16 13
VDD VSS U6 0603
1% 1 12
GP0 D+ USB_D_P
2 11 1 8
GP1 D- USB_D_N RHEO_SS CS VDD VDD
3 10 2 7
RST VUSB SCK SCK SDO SDI
4 9 3 6
TX UART RX SCL SDO SDI P0B FBA
5 8 4 5

AN2236
DS00002336A-page 7

RX UART TX SDA C12 VSS P0W FBB

6 7
GP2 GP3 4.7uF
10V
MCP2221-I/ML GND
0805

GND
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CERTIFIED BY DNV ISBN: 978-1-5224-1225-0

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 2016 Microchip Technology Inc. DS00002336A-page 7

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DS00002336A-page 8  2016 Microchip Technology Inc.

11/07/16