Article 1

Composite Sliding Mode Control of Phase Circulating Current 2

for the Parallel Three-Phase Inverter Systems 3

Weiqi Zhang1, Yanmin Wang1,*, Fengling Han2,* and Rebeca Yang2 4

1 School of Electrical Engineering and Automation, Harbin Institute of Technology, Harbin 150001, China; 5
23b906013@stu.hit.edu.cn(W.Z.) 6
2 Solar Energy Application Group (SEAL), RMIT University, Melbourne VIC 3001, Australia; re- 7
becca.yang@rmit.edu.au (R.Y.) 8
* Correspondence: wangyanmin@hit.edu.cn (Y.W.); fengling.han@rmit.edu.au (F.H.) 9

Abstract: The phase circulating current (PCC) of the parallel three-phase inverter systems dramati- 10
cally affects the power quality and conversion efficiency of the power grid. In this paper, a compo- 11
site suppression strategy is proposed to solve the PCC issue by using the sliding mode control 12
(SMC) approach and the improved virtual impedance droop control. Taking the commonly used 2- 13
group parallel three-phase inverter as an example, an inter- and intra- classification model is estab- 14
lished by analyzing the sources of PCC. In order to suppress the inter-PCC, the traditional virtual 15
impedance droop control is given, following the improved substitute by combining SMC. And the 16
variables of the bus voltage, Q-U loop, P-f loop and the virtual induced reactance are also introduced 17
for the robust control of the impedance droop. On the other side, a SMC-based suppression ap- 18
proach is designed to solve the issue of the intra-PCC. Its idea is to introduce a regulation factor for 19
the space vector pulse width modulation (SVPWM), so that the zero-sequence voltage can be elim- 20
inated and the influence of the intra-PCC can be relieved. Comparative simulations and experiments 21
validate the effectiveness of the methods proposed in this paper. 22

Keywords: parallel three-phase inverter; phase circulating current; sliding mode control; virtual 23
impedance droop control; composite control 24
25

1. Introduction 26
In recent years, continuous breakthroughs and innovations in power electronics tech- 27
nology have made the wide application of various renewable energies, such as solar, 28
Citation: To be added by editorial wind, and hydropower [1,2]. These new types of energy systems can generate, store, dis- 29
staff during production. tribute, and flexibly use clean energy sources, which differ from the traditional energy 30
systems that only interact with the power grid. The power converters are the essential 31
Academic Editor: Firstname Last-
name
components of renewable energy systems, which play a crucial role in their practical ap- 32
plications. Despite the advantages of simple structure, reliable operation and high flexi- 33
Received: date bility, some key issues arise and hinder the practical applications of power converters, 34
Revised: date
such as the multi-level voltage regulation, AC/DC conversion, power transmission limi- 35
Accepted: date
tation and power quality [3,4]. 36
Published: date
In this paper, we take the parallel three-phase inverter as an example for investiga- 37
tion. As the power hub on the grid side, it is a core device of the renewable energy system, 38
whose function is to guarantee the stability of the output voltage and frequency [5]. How- 39
Copyright: © 2024 by the authors. ever, with the increasing demand of power capacity for both sides of energy generation 40
Submitted for possible open access
and the AC grid, the traditional single inverter can not meet the requirements of energy 41
publication under the terms and con-
conversion. As an alternative solution, various types of parallel three-phase inverters 42
ditions of the Creative Commons At-
have been adopted. The structure of a multi-phase can keep the balance of the input 43
tribution (CC BY) license (https://cre-
power distribution between the links. And they can also guarantee reliable operation and 44
ativecommons.org/licenses/by/4.0/).
reduce costs [6,7]. 45

Energies 2024, 17, x. https://doi.org/10.3390/xxxxx www.mdpi.com/journal/energies

Energies 2024, 17, x FOR PEER REVIEW 2 of 27

For the parallel three-phase inverters, the parallel structure can inevitably generate 46
the inter- and intra-circulating currents in case of high-power input, due to the incon- 47
sistent parameters and operations of the individual inverters [8]. It is the so-called issue 48
of phase circulating current (PCC), which can reduce the conversion efficiency, produce 49
serious oscillations, or even destory the system stability [9]. Therefore, more and more 50
researchers focus on the issue of PCC, and many suppression approaches have been pro- 51
posed for the parallel three-phase inverters, including droop control [10], fuzzy control 52
[11], neural network control [12], predictive control [13], adaptive control [14], sliding 53
mode control [15], and so on. 54
At present, the droop control is commonly used for the PCC suppression of the par- 55
allel three-phase inverters. Its idea is mainly based on the elimination of voltage differ- 56
ences for the individual inverter by combining the voltage shifting control and the load 57
current feed-forward predictive control [16]. But it suffers from slow response and exter- 58
nal disturbances. In order to improve its control performance, a virtual impedance droop 59
control approach was proposed in [17]. Its idea is to introduce a reactive power feedback 60
term into the virtual impedance, so that the influence of line impedance on the output 61
reactive power distribution of parallel systems can be eliminated. However, it should be 62
noted that, although the inter-PCC can be effectively suppressed, it ignores the impact of 63
active power allocation on the inter-PCC, and the adjustment of dynamic virtual imped- 64
ance depends on line impedance measurement, leading to large steady errors in the con- 65
trol loop. In [18], a composite control approach was proposed by using the concept of 66
equivalent feeders to solve the inter-PCC problem caused by the impedance mismatch of 67
external feeders in parallel three-phase inverter systems. And the traditional PI controller 68
was designed on the premise of equivalent line parameters at the price of low precision 69
and bad robustness. In [19], a low-frequency intra-PCC suppression approach was pro- 70
posed to solve the influence of intra-PCC by using the space vector pulse width modula- 71
tion (SVPWM). Although the dead time was considered and the mechanism of the intra- 72
PCC was analyzed, the conduction time of inverters between different links depended on 73
the high-frequency measurement, this limits its practical applications. In [20], an inte- 74
grated modulation method was proposed to suppress the intra-PCC of the system, it di- 75
vides the intra-PCC into two regions based on the magnitude of the voltage vector, which 76
reduces the intra-PCC effectively without lowering the modulation factor at the cost of 77
capturing the current synthesized voltage state. However, this method does not apply to 78
the case of high-frequency switching. In [21], a dynamic model of a parallel inverter sys- 79
tem was proposed, and a composite controller was designed by combining an adaptive 80
fuzzy neural network and sliding mode control (SMC) to eliminate inter-PCC. Due to the 81
robustness and the natural adaptability of SMC with the switching characteristics of in- 82
verters, better dynamic and static performances could be achieved compared with the 83
performance of other schemes. However, the four-layer fuzzy neural network was too 84
complicated and unsuitable for practical applications. Existing reseaerhes focus on either 85
the intra-PCC or the inter-PCC, only a few considers the suppression of both the inter- 86
PCC and the intra-PCC simultaneously. 87
Based on the above analysis, this paper takes the commonly used parallel three-phase 88
inverter as an example and innovatively establishes an inter- and intra- classification 89
model. A composite SMC strategy is proposed to suppress both the intra-PCC and the 90
inter-PCC simultaneously. To be specific, the main contributions of this paper can be con- 91
cluded as follows: 92
⚫ An inter- and intra- classification model is proposed for the parallel three-phase in- 93
verter; 94
⚫ In order to suppress the inter-PCC, an improved virtual impedance droop control 95
approach is proposed by introducing SMC for the control of bus voltage, Q-U loop, 96
P-f loop and the virtual induced reactance; 97
⚫ In order to suppress the intra-PCC, a SMC-based approach is proposed by introduc- 98
ing a regulation factor for SVPWM to eliminate the zero-sequence voltage. 99
Energies 2024, 17, x FOR PEER REVIEW 3 of 27

This paper is organized as follows. In Section 2, the inter- and intra- classification 100
model of the parallel three-phase inverter is established. In Section 3, the traditional vir- 101
tual impedance droop control approach is discussed, based on which the improved 102
methdologies by designing SMC controllers for bus voltage, Q-U loop, P-f loop and the 103
virtual induced reactance are presented. In Section 4, a SMC-based approach is proposed 104
for suppressing intra-PCC. Finally, the simulations, experiments and concluding remarks 105
are given in Sections 5 and 6, respectively. 106

2. Inter- and Intra- Classification Model of the Parallel Three-Phase Inverter 107
In this paper, we take the typical 2-group parallel three-phase inverter as an example 108
to investigate the issue of PCC, as shown in Figure 1. 109

Inverter-1
Ls1
LCL filter Transmission line AC load
T11 T31 T51
ua1 iLa1 uCa1 ioa1 usa1
A1 Lfa11 Lfa12 Rla1 Lla1 isa
C01 ub1 iLb1 uCb1 iob1 usb1
B1 Lfb11 N
Lfb12 Rlb1 Llb1 isb
u iLc1 uCc1 ioc1 usc1
C1 c1 L
fc11 Lfc12 Rlc1 Llc1 isc
iCa1 iCb1 iCc1
T41 T61 T21
Cfa1 Cfb1 Cfc1
N
+
Udc _ Inverter-2
Ls2

T12 T32 T52

ua2 iLa2 uCa2 ioa2
A2 Lfa21 Lfa22 R Lla2 usa2
la2
C02 ub2 iLb2 uCb2 iob2
B2 Lfb21 Lfb22 R Llb2 usb2
lb2
u c2 iLc2 uCc2 ioc2
C2 Lfc21 usc2
Lfc22 Rlc2 Llc2
iCa2 iCb2 iCc2
T42 T62 T22
Cfa2 Cfb2 Cfc2
N N 110
Figure 1. Circuit topology of the typical 2-group parallel three-phase inverter. 111

For the parallel three-phase inverter in Figure 1, an inter- and intra- classification 112
model is proposed first. In the following, the sub-models of inter-PCC and intra-PCC are 113
given, respectively. 114

2.1. Sub-model of the Inter-PCC 115

For the typical 2-group parallel three-phase inverter in Figure 1, we assume that the 116
AC loads in the phases of a, b and c are the same, so that the two inverters are equivalent 117
to an AC voltage source with internal resistance [22]. Therefore, Figure 1 can be simplified 118
into the equivalent inter-PCC circuit in Figure 2, where U m is the output voltage for each 119
group inverter, m=1,2; Um and θm represent its amplitude and phase angle, respectively; 120
U o is the load voltage with assumption that, its phase angle θm is equal to zero in case of 121
pure resistive load; ZL is the load impedance and I o is the current; I c is the inter-PCC of 122
the parallel inverter system. And for the individual, Zem is the equivalent output imped- 123
ance, Zlm is the equal impedance of the transmission line and I om is the output current, I cm 124
is the inter-PCC. 125
Energies 2024, 17, x FOR PEER REVIEW 4 of 27

Zo1 Zo2
Ze1 Zl1 I c1 Ic2 Zl2 Ze2

I o1 Io Ic Io Io2
2 2
+ + +
U1 Uo Io U2
(Uo 0) _
_ (U θ )
1 1 2ZL 2ZL (U2 θ2) _
ZL

Inverter-1 Inverter-2 126

Figure 2. Equivalent inter-PCC model of Figure 1. 127

For the equivalent inter-PCC model in Figure 2, we define Zom=Zem+Zlm, and then the 128
steady current can be deduced on the basis of Kirchhoff's circuit law as 129

U1 − Zo1 I o1 = Uo

U2 − Zo 2 I o 2 = Uo (1) 130
I + I = I = U / Z
 o1 o 2 o o L

For convenience, it can be considered that Zo1=Zo2 in the parallel system, i.e., Zeq1=Zeq2, 131
Zlm1=Zlm2. From (1), the currents I o1 and I o 2 can be represented as: 132

 Uo U1 − U2 I0 ΔU
 I o1 = + = +
 2 ZL 2Zo1 2 2Zo1
 (2) 133
I = o − 1U U − U I ΔU
2
= 0−
 o 2 2Z 2 Z 2 2 Zo1
 L o1

where U represents the voltage difference of U1 and U 2 . 134

From (2), we can see that the output current of the individual inverter consists of two 135
parts, i.e., the shared current and the inter-PCC. Therefore, the inter-PCC can be expressed 136
as: 137
I −I U − U2 ΔU
I c = o1 o 2 = 1 = (3) 138
2 2Zo1 2Zo1
It should be noted that, since the inter-PCC I c in (3) is produced by the voltage dif- 139
ference U, where the individual parallelled inverter is affected by the equivalent output 140
impedance Zem and the equal impedance of the transmission line Zlm simultaneously. 141
Meanwhile, for the individual inverter in Figure 1, it is difficult to eliminate the correlation 142
for the filter parameters, controller types and parameters only by the voltage difference 143
U [23]. Therefore, an alternative approach is necessary in this paper. From (3), it is a fact 144

that the total inter-PCC I c of the parallel system can be assigned in accordance with the 145
capacity ratio for the individual inverter. Here, we define km as the capacity proportional 146
coefficient of the m-group inverter, Sm as the capacity of the m-group inverter, km=Sm/∑Si, 147
i=1,2. Therefore, the inter-PCC, I cm , for the corresponding m-group inverter can be de- 148
noted as 149

Icm = Iom − km Io
150

By setting I cm =0, we can further get 151

Sm = kmSL

 Pm = km PL (4) 152
Q = k Q
 m m L
Energies 2024, 17, x FOR PEER REVIEW 5 of 27

where SL, PL and QL are the load capacity, active and reactive power, respectively. Obvi- 153
ously, if the inter-PCC of the individual inverter is 0, the load power can be assigned ac- 154
cording to the capacity ratio of each parallel inverter; otherwise, if the load power relies 155
on the parallel system, the suppression of the inter-PCC can only be solved indirectly. 156

2.2. Sub-model of the Intra-PCC 157

In the following, we continue to deduce the sub-model of the intra-PCC. Since the 158
type of the parallel inverter shares a common DC bus, if the problem of the short circuit 159
occurs in the parallel line, or in the case of the asymmetric on/off for the corresponding 160
phase power tubes of the individual inverter due to some external disturbances, the equal 161
intra-PCC model can be obtained from Figure 1 as Figure 3, where Udc is the DC input 162
voltage, Lsm and C0m are the inductance and capacitance of the main circuit of the inverter, 163
m=1,2; Tnm is the power transistor, n=1,2,...,6; ukm is the main circuit output voltage; Lfk1m 164
and Lfk2m are filter inductors, Cfkm is filter capacitance, iLkm and iCkm are the voltage and cur- 165
rent; uCkm and iokm are the output voltage and current of the individual inverter; Rlkm and 166
Llkm are the transmission line resistance and inductance; uskm and isk are the voltage and 167
current of AC bus, N is the three-phase midpoint; Us is the voltage amplitude of the AC 168
side. 169

Phase A
Inverter-1
T11 T13 T15 Us 0
Lfa11 Lfa12 Rla1 Lla1
ua1 iLa1 uCa1 ioa1 usa1 isa1
A1
+ Lfb11 Lfb12 Llb1
ub1 iLb1 uCb1 iob1 Rlb1 usb1 isb1
B1
Lfc11 Lfc12 Llc1
iLc1 uCc1 ioc1 Rlc1 usc1 isc1
C1 uc1
Cfb1
Cfa1

Cfc1

T14 T16 T12

+
Udc
_
uz Inverter-2 iz uoN

T21 T23 T25

_ Lfa21 Lfa22 Lla2 u isa2
ua2 iLa2 uCa2 ioa2 Rla2 sa2
A2
Lfb21 Lfb22 Llb2 u
ub2 iLb2 uCb2 iob2 Rlb2 sb2 isb2
B2
Lfc21 Lfc22 Llc2 u
iLc2 uCc2 ioc2 Rlc2 isc2
C2 uc2
sc2
Cfa2
Cfb2
Cfc2

T24 T26 T22

170
Figure 3. Equivalent intra-PCC model of Figure 1. 171

In Figure 3, we take the Phase A of the two inverters as an example. The current flow 172
is marked in a red dotted line. When the power transistors T11 and T24 at the corresponding 173
link of two inverters are turned on and off asynchronously, the voltage of Point A1 will be 174
higher than that of Point A2, so that a zero-sequence voltage (ZSV) is produced, i.e., uz. 175
Furthermore, if uz acts on the impedance of the transmission line, the zero-sequence cur- 176
rent iz will be generated, which is the intra-PCC. 177
From Figure 3, the current of the 2-group three-phase parallel inverter izm can be de- 178
noted as 179


izm =


iokm
(5) 180
i z = i z 1 = − i z 2

Energies 2024, 17, x FOR PEER REVIEW 6 of 27

where iokm represents the output currents of the three-phase m-group parallel inverter, 181
m=1,2, k=a, b, c. 182
Based on the energy conservation principle, we can see from (5) that the currents iz1 183
and iz2 have the same value but with the opposite direction for the 2-group parallel inverter. 184
Meanwhile, the generation of izm indicates the fact that the sum of the duty cycles of the 185
three-phase parallel inverter system in Figure 3 can not be zero. Therefore, we further 186
define dam, dbm and dcm as the duty cycle for the three-phase abc of the m-group parallel 187
inverter, and the zero-sequence duty cycle (ZSDC) of the m-group parallel inverter as 188
dzm=dam+dbm+dcm, m=1,2. 189
In Figure 3, since the filtering capacitors Cfam, Cfbm and Cfcm are not in the PCC path, 190
the ZSV equation for the 2-group three-phase parallel inverter can deduced on the basis 191
of Kirchhoff's circuit law as 192

(L fkm1 + L fkm 2 + Llkm ) ddi t

zm
= − Rlkm izm − usk − uoN + dzmUdc (6) 193

whereUzm=dzmUdc represents the ZSV of the m-group inverter, m=1,2, k=a, b, c. 194
Here Lekm=Lfkm1+Lfkm2+Llkm, Lebm=Lfbm1+Lfbm2+Llbm, Lecm=Lfcm1+Lfcm2+Llcm is defined as the 195
equivalent inductances of the three-phase abc for the m-group parallel inverter, m=1,2. 196
Therefore, by using the Laplace transform, the intra-PCC iz can be deduced by comparing 197
the two inverters in (6) as 198

dz1 ( s ) − dz 2 ( s )  Udc uz1 ( s ) − uz 2 ( s )

iz ( s ) = =
(L ) R
2 2 2 2

m =1
fkm1 + L fkm 2 + Llkm s +
m =1
lkm L
m =1
em s+ R
m =1
lkm
(7) 199

which gives the key points concerning the issue of intra-PCC by eliminating ZSV between 200
the corresponding phases. 201
By combining the inter-PCC expression in (2) and the intra-PCC expression in (7), we 202
can see that they are both related to the corresponding voltage difference for the individ- 203
ual equivalent models in Figure 2 and Figure 3. It also points out the way to solve the 204
inter-PCC and the intra-PCC by voltage compensation at the same time. Specific for the 205
former, since the voltage difference of the inter-PCC in (2) is related to the equivalent out- 206
put impedance of each paralleled inverter to the AC load side, it is possible to compensate 207
for the inter-phase power difference by the accurate power distribution to ensure the bal- 208
ance of the equivalent output impedance for the two parallel inverters. As a result, the 209
issue of the inter-PCC can be solved. While for the intra-PCC, its idea is on the basis of the 210
voltage difference between the inverter bridges in (7). And the issue of the intra-PCC can 211
be solved by eliminating ZSV indirectly. 212
Based on the above analysis, the PCC suppression approaches are designed for the 213
inter-PCC sub-model in (2) and the intra-PCC sub-model in (7) respectively in the follow- 214
ing. 215

3. Inter-PCC Suppression Control 216

Based on the established inter-PCC sub-model in (2), the traditional virtual imped- 217
ance droop control approach is given, following the improved substitute by combining 218
SMC. 219

3.1.Traditional Virtual Impedance Droop Control 220

At present, the virtual impedance droop control is widely used for the PCC suppres- 221
sion. It arises on the basis of the droop control approach and the control block diagram, 222
as shown in Figure 4, where UQm and fPm are the output voltage and frequency of the two 223
droop control loops, respectively; δm is the droop loop output angular frequency; udmref and 224
Energies 2024, 17, x FOR PEER REVIEW 7 of 27

uqmref are the output voltage of the voltage-current double closed-loop control system in d- 225
q axis, respectively; uvm is the virtual impedance voltage, umref and umref' are the droop loop 226
output reference voltages before and after subtracting uvm, respectively; uskm and iskm are 227
respectively the output voltage and current of the m-group parallel inverter. 228

229

Q-U droop control loop

QNm UN
uskm _ UQm +
Qm Um
Nm _
+ Reference umref umref'
Power P-f droop control loop voltage
iskm calculation fPm_ + _
Pm + fm 2 δm synthesis uvm
Mm abc/dq
_ s
AC load PNm +
udmref uqmref
side fN
Voltage-current
isk c control
s Lvm
s + c
Virtual impedance 230

Figure 4. Control block diagram of the traditional virtual impedance droop control. 231

The difference between the droop control approach and the virtual impedance droop 232
control lies in the virtual impedance in Figure 4. Traditional droop control approach is to 233
predefine the proportion of the total load capacity for each parallel inverter, which is used 234
for the regulation or the compensation of the output for the three-phase inverters. Since 235
the output voltage frequency of the inverter is only determined by the modulation tech- 236
nology, the active control is introduced for the power distribution of the loads actively in 237
accordance with their frequency characteristics [24]. Therefore, for the three-phase m- 238
group parallel inverter, m=1,2, the relationship between the reactive power and the volt- 239
age can be obtained: 240

 fm = fN − Mm ( Pm − PNm )

 (8) 241
Um = U N − Nm ( Qm − QNm )


where fN, UN, PNm, and QNm are the rated output frequency, voltage, active and reactive 242
power for the individual inverter, m=1,2; fm, Um, Pm, and Qm are the actual output fre- 243
quency, voltage, active and reactive power of the m-group parallel inverter; Mm and Nm 244
represent the frequency and voltage droop coefficient of the parallel inverter, which are 245
inversely proportional to the capacity of the individual inverter [25]. 246
For (8), if the three-phase parallel inverter system works steady, the output fre- 247
quency of the individual inverter can be equalized by using the same modulation technol- 248
ogy [26]. And the active power of the loads can be distributed in accordance with the 249
droop coefficient Mm in (8). Meanwhile, due to the difference between the output imped- 250
ance and line transmission impedance, it is impossible to guarantee the output voltage of 251
the individual inverter is equal; and the load reactive power cannot be accurately distrib- 252
uted in accordance with the voltage droop coefficient Nm in (8). However, it should be 253
noted that, the traditional droop control relies on the inductive resistance of the transmis- 254
sion line, i.e., if the resistance value is much larger than the inductive impedance, oscilla- 255
tions will occur inevitably, which leads to an unstable system. 256
While for the virtual impedance droop control, the power transmission with added 257
virtual impedance is shown in Figure 5, it can be obtained from Figure 4, where U m and 258

I om are respectively the output voltage and current of the inverter, m=1,2, and θm is the 259
voltage difference angle; Zom is the equivalent output impedance of the inverter; jXem is the 260
Energies 2024, 17, x FOR PEER REVIEW 8 of 27

total equivalent output impedance for the m-group parallel inverter; Xvm is the virtual re- 261
actance; Lvm is the virtual inductance; Sm is the output power of the individual inverter to 262
the AC bus, Pm and Qm represent the active and reactive components, respectively; Zlm is 263
the transmission line impedance. 264
AC Bus
jXe1
Inverter-1
I o1

Zo1 jXv1 S1 = P1 + jQ1 Zl1

U1 (U11 )

U s (U s 0 )
jXe2
Inverter-2
Io2

Zo2 jXv2 S2 = P2 + jQ2 Zl2

U 2 (U 2  2 )

265

Figure 5. Power transmission of the traditional virtual impedance droop control. 266

For the virtual impedance droop control in Figure 5, it has a series connection be- 267
tween the virtual impedance and the actual output impedance for the three-phase parallel 268
inverter system [27]. In other words, by subtracting an appropriate and fixed value of the 269
impedance voltage drop from the output voltage of the Q-U droop control loop, the resis- 270
tive effect of the transmission line can be removed. 271

Based on the virtual impedance droop control and Figure 5, the output power for the three-phase 272
m-group parallel inverter system to the AC bus can be expressed as 273

 UsUm sin θm
 Pm =
 Xem
 (9) 274
Q = UmUs cos θm − Us
2

 m Xem

Considering the added virtual impedances, we substitute (8) into (9), yielding the 275
reactive power as 276

Un cos θm − Us
Qm = (10) 277
X
Nm cos θm + em
Us

In order to realize the distribution of the reactive power for the loads by adjusting 278
the voltage droop coefficient Nm in (8), i.e., N1Q1=N2Q2, the condition U1=U2 needs to be 279
satisfied. Therefore, from (10), the voltage difference ΔU can be calculated as 280

U = U 2 − U1
U cos θ1 − U s Un cos θ2 − U s
= n − (11) 281
Xe 1 Xe 2
cos θ1 + cos θ2 +
N1U s N 2U s

In order to realize the PCC suppression by using the virtual impedance droop control, 282

the following conditions need to be satisfied by setting ΔU=0 in (11) as 283

⚫ The total equivalent output inductance Xem needs to be proportional to Nm; 284
⚫ The phase angle of the output voltage θm is the same for the contained parallel invert- 285
ers. 286
Energies 2024, 17, x FOR PEER REVIEW 9 of 27

3.2. Improved Virtual Impedance Droop Control 287

Based on the above virtual impedance droop control in Figure 4, this paper improves 288
its control performances by using SMC. The control diagram is illustrated in Figure 6, 289
where Us' and fs' are the voltage amplitude and frequency of the controller output, isa and 290
ioam are the currents of the A-phase inverter output and of the grid, RMS represent the root 291
mean square measurement. 292

RMS 2
+ US Voltage-current
UN
_ controller
Bus voltage
Q-U loop controller
controller SMC udmref uqmref
QNm_ Us' abc/dq
usk UQm + Um
Qm
Nm _ SMC
+ Reference umref
Power umref'
voltage
isk calculation fPm_ + _
Pm + fm 2 δm synthesis u
vm
Mm
_ s
PNm +
AC load side
fs + fs' P-f loop
SMC
_ controller
fN
isa _ Lvm c
SMC s Lvm
Adaptive virtual
1/n
+ s + c
impedance ioam
controller 293

Figure 6. Control block diagram of the improved virtual impedance droop control. 294

Compared with the traditional virtual impedance droop control in Figure 4, we can 295
see that, the improvements of the proposed approach in this paper lie on the design of the 296
four parts, i.e., bus voltage controller, Q-U loop controller, P-f loop controller and adaptive 297
virtual impedance controller, where SMC is adopted. Specifically, the bus voltage control- 298
ler is for the control of Us to follow the rated value UN stably; the Q-U loop controller is to 299
reduce the impact of the output impedance and transmission line impedance on the reac- 300
tive power distribution, as well as to improve the response speed of the system; the P-f 301
loop controller is to regulate the voltage frequency fs of the AC bus in accordance to the 302
rated frequency fN; the adaptive virtual impedance controller is designed to overcome the 303
possible external disturbances and parameter perturbations during the transmission pro- 304
cess. 305
In the following, SMC is utilized for the controller design for the bus voltage, Q-U 306
loop, P-f loop and adaptive virtual impedance, respectively. 307
3.2.1. Design of the Bus Voltage Controller 308
From Figure 6, the function of the bus voltage controller is to drive the bus voltage 309
Us to follow the rated value UN stably. Therefore, we define a deviation variable xU as 310

xU = Us − UN (12) 311

Based on the principle of SMC, the design of a SMC controller generally includes a 312
sliding surface and a robust control law [28]. Therefore, from (12), the commonly used 313
linear sliding mode controller is adopted for the design of sliding surface SU 314


SU = cU 1 xU + xU + cU 2 xU dx

 (13) 315
uU = − sgn ( SU )


where cU1>0 is a proportional adjustment parameter for changing the response speed; cU2>0 316
is the coefficient of an integral term which is used to eliminate the static error of the system. 317
Energies 2024, 17, x FOR PEER REVIEW 10 of 27

In this paper, the exponential reaching law is adopted for the design of the robust 318
control law, i.e., it has 319

SU = εU uU − kU SU = −εU sgn ( SU ) − kU SU (14) 320

where the design parameters εU>0 and kU>0 can be deduced by the existence condition of 321
SMC, i.e., SU=0. And the convergence time tU can also be obtained as 322

1 kU SU ( 0 ) sgn SU ( 0 )  + εU
tU = ln (15) 323
kU εU

where SU(0) is the initial value of the sliding variable SU. 324
From (15), we can see that, the convergence time tU is determined by the design pa- 325
rameters εU, kU in (14) and the initial point SU(0) at the same time. Obviously, the bigger the 326
parameters εU and kU are, the smaller the convergence time tU is; the larger SU(0) is, the 327
bigger the convergence time tU is. In Figure 7, the relationship of the parameters of εU, kU, 328
SU(0) and the convergence time tU are shown in phase plane SU- SU . 329

800 S U

600

400

200

-2 xU -1 0 1 2 SU
SU(0)
-200

-400

-600
xU
0

SU=0
-800 ( S ( 0) , S ( 0))
U U
−kUSU

330
Figure 7. Relationship of εU, kU, SU(0) and the convergence time tU in the phase plane SU- SU . 331

From Figure 7, since the design parameters εU and kU in (14) determine the conver- 332
gence time of the system to the equilibrium point SU=0, i.e., if SU(0) is initially big, it devi- 333
ates far from SU=0, and the term −kUSU in (15) will accelerate the system convergence; while 334
as the system reaches around SU=0, the term of −kUSU becomes very small. At this time, 335
−εUsgn(SU) ensures that the voltage state switches up and down continuously along SU=0 336
at a constant speed εU, this ensures that it reaches a steady-state within a finite time. How- 337
ever, it should be noted that, since εU determines the ultimate speed at which the voltage 338
state switches at SU=0, the value of εU also affects the chattering situation of the SMC sys- 339
tem, and this item should be appropriately small. 340
In order to analyze the stability of the bus voltage control system by using SMC, we 341
choose a Lyapunov equation VU=0.5SU2, by substituting (14), it yields 342

VU = SU SU = −SU εU sgn ( SU ) + kU SU  = −εU SU − kU SU2  0

(16) 343

which indicates the finite time convergence of the bus voltage control system. 344
3.2.2. Design of the Q-U Loop Controller 345
For the Q-U loop controller, its function is to reduce the impact of the output imped- 346
ance and transmission line impedance on the reactive power distribution, as well as to 347
Energies 2024, 17, x FOR PEER REVIEW 11 of 27

improve the response speed of the system. In other words, the output value Us' needs to 348
track the reference value of the Q-U loop UQm. Therefore, we define an error variable xE as 349

xE = Us − UQm (17) 350

Similar to the SMC design for the voltage control system in (12)-(14), the sliding sur- 351
face SE and the robust control law are designed as 352




SE = cE1 xE + xE + cE 2 xE dx
(18) 353
uE = − sgn ( SE )


SE = εE uE − kESE SE = −εE sgn ( SE ) − kESE SE (19) 354

where the design parameters cE1>0, cE2>0, εE>0, kE>0. 355

Furthermore, the Lyapunov equation VE=0.5SE2 is constructed to verify the stability 356
of the Q-U Loop control system. Taking the derivative of VE and substituting (19) into it, 357
we can get 358

( )
VE = SESE = −SE εE sgn ( SE ) + kESE SE = −εE SE − kESE 2 SE  0
(20) 359

which also indicates the finite time convergence of the Q-U loop. 360
Similar to the analysis of the convergence characteristics in Figure 7, we can get the 361
trajectory in phase plane SE- SE in Figure 8, where the red solid line represents the improved 362
reaching law in (20), and the blue broken line represents the traditional exponential reach- 363
ing law similar as (14). 364

SE
50 S E= εsgn(SE) KSE
40 S E= εsgn(SE) K|SE|SE

30
20
A
10

0 SE
-10
B
-20
-30
-40
-50 365
Figure 8. Comparison of the control law in phase plane SE- SE . 366

In Figure 8, the trajectories at Point A (−1, 11) and Point B (1, −11) correspond to the 367
intersection of two different control laws, where the design parameters in (18) and (19) 368
are selected as εE=1 and kE=10. It indicates that, when the initial voltage state (SE(0), SE (0)) 369
exceeds the hidden area enclosed by the state curves of Point A and Point B, the response 370
speed of the improved approach law will be faster than that of the traditional approach 371
law, which corresponds precisely to the initial characteristics of the Q-U loop. Further- 372
more, from (8), the output voltage amplitude of the parallel inverter system is around 373
311V, i.e., the amplitude of Us' will be much larger than the value of the term Nm(Qm−QNm), 374
which will cause the initial voltage state SE(0) of the Q-U loop output to deviate signifi- 375
cantly from the origin. Due to the improved approaching law in (20), the voltage state will 376
Energies 2024, 17, x FOR PEER REVIEW 12 of 27

have a prompt and high approaching speed in an instant, that is, SE (0) will suddenly in- 377
crease. It is proved that the improvement is more suitable for designing Q-U control loop 378
output voltage rapid response. However, it is worth noting that such improvements, to 379
some extent, sacrifice the robustness of SMC near the origin, so it needs to be judged based 380
on the actual needs of different controllers. 381
Finally, by substituting the control parameters from (18) and (19) into (8), and using 382
the Laplace transform, the Q-U loop control system can be rewritten in the frequency do- 383
main as 384

 c   c  

Um ( s ) =  cE1 + E 2   cE1 + E 2  Us ( s ) − U N ( s )  − Nm Qm ( s ) − QNm ( s )  
 s   s  
 (21) 385

3.2.3. Design of the P-f Loop Controller 386

For the P-f loop controller, it is to regulate the voltage frequency fs of the AC bus in 387
accordance with the rated frequency fN. Therefore, we define an error variable xf as 388

x f = fs − f N (22) 389

Similar to the SMC design for the voltage control system in (12)-(14), the sliding sur- 390
face Sf and the robust control law uf are designed as 391

S = c x + x + c
 f

f1 f f f 2 x f dx  (23)
( )
392
u = − sgn S f
 f

( )
S f = ε f u f − k f S f = −ε f sgn S f − k f S f (24) 393

where the design parameters cf1>0, cf2>0, εf >0, kf >0. 394

Similar to the Laplace transform in (21), the P-f loop control system can be rewritten 395
in the frequency domain as 396

 cf 2 
fm ( s ) =  c f 1 +   fs ( s ) − fN ( s )  − Mm  Pm ( s ) − PNm ( s )
 s 
  (25) 397

The stability analysis is as the same as (14), it is ignored here. By combining (21) and 398
(25), if the P-f loop control system works steadily, the input of the individual inverter’s 399
integrators in (21) and (25) approximate to zero [29]. Therefore, it has 400

 M ΔP =c Δf + c t
 m m f1 s

f 2 0 Δfs dt  (26) 401
t
 Nm ΔQm =cE1ΔUs + cE 2 ΔUs dt
 0 
where ΔPm=PmPNm, ΔQm=QmQNm, Δfs=fsfN, ΔUs=UsUN, m=1,2. 402
In order to guarantee the parallel inverter system works stably, it is only necessary 403
to set the control parameters cf1, cf2, cE1 and cE2 of the individual inverter in (26) as the same. 404
Therefore, it has 405

 M1ΔP1 =M2 ΔP2

 (27) 406
 N1ΔQ1 =N 2 ΔQ2
which ensures the precise distribution of load power in parallel inverter systems. 407
From Figure 6, it is worth noting that the voltage error of RMS, defined as ΔUsm', can 408
affect the accuracy of load reactive power allocation. Therefore, the reactive power error 409
ΔQm' can be deduced as 410
Energies 2024, 17, x FOR PEER REVIEW 13 of 27

t
cE1ΔUsm' + cE 2  ΔU
'
sm dt
' 0
ΔQ = m
(28) 411
Mm

Specifically, for the 2-group parallel three-phase inverter system, the reactive power 412
error eQ produced by RMS error ΔUs'=M1ΔUs1'−M2ΔUs2' can be expressed as 413

t
eQ = ΔQ1 − ΔQ2 = cE1ΔU s' + cE 2  ΔU
'
s dt (29) 414
0

3.2.4. Design of the Adaptive Virtual Impedance Controller 415

For the adaptive virtual impedance controller, its function is to overcome the external 416
disturbances and parameter perturbations during the transmission process incurred by 417
the inductive reactance Xvm. In this paper, an adaptive Xvm regulator is designed based on 418
the difference between the output current iokm for the single-phase inverter and grid cur- 419
rent isk, where m=1,2, k=a, b, c. Therefore, we define an error variable xc as 420

xc = iokm − isk (30) 421

Similar as the SMC design for the voltage control system in (12)-(14), the sliding sur- 422
face Sc and the robust control law uc are designed as 423




Sc = cc1 xc + xc + cc 2 xc dx
(31) 424
uc = − sgn ( Sc )


Sc = εc uc − kc Sc = −εc sgn ( Sc ) − kc Sc (32) 425

where the design parameters cc1>0, cc2>0, εc >0, kc>0. 426

In practice, when the virtual inductance Xvm is adjusted to an appropriate value, the 427
reactance component in the equivalent line impedance can guarantee the ideal droop con- 428
trol at the expense of aggravating the output voltage drop of the inverter system, causing 429
the offset of the AC bus voltage Us. Meanwhile, from (31), the inherent chattering issue of 430
SMC also affects the reference voltage Usʹ. Therefore, it is necessary to limit the virtual 431
impedance value of the controller output based on the voltage drop generated by Xvm. 432
Furthermore, from Figure 5, if the system works steady, the output voltage of the inverter 433
system is equal to the rated reference voltage, i.e., Uom=UN. Therefore, the vector of the 434
voltage drop caused by Xvm can be illustrated in Figure 9 [30], where UQm is the output 435
voltage of the Q-U loop in Figure 6; Umref' is the given reference voltage of the droop loop 436
after adding Xvm; Uvm is the voltage drop generated on Xvm; ψ is the phase difference be- 437
tween Urefm and UQm after adding Xvm. 438

ΔUvm

UQm
Uvm
sinψUvm
ψ
Umref'
439
Figure 9. The vector analysis of the voltage drop caused by Xvm. 440

In Figure 9, since Uvm can be decomposed into ΔUvm and sinψUvm along the direction 441
of UQm, Uvm≈ΔUvm holds approximately due to the small value of ψ. Since Xvm can incur an 442
inductive equivalent impedance of the transmission line, to simplify the analysis, Xvm can 443
only affect the output reactive power Qm of the system. Therefore, from (9), it has 444
Energies 2024, 17, x FOR PEER REVIEW 14 of 27

Xvm
Uvm  Uvm = Q (33) 445
UQm m

When the inverter system works steady, UQm equals to the actual output voltage Um 446
of the inverter on the basis of SMC. By combining (33) and the Q-U loop control in (21), 447
the Q-U loop control system after adding Xvm can be rewritten by using the Laplace trans- 448
form as 449

Xvm ( s )
Um ( s )  UQm ( s ) − U vm ( s ) = UQm ( s ) − Qm ( s )
UQm ( s )
(34) 450
 c   c  

=  cE1 + E 2   cE1 + E 2  Us ( s ) − U N ( s )  −  Nm + Nvm ( s )  Qm ( s ) − N mQNm ( s ) 
 s  s  

where Nvm=Xvm/UQm is the droop voltage coefficient. 451
Due to the droop limit in (34), the maximum output voltage distortion rate can be set 452
based on its output characteristics γ%, and the maximum output reactive power is 453
Qmax[31]. Therefore, it has 454

 c 
Qmax ( s )  Nm + Nvm ( s )   γ%  cE1 + E 2  Us ( s ) − U N ( s )  − NmQNm ( s )
 s  (35) 455

By substituting (34) into (35), the upper limit of Xvm can be obtained as 456


  c  

UQm ( s ) γ%  cE1 + E 2  Us ( s ) − UN ( s ) − Nm QNm ( s ) + Qmax ( s ) 

  s  

Xvm ( s ) 
Qmax ( s )
(36) 457

3.3. Stability Analysis of the Improved Virtual Impedance Droop Control 458
In the following, the stability of the improved virtual impedance droop control by 459
using SMC is investigated, and the analysis approach of the small signal is utilized. 460
From (9), the average output power of the inverter system can be expressed by the 461
first-order low-pass filter: 462

 ωc U sU m sin θm
 Pm =
 s + ωc Xem
 (37) 463
Q = ωc U sU m cos θm − U s
2

 m
s + ωc Xem

where ωc is the cutoff frequency of the first-order low-pass filter. 464
By introducing disturbance values to each output signal of the parallel system in (37), 465
we can get 466

ˆ P ˆ P ˆ
 Pm = U Um + θ θm
 m m (38)
 467
Qˆ = Q Q
Uˆ + θˆ


m
U m m θm m

where, Uˆ m, θˆ m , Pˆm, Qˆ m represent disturbance values of Um, θm, Pm and Qm, respectively. 468
By combining (37) and (38), the small signal disturbance can be obtained as 469
Energies 2024, 17, x FOR PEER REVIEW 15 of 27

ˆ
 Pm =

ωc Us ˆ
(
U sin θm + Umθˆ m cos θm
s + ωc Xem m
)
 (39) 470
Q


m
s + ωc Xem m
(
ˆ = ωc Us Uˆ cos θ − U θˆ sin θ
m m m m )
Based on the perturbation theory of the small signal [32] and (8), we can further get 471

ˆ df m ˆ
 fm = P
 d Pm m (40)
 472
Uˆ = dU m Q ˆ


m
dQm m

where fˆm represents the disturbance value of fm. 473

Furthermore, by substituting (21) and (25) into (40), the small-signal expression can 474
be obtained as 475

 Mm Pˆm
 fˆm = −
 cf2
 1+ cf1 + (41)
 s 476
  c ˆ
Uˆ m = − Nm  cE1 + E 2  Qm

  s 

From Figure 6, the relationship of the frequency disturbance fˆm of the output voltage 477

with phase disturbance θˆ can be expressed as

m
478

θˆ m ( s ) = f ( s)
2π ˆ
(42) 479
s m
By combining (40), (41) and (42), the small signal perturbation equation of Uˆ m and 480

θˆ m can be obtained as 481

 − Nm ωcUs ( cE1 s + cE 2 )
Uˆ m =
 Xem s ( s + ωc )
( Uˆ m cos θm − Umθˆ m sin θm )

−2πMm ωcUs (43)
( )
482
θˆ = Uˆ m sin θm + Um cos θm
 m  cf2 
 1 + c f 1 +  X s ( s + ωc )
  s  em
 
which can be further rewritten as 483

as4θˆ m + bs3θˆ m + cs2θˆ m + dsθˆ m + e = 0 (44) 484

where a, b, c, d and e can be denoted as 485


( )
a = 1 + c X 2
f1 em

(
b = 1 + c

)(
f1 )
2ωc Xem2 + Nm cE1ωcUs Xem cos θm + c f 2 Xem 2

  ( )
c =  1 + c ω + 2c  ω X 2 + ω U X cos θ +   2πM U + N 1 + c ( c ω + c ) + N c 
f1 c f 2  c em c s em m   m m m ( )
f1 E1 c E2 m f2
 (45) 486



d = c ω
f2 c
2
X em
2
+ 2 πM (
ω
m c
2
U m X em cos θm + N c U
m E1 s cos θm + N c U
m E1 s sin 2
θm )
+ N ω U X
m c s em cos θm 

( )
  1 + c f 1 cQ 2 ωc + ( cE1ωc + cE 2 ) c f 2 
  
(
e = Nm cE 2 ωc 2Us c f 2 Xem cos θm + 2πMmUmUs
 )
Energies 2024, 17, x FOR PEER REVIEW 16 of 27

By solving (44), the trajectory of the system can be illustrated in Figure 10, where λ1- 487
λ4 represents the typical root, and the arrow direction represents the movement direction 488
of the characteristic root with the increase of parameters. 489

5 λ1
λ1

λ4 λ3 λ4 λ3
jω

jω
0

λ2
-5 λ2

σ -15 -10 σ -5 0

(a) (b)

λ1

λ4 λ3
jω

λ2

σ
(c)

20
λ1
λ3
jω

0
λ4 λ2

-20

-250 -200 -150 σ -100 -50 0

(d)

λ4 λ1
λ1

λ4 λ3
jω
jω

λ2
λ3 λ2

σ σ
(e) (f)
Figure 10. Root locus of the improved virtual impedance droop control: (a) 0≤cf1≤10; (b) 0≤cE2≤100; 490
(c) 0≤cf2≤100; (d) 0≤cE1≤10; (e) 1×10−6≤Mm≤1×10-4; (f) 1×10−4≤Nm≤1×10−2. 491
Energies 2024, 17, x FOR PEER REVIEW 17 of 27

From Figure 10, we can see that the root locus is located on the left half of the complex 492
plane, which validates the system stability by using the improved virtual impedance 493
droop control in Figure 6. 494
Specifically, Figure 10(a) corresponds to the system root trajectory, where only the 495
proportional parameter cf1 changes. As cf2 increases, conjugated complex roots λ1 and λ2 496
quickly move towards the real and imaginary axes, the oscillation frequency and damping 497
of the system begin to decrease, and the response speed and stability are improved; the 498
real roots λ3 and λ4 move left and right at a similar speed, but have less impact on the 499
system. In conclusion, the larger cf2 is, the more stable the system is. 500
From Figure 10(b), as cE2 increases, the conjugated complex roots λ1 and λ2 move 501
away from the real and imaginary axes, and the oscillation frequency and damping of the 502
system rise rapidly, resulting in a slow response speed and poor stability. Although the 503
dispersed motion of real roots λ3 and λ4 exhibits a gradual increase in damping, its impact 504
on the system is relatively weak. In conclusion, the smaller the cE2 and Nm are, the faster 505
the response of the system is. 506
Figure 10(c) illustrates the root trajectory with the variation of the integral term pa- 507
rameter cf2. With the increase of cf2, conjugated complex roots λ1 and λ2 move away from 508
the real axis and towards the imaginary axis, the oscillation frequency of the system 509
slightly increases, and the damping is relatively small; the real root λ4 moves to the left 510
along the real axis at a speed much quicker than that of λ3, resulting an increasing damp- 511
ing of the dominant system. 512
In Figure 10(d), it shows the root trajectory in the case of the proportional parameter 513
cE1 varying. We can see that, the conjugate complex roots λ3 and λ4 move towards the real 514
axis, and when they are the real roots, λ4 moves to the left at a faster speed than that of λ3, 515
and the damping of the system increases while the oscillation frequency decreases. λ1 and 516
λ2 move towards the real axis at similar speeds, but the impact is relatively weak. In con- 517
clusion, the value of cE1 should be smaller to ensure a faster dynamic response speed of 518
the system. 519
In Figure 10(e), it shows the root trajectory varies with the power droop coefficient 520
Mm. With the increase of Mm increases, λ1-λ4 move away from the real axis, it incurs the 521
significant increase of the system oscillation frequency. In conclusion, the selection of Mm 522
should be smaller to enhance the stability of the system. 523
The analysis of Figure 10(f) is similar to that of Figure 10(b). 524

4. Intra-PCC Suppression Control 525

In the following, the suppression of the intra-PCC will be investigated. Based on the 526
intra-PCC sub-model in (7), PCC suppression relies on eliminating ZSV between the cor- 527
responding phases. For SVPWM, since the zero vector does not affect the synthesis of 528
modulated signals by other non-zero vectors, a regulation factor km is introduced to con- 529
trol ZSDC for (6). Therefore, for the parallel three-phase inverter system in Figure 1, the 530
signal in a modulation sector with regulation factor km can be illustrated in Figure 11, 531
where Tc is a modulation time; dam, dbm and dcm represent the duty cycle of the switch signal 532
on the three-phase bridge arm of the inverter; d0m represents the action time of zero vector; 533
d1m and d2m represent the action time of non-zero vectors with d0m+d1m+d2m=1; TSam, TSbm, and 534
TScm represent the switching time of the synthesized vector on the three-phase bridge. 535
Assume that d0mTc=t0m, d1mTc=t1m, d2mTc=t2m. From Figure 11, the action time of the zero 536
vector t0m=Tc−t1m−t2m, and the duty cycle of the switch signal on the three-phase bridge arm 537
dam, dbm and dcm can be given as 538
Energies 2024, 17, x FOR PEER REVIEW 18 of 27

 t1m t2 m  t0 m  d 
dam = + + − 2 kmTc  = d1m + d2 m +  0 m − 2 km 
 T c Tc  4   2 

 t 2 m  t0 m   d0 m 
dbm = + − 2 kmTc  = d2 m +  − 2 km 
 Tc  4   2 
 t d 
dcm = 0 m − 2 kmTc =  0 m − 2 km  (46) 539

 4  2 
Tc
damTc
1
Kam 0
dbmTc

Kbm
dcmTc

Kcm
000 010 011 111 011 010 000
 d0m  d d2m  d0m  d2m d1m  d0 m 
+ km  Tc 1m Tc Tc  − 2km  Tc Tc Tc  + km  Tc
  2   4 
 4  2 2 2 2

TSam TSbm TScm 540

Figure 11. Signal in a modulation sector with the regulation factor km. 541

By combining (5) and (46), ZSDC dzm can be expressed as 542

3d0 m
dzm = dam + dbm + dcm = d1m + 2d2 m + − 6 km (47) 543
2
Since t0m>0, the variation range of km in (47) is [−d0m/4, d0m/4]. Due to the regulation 544
factor km, the adjusted action time of the three-phase bridge TSam', TSbm', and TScm' can be 545
written as 546


TSam = TSam + kmTc

 d1m
TSbm = TSam + T (48) 547
 2 c
 d
T  = TSbm + 2 m Tc
 Scm 2
By substituting (48) into (7), the intra-PCC can be rewritten as 548

 3d   3d 
Udc  d11 + 2d21 + 01 − 6 k1  −  d12 + 2d22 + 02 − 6 k2  
dz1 ( s ) − dz 2 ( s )  Udc  2   2 
iz ( s ) = = (49) 549

(L ) R
2 2 2 2

m =1
fkm1 + L fkm 2 + Llkm s +
m =1
lkm L
m =1
em s+ R
m =1
lkm

In order to suppress the intra-PCC in (49), it is critical to determine the regulation 550
factor km. A SMC-based approach is designed in Figure 12, where L is an amplitude limiter, 551
which can force the regulation factor km to vary within [−d0m/4, d0m/4]. 552

Δiz
iz Δizdt km' km
+_ SMC L
dΔiz/dt
0 Amplitude limiter
553
Figure 12. Control diagram of the proposed SMC-based approach. 554

Since the desired intra-PCC is zero, the state xz can be denoted as 555
Energies 2024, 17, x FOR PEER REVIEW 19 of 27

xz = iz (50) 556

Similar to the SMC design for the voltage control system in (12)-(14), the sliding sur- 557
face Sz and the robust control law uz are designed as 558


Sz = cz1 xz + xz + cz 2 xz dx

 (51) 559
uz = − sgn ( Sz )


Sz = εz uz − kz Sz = −εz sgn ( Sz ) − kz Sz (52) 560

where the design parameterscz1>0, cz2>0, εz>0, kz>0. 561

5. Simulation and experiment 562

For the 2-group parallel three-phase inverter system in Figure 1, the composite con- 563
trol scheme for simulation and experiment are given in Figure 13. The circuit parameters 564
are shown in Table 1, where m=1,2. For the transmission line, its impedance 565
Zlm=0.101+j0.231Ω/km is the actual value of a three-core cable [34], and the reference cross- 566
sectional area is 185mm2, the length of the transmission line is 2km. 567
Inverter-1

+ Ls1 AC bus
Inverter-2
Udc T1 T3 T5
Lfa11 Lfa12 Rla1 Lla1 usa1
ua1 ia1 isa1
A1
Lfb11 Lfb12 Rlb1 Llb1 usb1
DC bus ub1 ib1 isb1 AC
C01

B1 load
Lfc11 Lfc12 Rlc1 Llc1 usc1
uc1 ic1 isc1
C1
phase angle
T4 T6 T2
calculation
Cfc1
Cfb1
Cfa1

uCb1
uCa1

uCc1
ioa1
iob1
ioc1

_ δ1'
uCd1_ref abc/dq
SVPWM Suoq1 - isk1
uCq1

Voltage loop
uCd1

ioq1
iod1

+
Figure 11 controller +
k1 Suod1 -
Modulation block us frequency 1/n
uCq1_ref
iod1_ref

ioq1_ref

with regulation factor Output power calculation

iz1 calculation
suppresses RMS fs + ioa1
P 1 Q1 + fn
SMC iod1 - - ioq1 Pn1 + + Qn1 -
+ + -
- - 2
- 0 Siod1 Sioq1 Adaptive virtual
Ka1
Kb1
Kc1

Us
+ UN + P-f loop impedance
Kq1 M1 N1 -
Current loop controller controller
isa1+isb1+isc1 dq / abc fP1 UQ1
Kd1 controller fs' - Lv1
- Us ' Bus voltage fs'
+ f + controller c
1 s Lv1
δ1
δ1 2
s + c
uod1ref +
voltage uv1
s
uoq1ref + - synthesis U1 Q-U loop abc/dq
- udv1 controller
uqv1
568
Figure 13. Composite control scheme of 2-group parallel three-phase inverter system. 569

Table 1. Circuit parameters of the 2-group parallel three-phase inverter. 570

Circuit parameter Value Circuit parameter Value

Input DC voltage Udc 700V Rated active power of load PLN 6000W
Filtering capacitance C0m 1000μF Rated reactive power of load QLN 600var
Bus parasitic inductance Lsm 1.54μH Initial value of virtual reactance Xvm(0) 0.314Ω
Filter capacitor Cfkm 100μF Maximum of Virtual impedance XvmMAX 0.565Ω
Filtering inductance Lfk1m 8mH Maximum of regulation factor km 0.52
Filtering inductance Lfk2m 6mH Minimum of km 0.48
Line resistance Rl 0.202Ω P-f loop droop coefficient Mm 1e-5
Line inductance Ll 1.471mH Q-U loop droop coefficient Nm 1e-5
Energies 2024, 17, x FOR PEER REVIEW 20 of 27

Rated voltage of bus UN 311V Rated switching frequency of inverter 10kHz

Rated frequency fN 50Hz Rated carrier frequency 10kHz
571
In order to validate the effectiveness of the parallel inter-controllers and intra-con- 572
trollers designed in Section 3.2 and Section 4, the system performance is compared withh 573
the traditional virtual impedance droop control introduced in Section 3.1, and the design 574
parameters are given in Table 2. For distinguishing the two approaches in the following, 575
we use ”VI” and ”CS” located in the subscript of the variables to denote the corresponding 576
values under the traditional virtual impedance droop control in Section 3.1 and the pro- 577
posed composite control in Figure 13. 578

Table 2. Design parameters of the inter-controllers and intra-controllers 579

Parameter Value Parameter Value Parameter Value Parameter Value

cU1 50 cE2 1e-4 εf 1230 kc 1e-6
cU2 0.1 εE 0.98 kf 1e-8 cz1 1e-2
εU 0.48 kE 9.02 cc1 5 cz2 10
kU 1e-8 cf1 3000 cc2 0.1 εz 1e-6
cE1 1e-4 cf2 500 εc 1e-8 kz 1e-3

5.1. Simulation Results 580

In simulation, we choose two typical working conditions of the three-phase parallel 581
inverter system to validate the proposed composite control scheme in Figure 13, i.e., the 582
rated working case and the working case with disturbances. 583
5.1.1. Case 1: rated working case 584
In this case, the working condition is described by the following phases: 585
(1) Phase 1: Set the load power to be consistent with the rated power at t=0; 586
(2) Phase 2: Increase the total load power to PL=8kW and QL=800var at t=0.15s; 587
(3) Phase 3: Decrease the total load power to PL=4kW and QL=400var at t=0.3s. 588
For the 2-group parallel three-phase inverter system in Figure 1, the comparative 589
simulation results are given in Figure 14. Due to the parallel structure and the similar 590
performances, Table 3 only lists the comparative data of Inverter-1 for reference. 591

P1VI P1CS f1VI f1CS

P2VI P2CS f2VI f2CS
the traditional the CSSPCC
Pm/W

VIDC strategy strategy

fm/Hz

t/s t/s

(a) (b)
Energies 2024, 17, x FOR PEER REVIEW 21 of 27

(c) (d)

icVI icCS
iz1VI iz1CS
iz2VI iz2CS
izm/A
ic/A

t/s t/s

(e) (f)
Figure 14. Comparative simulation results in rated working condition:(a) output active power Pm ; 592
(b) P-f loop output frequency fm; (c) output reactive power Qm; (d) Q-U loop output voltage ampli- 593
tude Um; (e) inter-PCC ic; (f) intra-PCC iz. 594

Table 3. Comparative simulation results of Inverter-1 in the rated working condition. 595

Average re-
Variable Convergence time Maximum overshoot Mean steady error
sponse time
P1VI 0.036s 8.374% 0.034s 129.214W
P1CS 0.012s 6.561% 0.014s 19.671W
Q1VI 0.054s 77.993% 0.019s 40.475var
Q1CS 0.015s 39.373% 0.013s 25.362var
icVI - 15.408% - 0.984A
icCS - 13.784% - 0.191A
iz1VI - 10.956% - 0.782A
iz1CS - 9.121% - 0.093A
f1VI 0.042s 0.015% 0.022s 0.033Hz
f1CS 0.011s 0.009% 0.010s 0.030Hz
U1VI 0.047s 3.864×10-4% 0.021s 3.516mV
U1CS 0.016s 3.811×10-4% 0.014s 3.337mV
596
In Figure 14(a), the active power output Pm of the 2-group three-phase inverter sys- 597
tem is given, where m=1,2. Taking the inverter-1 as an example in Table 3, we can see that, 598
the dynamic and static control performances of the proposed composite control are better 599
that those under the traditional virtual impedance droop control. For example, the initial 600
convergence time of P1CS is reduced by 66.7% while P1VI is only 0.012s; the overshoot of P1CS 601
is within 6.6% and reduced by 21.7% with comparison to P1VI, so that the stability of the 602
Energies 2024, 17, x FOR PEER REVIEW 22 of 27

output active power can be guaranteed. When the load power changes, the average re- 603
sponse time of P1CS is reduced by nearly 58.8% with comparison to P1VI, due to the use of 604
SMC. The average steady error of P1CS is only 19.7W, which is nearly 84.8% lower than P1VI. 605
Figure 14(b) shows the output frequency fm of the P-f loop, and the average response time 606
and steady error of the f1CS are reduced by 54.6% and 9.1%, respectively, compared to f1VI, 607
due to SMC in (23). Figure 14(c) shows the output reactive power Qm and Q1CS can stabilize 608
in 0.015s, the maximum overshoot is 39.4%, compared to Q1VI. It is due to the stability 609
control of the output voltage U1 of Q-U loop in Figure 14(d). We can see at t=0.15s, U1VI 610
suddenly increases along QL, while Q1VI have large fluctuations, and U1CS remains stable. 611
While at t=0.3s, U1VI experiences a sudden decrease due to the reduction of QL and Q1VI 612
fluctuates greatly. Meanwhile due to the fast response of SMC in (18), the average re- 613
sponse time of U1CS has been reduced by 33.3%, which is in accordance with Figure 14(a). 614
In Figure 14(e) and Figure 14(f), the inter-PCC ic and the intra-PCC iz are given, respectively. 615
Taking the inverter-1 as an example, the inter-PCC icCS is only 0.191A and is 80.6% less 616
than that of icVI, while the intra-PCC iz1CS is only 0.093A and is 88.1% less than iz1VI. There- 617
fore, the proposed composite control scheme in Figure 13 has been prove effectively. 618
5.1.2. Case 2: working condition with disturbances 619
In this case, we take the disturbance of the transmission line as an example to test the 620
proposed composite control scheme in Figure 13. In practice, this kind of disturbance is 621
very common and is characterized by unmatched uncertainty in the sense of SMC [35]. 622
Specifically, there is 623
(1) Phase 1: The the transmission line Zlm=0.101+j0.231Ω/km at t=0; 624
(2) Phase 2: Zlm decreases to 0.051+j0.116Ω/km at t=0.15s; 625
(3) Phase 3: Zlm increases to 0.202+j0.462Ω/km at t=0.3s. 626
For the 2-group three-phase inverter system in Figure 1, the comparative simulation 627
results are given in Figure 15. Similar to Table 3, Table 4 only shows the comparative data 628
of Inverter-1 for reference. 629
630

P1VI P1CS
P2VI P2CS
Pm/W

t/s

(a) (b)

icVI icCS iz1VI iz1CS

iz2VI iz2CS
izm/A
ic/A

t/s
t/s
(c) (d)
Energies 2024, 17, x FOR PEER REVIEW 23 of 27

k1VI
XvmVI
k1CS
Xv1CS
Xv2CS
Xvm/Ω

k1
t/s t/s

(e) (f)
Figure 15. Comparative simulation results in the working condition with disturbances: (a) output 631
active power Pm; (b) output reactive power Qm; (c) inter-PCC ic; (d) intra-PCC iz; (e) virtual induc- 632
tive Xvm; (f) regulation factor km. 633

634

Table 4. Comparative simulation results of Inverter-1 in the disturbing working condition. 635

Variable Convergence time Maximum error Mean steady error

P1VI 0.045s 225.324W 149.644W
P1CS 0.015s 49.544W 22.323W
Q1VI 0.051s 132.785var 52.631var
Q1CS 0.016s 64.153var 30.667var
icVI - 3.715A 1.083A
icCS - 1.101A 0.491A
iz1VI - 2.339A 1.715A
iz1CS - 0.447A 0.149A
636
In Figure 15(a), the active Pm is given for the 2-group three-phase inverter system, 637
where m=1,2. Taking the inverter-1 as an example in Table 4, since the imbalance of the 638
transmission lines exists, P1VI and P1CS fluctuate at the same time. By comparing Table 3 639
and Table 4, we can see that, the maximum error of P1VI is 225.324W, the average steady 640
error increases by 13.7% due to the disturbance of the transmission line. While the maxi- 641
mum error of P1CS is only about 1/5 of P1VI, and its steady error only increases by 11.9%, the 642
stable time is 66.7% lower than P1VI. Figure 15(b) shows the reactive power Qm. In the con- 643
trol of the traditional virtual impedance droop control, the maximum error of Q1VI is 644
132.785var, while in the control of the proposed composite control, the maximum error of 645
Q1CS is reduced by 51.7%. Figure 15(c) and Figure 15(d) show the inter-PCC ic and the intra- 646
PCC izm. Due to the adaptive adjustment of the virtual inductance Xv1 in (31) and the reg- 647
ulation factor k1, the suppression of inter-PCC ic and intra-PCC iz1 can be realized, respec- 648
tively, and Figure 15(e) and Figure 15(f) show Xv1 and k1 for reference. 649

5.2. Experiment Results 650

In the following, the proposed composite control scheme in Figure 13 is test at the 651
experimental platform of dSPACE100, shown in Figure 16. The traditional virtual imped- 652
ance droop control is also adopted for comparison with the proposed composite control 653
in this paper. And the design parameters of the controllers can be referred to Table 2. The 654
experiment results are in Figure 17 and Table 5. 655
Energies 2024, 17, x FOR PEER REVIEW 24 of 27

Data
monitoring
interface

Oscilloscope DC Control
power algorithm
Parallel three-phase inverter
PC
AC load

Signal mutual
inductance circuit

Analog transmission dSPACE1006

MOSFET drive and optocoupler controller
line impedance
isolation circuit 656
Figure 16. The experimental platform of dSPACE1006. 657

Table 5. Experimental comparisons of Inverter-1 and Inverter-2. 658

Variable Convergence time Amplitude error Mean steady error

P1VI 0.099s 59.482W 138.031W
P1CS 0.071s 42.002W 21.947W
Q1VI 0.102s 153.170var 58.439var
Q1CS 0.079s 53.385var 28.226var
iz1VI - 1.937A 0.941A
iz1CS - 0.397A 0.123A
icVI - 3.312A 1.227A
icCS - 0.458A 0.216A
P2VI 0.097s 60.485W 137.883W
P2CS 0.069s 43.320W 22.253W
Q2VI 0.104s 153.171var 57.864var
Q2CS 0.081s 54.704var 27.731var
iz2VI - 1.934A 0.962A
iz2CS - 0.398A 0.127A
659

(a) (b)
Energies 2024, 17, x FOR PEER REVIEW 25 of 27

(c) (d)
Figure 17. Comparative experimental results: (a) active power Pm; (b) reactive power Qm; (c) in- 660
ter-PCC ic; (d) intra-PCC iz. 661

In Figure 17(a), the experiment results of the active power Pm is given for the 2-group 662
parallel three-phase inverter system, where m=1,2. For the invereter-1 and inverter-2, the 663
proposed composite control scheme in Figure 13 can guarantee the active power P1CS and 664
P2CS stable within 0.071s. And from Table 5, the amplitude errors of P1CS and P2CS decrease 665
28.3% and 28.4% compared to P1VI and P2VI under the control of the traditional virtual im- 666
pedance droop control; while the average steady error of P1CS and P2CS is 21.947W and 667
22.253W, which are decreased by 84.1% and 83.9% compared to P1VI and P2VI. In Figure 668
17(b), it shows the reactive power QmCS. And from Table 5, the amplitude errors of Q1CS 669
and Q2CS for the two inverters are only 54.045var and 54.704var, which are 66.7% and 64.3% 670
lower than the Q1VI and Q2VI under the traditional approach. Figures 17(c) and 17(d) show 671
the inter-PCC ic and the intra-PCC iz. Under the control of the traditional approach, both 672
of the inter-PCC and the intra-PCC contain high-frequency oscillations, which are dan- 673
gerous in practice, and can be prevented, otherwise it has serious side effect on the power 674
quality and conversion efficiency of the power grid. While under the control of the pro- 675
posed composite control scheme in Figure 13, the steady error of icCS is 0.216A, which is 676
82.4% lower than icVI, the steady errors of iz1CS and iz2CS are 0.123A and 0.127A, which are 677
86.9% and 86.8% lower than iz1VI and iz2VI, respectively. Therefore, it reconfirms the superi- 678
ority of the proposed approach. 679

6. Conclusions 680
In this paper, a composite SMC approach is proposed for the parallel three-phase 681
inverter system to solve the issue of PCC suppression. Differing from the traditional re- 682
search only considers the intra-PCC or the inter-PCC, we investigate both at the same time 683
and propose an inter- and intra- classification model. For the intra-PCC, based on the anal- 684
ysis of the traditional virtual impedance droop control, novel SMC controllers are de- 685
signed with the focus of robustness and fast response for the coupled control includes bus 686
voltage, Q-U loop, P-f loop and the virtual induced reactance. As a result, the intra-PCC 687
is suppressed, and the control performance is improved. Meanwhile, for the intra-PCC, a 688
SMC-based suppression approach is proposed. Innovatively, a regulation factor is intro- 689
duced into SVPWM, so that the intra-PCC can be relieved by eliminating the zero-se- 690
quence voltage. Comparative simulations and experiments validate this paper. 691

Author Contributions: Conceptualization, Y.W., W.Z. and F.H.; methodology, W.Z.; software, 692
W.Z.; validation, Y.W., F.H. and R.Y.; formal analysis, W.Z. and Y.W.; investigation, F.H.; resources, 693
R.Y.; data curation, Y.W.; writing—original draft preparation, Y.W. and F.H.; writing—review and 694
editing, Y.W. and F.H.; visualization, W.Z.; supervision, Y.W. and F.H.; project administration, 695
Y.W.; funding acquisition, Y.W. and F.H. All authors have read and agreed to the published version 696
of the manuscript. 697
Energies 2024, 17, x FOR PEER REVIEW 26 of 27

Funding: This research was funded by the National Natural Science Foundation of China, grant 698
number 51307035 and 62073095. 699

Data Availability Statement: No applicable. 700

Conflicts of Interest: The authors declare no conflicts of interest. 701

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