Computer Architecture and Organization

Lab No: 04

Name: Rehan Munir Awan

Enrollment No: 01-132222-036
Date: 26-March-2024
Submitted To: Mam Maryam Hassan

DEPARTMENT OF COMPUTER ENGINEERING

BAHRIA UNIVERSITY ISLAMABAD
CAMPUS
 16 x 8 Static TTL RAM Implementation for SAP-1
Computer Architecture
OBJECTIVE:
n this lab, our objective is to design and implement a 16 x 8 Static
TTL RAM module tailored for the SAP-1 (Simple As Possible)
Computer Architecture. This exercise aims to provide students with a
practical understanding of RAM functionality within computer
systems. The specific focus includes comprehending RAM
organization, addressing schemes, and interfacing principles. Through
hands-on experience, students will delve into the intricacies of
designing and constructing a Static TTL RAM module using discrete
logic gates. Furthermore, they will develop the requisite control
signals necessary for reading from and writing to the RAM module.
The ultimate goal is to seamlessly integrate the RAM module into the
SAP-1 architecture, ensuring compatibility and functionality.
Equipment Used:
 Proteus.
 2 X 74189.
Introduction to 16 x 8 Static TTL RAM:
Random Access Memory (RAM) is a crucial component in modern
computer systems, providing temporary storage for data and
instructions that are actively being processed by the CPU. Among the
various types of RAM, Static RAM (SRAM) stands out for its fast
access times and ability to retain data without the need for periodic
refreshing. In this context, the 16 x 8 Static TTL RAM represents a
specific configuration of SRAM, featuring 16 memory locations, each
capable of storing 8 bits of data. This introduction aims to explore the
fundamental concepts behind this particular RAM configuration and
its significance in computer architecture. The 16 x 8 Static TTL RAM
is constructed using Transistor-Transistor Logic (TTL) technology,
which comprises discrete logic gates such as AND, OR, and NOT
gates.
Lab Tasks
These are the following tasks which we to perform in this lab.
Simulate the architecture of RAM for SAP-1 in Proteus.

Explanation:
A list of components used in an electronic circuit, it lacks the
necessary connections, schematic, or instructions to sufficiently
explain the working or the functionality of the circuit. The
components mentioned include a 4-bit latch IC (74LS189), a red LED
(LED-RED), a diode (D4). The operation of a 16 x 8 Static TTL
RAM module within the SAP-1 computer architecture is integral to
the system's overall functionality. Addressing memory in this
configuration relies on a 4-bit address bus, allowing for access to 16
distinct memory locations. When the CPU initiates a read operation, it
sends the desired memory address through the address bus. This
address is decoded by the RAM's address decoder, which selects the
corresponding memory cell. Subsequently, the data stored in that cell
is transferred onto the data bus for retrieval by the CPU. Conversely,
during a write operation, both the memory address and the data to be
written are transmitted to the RAM module.
2. Implement the MAR by utilizing hardware components.

Explanation:
The 16 x 8 Static TTL RAM module in the SAP-1 architecture
operates through address decoding, data retrieval, and storage
processes. Utilizing a 4-bit address bus, the CPU communicates with
the RAM, specifying memory locations. Address decoding translates
these signals into select lines for memory cell access. During reads,
the CPU sends an address, prompting data retrieval. During writes, it
sends both address and data, with Write Enable (WE) signal
indicating writing intent. Data is stored without refreshing, ensuring
retention with power. Control signals like Read Enable (RE) and
Write Enable (WE) coordinate read and write operations, facilitating
efficient data access and manipulation. This process underscores
RAM's crucial role in providing temporary storage for instructions
and data within SAP-1, aiding in computation. This integrated process
of addressing, data retrieval, and storage underscores the essential role
of the RAM module in providing temporary storage for instructions
and data within the SAP-1 architecture, facilitating efficient program
execution and computation.
Conclusion:
In conclusion, the implementation of a 16 x 8 Static TTL RAM for
the SAP-1 Computer Architecture lab has provided invaluable
insights into the fundamental principles of computer memory design
and operation. Through this project, we have gained a deeper
understanding of how RAM functions within a computer system,
including addressing schemes, data storage, and retrieval
mechanisms.