IRFP4868PbF

VDSS 300V D
RDS(on) typ. 25.5m
max. 32m
S
ID 70A D
G
Applications
TO-247AC
 High Efficiency Synchronous Rectification in SMPS
 Uninterruptible Power Supply
 High Speed Power Switching G D S
 Hard Switched and High Frequency Circuits
Gate Drain Source
Benefits
 Improved Gate, Avalanche and Dynamic dV/dt
Ruggedness
 Fully Characterized Capacitance and Avalanche SOA
 Enhanced body diode dV/dt and dI/dt Capability
 Lead-Free
Base Part Number Package Type Standard Pack Orderable Part Number
Form Quantity
IRFP4868PbF TO-247AC Tube 25 IRFP4868PbF

Absolute Maximum Ratings

Symbol Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V 70
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V 49 A
IDM Pulsed Drain Current  280
PD @TC = 25°C Maximum Power Dissipation 517 W
Linear Derating Factor 3.4 W/°C
VGS Gate-to-Source Voltage ± 20 V
TJ Operating Junction and
-55 to + 175
TSTG Storage Temperature Range
°C
Soldering Temperature, for 10 seconds
300
(1.6mm from case)
Mounting torque, 6-32 or M3 screw 10lbfin (1.1Nm)
Avalanche Characteristics
EAS (Thermally limited) Single Pulse Avalanche Energy  1093 mJ
IAR Avalanche Current  A
See Fig. 14, 15, 22a, 22b
EAR Repetitive Avalanche Energy  mJ
Thermal Resistance
Symbol Parameter Typ. Max. Units
RJC Junction-to-Case  ––– 0.29
RCS Case-to-Sink, Flat Greased Surface 0.24 ––– °C/W
RJA Junction-to-Ambient ––– 40

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Static @ TJ = 25°C (unless otherwise specified)
Symbol Parameter Min. Typ. Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage 300 ––– ––– V VGS = 0V, ID = 250µA
V(BR)DSS/TJ Breakdown Voltage Temp. Coefficient ––– 0.29 ––– V/°C Reference to 25°C, ID = 5mA
RDS(on) Static Drain-to-Source On-Resistance ––– 25.5 32 m VGS = 10V, ID = 42A 
VGS(th) Gate Threshold Voltage 3.0 ––– 5.0 V VDS = VGS, ID = 250µA
––– ––– 20 VDS = 300V, VGS = 0V
IDSS Drain-to-Source Leakage Current µA
––– ––– 250 VDS = 300V, VGS = 0V, TJ = 125°C
Gate-to-Source Forward Leakage ––– ––– 100 VGS = 20V
IGSS nA
Gate-to-Source Reverse Leakage ––– ––– -100 VGS = -20V
RG Internal Gate Resistance ––– 1.1 ––– 
Dynamic @ TJ = 25°C (unless otherwise specified)
Symbol Parameter Min. Typ. Max. Units Conditions
gfs Forward Transconductance 80 ––– ––– S VDS = 50V, ID = 42A
Qg Total Gate Charge ––– 180 270 ID = 42A
Qgs Gate-to-Source Charge ––– 60 ––– VDS =150V
nC
Qgd Gate-to-Drain ("Miller") Charge ––– 57 ––– VGS = 10V 
Qsync Total Gate Charge Sync. (Qg - Qgd) ––– 123 ––– ID = 42A, VDS =0V, VGS = 10V
td(on) Turn-On Delay Time ––– 24 ––– VDD = 195V
tr Rise Time ––– 16 ––– ID = 42A
ns
td(off) Turn-Off Delay Time ––– 62 ––– RG = 1.0
tf Fall Time ––– 45 ––– VGS = 10V 
Ciss Input Capacitance ––– 10774 ––– VGS = 0V
Coss Output Capacitance ––– 612 ––– V DS = 50V
Crss Reverse Transfer Capacitance ––– 193 ––– ƒ = 1.0 MHz, See Fig. 5
Coss eff. (ER) Effective Output Capacitance pF VGS = 0V, VDS = 0V to 240V ,
––– 406 –––
(Energy Related)  See Fig. 11
Coss eff. (TR) Effective Output Capacitance VGS = 0V, VDS = 0V to 240V 
––– 710 –––
(Time Related)
Diode Characteristics
Symbol Parameter Min. Typ. Max. Units Conditions
IS Continuous Source Current MOSFET symbol D

––– ––– 70 A
(Body Diode) showing the
G
ISM Pulsed Source Current integral reverse
––– ––– 280 A
(Body Diode)  p-n junction diode. S

VSD Diode Forward Voltage ––– ––– 1.3 V TJ = 25°C, IS = 42A, VGS = 0V 
dv/dt Peak Diode Recovery  ––– 7.3 ––– V/ns TJ = 25°C, IS = 42A, VDS = 300V
trr Reverse Recovery Time ––– 351 ––– TJ = 25°C
ns VR = 255V,
––– 454 ––– TJ = 125°C
Qrr Reverse Recovery Charge ––– 2520 ––– TJ = 25°C IF = 42A
nC di/dt = 100A/µs 
––– 3686 ––– TJ = 125°C
IRRM Reverse Recovery Current ––– 16 ––– A TJ = 25°C
ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by
LS+LD)

Notes:
 Repetitive rating; pulse width limited by max. Junction
temperature.
 Limited by TJmax, starting TJ = 25°C, L = 1.2mH
RG = 50, IAS = 42A, VGS =10V. Part not
recommended for use above this value.
 ISD ≤ 42A, di/dt ≤ 1706A/µs, VDD ≤ V(BR)DSS, TJ ≤ 175°C.
 Pulse width ≤ 400µs; duty cycle ≤ 2%.
 Coss eff. (TR) is a fixed capacitance that gives
the same charging time as Coss while VDS is
rising from 0 to 80% VDSS.
 Coss eff. (ER) is a fixed capacitance that gives
the same energy as Coss while VDS is rising
from 0 to 80% VDSS.
 R is measured at TJ approximately 90°C.
 RJC value shown is at time zero.

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1000 1000
VGS VGS
TOP 15V TOP 15V
12V 12V
100 10V 10V
ID, Drain-to-Source Current (A)

ID, Drain-to-Source Current (A)

8.0V 8.0V
7.0V 7.0V
6.0V 100 6.0V
5.5V 5.5V
10 BOTTOM 4.75V BOTTOM 4.75V

1
10 4.75V

0.1
4.75V
60µs PULSE WIDTH 60µs PULSE WIDTH
Tj = 25°C Tj = 175°C
0.01 1
0.1 1 10 100 1000 0.1 1 10 100
V DS, Drain-to-Source Voltage (V) V DS, Drain-to-Source Voltage (V)

Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics

1000 3.5
ID = 70A

RDS(on) , Drain-to-Source On Resistance

3.0 VGS = 10V
ID, Drain-to-Source Current (A)

100
2.5
TJ = 175°C
(Normalized)
2.0
10 TJ = 25°C
1.5

1.0
1

V DS = 50V 0.5
60µs PULSE WIDTH
0.1 0.0
3 4 5 6 7 8 -60 -40 -20 0 20 40 60 80 100120140160180
V GS, Gate-to-Source Voltage (V) T J , Junction Temperature (°C)

Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance vs. Temperature

100000 14.0
VGS = 0V, f = 1 MHZ
ID= 42A
Ciss = C gs + Cgd, C ds SHORTED
12.0 V DS= 240V
Crss = C gd
V GS, Gate-to-Source Voltage (V)

Coss = Cds + Cgd V DS= 150V

10.0 V DS= 60V
Ciss
C, Capacitance (pF)

10000
8.0
Coss

6.0
Crss
1000
4.0

2.0

100 0.0
1 10 100 1000 0 30 60 90 120 150 180 210 240
V DS, Drain-to-Source Voltage (V) QG, Total Gate Charge (nC)

Fig 5. Typical Capacitance vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage

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1000 1000
OPERATION IN THIS AREA
LIMITED BY R DS(on)

ID, Drain-to-Source Current (A)

ISD, Reverse Drain Current (A)

1msec
100 100
TJ = 175°C
100µsec
10msec
TJ = 25°C
10 10

1 1
Tc = 25°C DC
Tj = 175°C
V GS = 0V
Single Pulse
0.1 0.1
0.0 0.5 1.0 1.5 1 10 100 1000
V SD, Source-to-Drain Voltage (V) VDS, Drain-to-Source Voltage (V)

Fig 7. Typical Source-to-Drain Diode Fig 8. Maximum Safe Operating Area

Forward Voltage

V (BR)DSS, Drain-to-Source Breakdown Voltage (V)

70 370
Id = 5mA
360
60
350
50
ID, Drain Current (A)

340
40 330

30 320

310
20
300
10
290

0 280
25 50 75 100 125 150 175 -60 -40 -20 0 20 40 60 80 100120140160180
TC , Case Temperature (°C) TJ , Temperature ( °C )

Fig 9. Maximum Drain Current vs. Case Temperature Fig 10. Drain-to-Source Breakdown Voltage

20.0 5000
ID
EAS , Single Pulse Avalanche Energy (mJ)

TOP 11A
4000 20A
15.0 BOTTOM 42A

3000
Energy (µJ)

10.0
2000

5.0
1000

0.0 0
-50 0 50 100 150 200 250 300 350 25 50 75 100 125 150 175
Starting TJ , Junction Temperature (°C)
VDS, Drain-to-Source Voltage (V)

Fig 11. Typical Coss Stored Energy Fig 12. Maximum Avalanche Energy vs. Drain Current

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1

Thermal Response ( Z thJC ) °C/W

D = 0.50
0.1
0.20
0.10
0.05
0.01
0.02
0.01

0.001
Notes:
SINGLE PULSE 1. Duty Factor D = t1/t2
( THERMAL RESPONSE ) 2. Peak Tj = P dm x Zthjc + Tc
0.0001
1E-006 1E-005 0.0001 0.001 0.01 0.1 1
t1 , Rectangular Pulse Duration (sec)

Fig 13. Maximum Effective Transient Thermal Impedance, Junction-to-Case

1000

Allowed avalanche Current vs avalanche

100 Duty Cycle = Single Pulse pulsewidth, tav, assuming Tj = 150°C and
Avalanche Current (A)

Tstart =25°C (Single Pulse)

0.01
10 0.05
0.10

1
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming  j = 25°C and
Tstart = 150°C.
0.1
1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01
tav (sec)

Fig 14. Typical Avalanche Current vs. Pulsewidth

1200
TOP Single Pulse Notes on Repetitive Avalanche Curves , Figures 14, 15:
BOTTOM 1.0% Duty Cycle (For further info, see AN-1005 at www.irf.com)
1000 1. Avalanche failures assumption:
ID = 42A
Purely a thermal phenomenon and failure occurs at a temperature
EAR , Avalanche Energy (mJ)

far in excess of Tjmax. This is validated for every part type.

800 2. Safe operation in Avalanche is allowed as long as Tjmax is not
exceeded.
3. Equation below based on circuit and waveforms shown in Figures
600 16a, 16b.
4. PD (ave) = Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage
400 increase during avalanche).
6. Iav = Allowable avalanche current.
7. T = Allowable rise in junction temperature, not to exceed Tjmax
200 (assumed as 25°C in Figure 14, 15).
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
0 ZthJC(D, tav) = Transient thermal resistance, see Figures 13)
25 50 75 100 125 150 175
PD (ave) = 1/2 ( 1.3·BV·Iav) = T/ ZthJC
Starting TJ , Junction Temperature (°C) Iav = 2T/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav
Fig 15. Maximum Avalanche Energy vs. Temperature

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6.0 70
IF = 28A
V GS(th) , Gate threshold Voltage (V)

5.0 60 V R = 255V
TJ = 25°C

4.0 50 TJ = 125°C

IRRM (A)
3.0 ID = 250µA 40
ID = 1.0mA
2.0 ID = 1.0A 30

1.0 20

0.0 10
-75 -50 -25 0 25 50 75 100 125 150 175 0 200 400 600 800 1000
TJ , Temperature ( °C ) diF /dt (A/µs)

Fig. 16 Threshold Voltage vs. Temperature Fig. 17 Typical Recovery Current vs. dif/dt

90 6000
IF = 42A IF = 28A
80 V R = 255V
V R = 255V

70 TJ = 25°C 5000 TJ = 25°C

TJ = 125°C TJ = 125°C
60
QRR (nC)
IRRM (A)

50 4000

40

30 3000

20

10 2000
0 200 400 600 800 1000 0 200 400 600 800 1000
diF /dt (A/µs) diF /dt (A/µs)

Fig 18. Typical Recovery Current vs. dif/dt Fig 19. Typical Stored Charge vs. dif/dt

8000
IF = 42A

7000 V R = 255V
TJ = 25°C

6000 TJ = 125°C
QRR (nC)

5000

4000

3000

2000
0 200 400 600 800 1000
diF /dt (A/µs)

Fig 20. Typical Stored Charge vs. dif/dt

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Fig 21. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs

Fig 22a. Unclamped Inductive Test Circuit Fig 22b. Unclamped Inductive Waveforms

Fig 23a. Switching Time Test Circuit Fig 23b. Switching Time Waveforms

Fig 24a. Gate Charge Test Circuit Fig 24b. Gate Charge Waveform

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TO-247AC Package Outline

Dimensions are shown in millimeters (inches)

TO-247AC Part Marking Information

Notes: This part marking information applies to devices produced after 02/26/2001

EXAMPLE: THIS IS AN IRFPE30

WITH ASSEMBLY PART NUMBER
LOT CODE 5657 INTERNATIONAL
ASSEMBLED ON WW 35, 2001 RECTIFIER IRFPE30

IN THE ASSEMBLY LINE "H" LOGO 135H

56 57
DATE CODE
ASSEMBLY YEAR 1 = 2001
Note: "P" in assembly line position
indicates "Lead-Free" LOT CODE WEEK 35
LINE H

TO-247 package is not recommended for Surface Mount Application.

Note: For the most current drawing please refer to website at http://www.irf.com/package/

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Qualification information
Industrial
Qualification level
(per JEDEC JESD47F)†

Moisture Sensitivity Level TO-247AC N/A

RoHS compliant Yes

† Applicable version of JEDEC standard at the time of product release.

Revision History
Date Comments
 Changed datasheet with Infineon logo-all pages
06/21/2017  Corrected Package outline on page 8.
 Added disclaimer on last page.

Published by
Infineon Technologies AG
81726 München, Germany
© Infineon Technologies AG 2015
All Rights Reserved.

IMPORTANT NOTICE
The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics
(“Beschaffenheitsgarantie”). With respect to any examples, hints or any typical values stated herein and/or any
information regarding the application of the product, Infineon Technologies hereby disclaims any and all warranties and
liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third
party.
In addition, any information given in this document is subject to customer’s compliance with its obligations stated in this
document and any applicable legal requirements, norms and standards concerning customer’s products and any use of
the product of Infineon Technologies in customer’s applications.

The data contained in this document is exclusively intended for technically trained staff. It is the responsibility of
customer’s technical departments to evaluate the suitability of the product for the intended application and the
completeness of the product information given in this document with respect to such application.
For further information on the product, technology, delivery terms and conditions and prices please contact your nearest
Infineon Technologies office (www.infineon.com).
WARNINGS
Due to technical requirements products may contain dangerous substances. For information on the types in question
please contact your nearest Infineon Technologies office.
Except as otherwise explicitly approved by Infineon Technologies in a written document signed by authorized
representatives of Infineon Technologies, Infineon Technologies’ products may not be used in any applications where a
failure of the product or any consequences of the use thereof can reasonably be expected to result in personal injury.

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