5 4 3 2 1

Schematic: Wio Lite AI Revision History

D SHEET SHEET NAME DATE REVISION DESCRIPTION D

01 Title/Revision History 2020/11/02 ST_AI_Camera_v1.0_SCH_201102 1. Frist prototype.

02 Block Diagram
2021/03/10 Wio Lite AI_v1.0_SCH_210310 1. Change PSRAM to APS6408L-3OBM-BA.
03 03 Power Management 2. Change Board name to Wio Lite AI.
04 04 MCU POWER 1. Add gpio to generate camera clock.
2021/06/15 Wio Lite AI_v1.0_SCH_210615 2. improve the floor to increase heat dissipation.
05 05 MCU GPIOS
06 06 SD_Card, PSRAM, FLASH
07 07 LCD, CAMERA, AUDIO
08 08 WIFI, LED

C C

B B

A A

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Title:
Wio Lite AI
Size: Document Number: Rev:
A3 01 Title, Revision History v1.0
Draw By: JN.FUONG Date: Thursday, July 15, 2021 Sheet: 1 of 8
5 4 3 2 1
 5 4 3 2 1

WIFI & BLE LTDC_RGB888

Micro SD Card
D Molex RTL8720 LCD Display D
TP_SIGNAL
FPC Connector
40PIN

UART

SDMMC1

USB_D+
TYPE C USB_D- STM32H725AEI6 PSRAM
SAI4 OCTO1_Dual_Quad_SPI
APS6408L-3OBM-BA
UFBGA169
C C

DCMI

Audio Camera FLASH 16MB

OCTO2_Quad_SPI
FPC Connector FPC Connector W25Q128JVSIQ
12PIN 24PIN

B B

LDO
Camera_3V0 TO Camera
Camera_1V3

DCDC
TYPE C SYS_5V
5V@2A
SYS_3V3 TO ALL PERIPHERALS

TLV62569DBVT
3.3V@2A
A A

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Title:
Wio Lite AI
Size: Document Number: Rev:
A3 02 Block Diagram v1.0
Draw By: JN.FUONG Date: Thursday, July 15, 2021 Sheet: 2 of 8
5 4 3 2 1
 5 4 3 2 1

D D

SYS_5V
TP13
Output Current: Max 2A

C1 C2
10uF 100nF
J1 10V,X5R 25V,X7R
USB2.0 Type C C0603 C0402
USB2_0_TYPE_C
B12
A1/B12/GND B9 VBUS L1 90R
CC1 A5 A4/B9/VBUS B8 4 3
CC1 SBU2 USB1_DM [5]
USB_DP A6 B7 USB_DM
USB_DM A7 DP1 DN2 B6 USB_DP 1 2
DN1 DP2 USB1_DP [5]
A8 B5 CC2
SBU1 CC2 B4 VBUS SRF2012-900YA
A9/B4/VBUS B1
R1 A12/B1/GND R2
5.1K 5.1K

S1
S2
S3
S4
S5
S6
5% 5% SYS_5V
R0402 R0402 U1

S1
S2
S3
S4
S5
S6
USB_DP 1 6
D+ VBUS
USB_DM 2 5 C3
C FB6 120R D- NC 100nF C
L0402 1.3A 3 4 25V,X7R
BLM15PD121SN1D ID GND C0402
TPD4S012DRYR
U_6_DRY

USB Type C

SYS_5V SYS_5V SYS_3V3

TP1
LQH44PN1R0NP0L Output Current: Max 2A
L2 1uH
R3 U2 L4X4MM 2.45A
B 10K TLV62569DBVT B
1% sot23-5 3V3_SW R4
R0402 240K C4 C5 C10
4 3 1% 33pF 10uF 10uF
VIN SW R0402 50V,NPO 10V,X5R 10V,X5R
3V3_EN 1 5 3V3_FB C0402 C0603 C0603
C6 EN FB
GND

10uF
10V,X5R R5 R7
C0603 100K 52.3K
2

1% Vout=Vfb*(1+R236/R235) 1%
R0402 =0.6V*(1+240K/52.3K) R0402
DNP =0.6V*5.59
=3.35V

A A

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Title:
Wio Lite AI
Size: Document Number: Rev:
A3 03 Power Management v1.0
Draw By: JN.FUONG Date: W ednesday, July 28, 2021 Sheet: 3 of 8
5 4 3 2 1
 5 4 3 2 1

D D

MCU_3V3
MCU_3V3

SYS_3V3 MCU_3V3
R6 0R
R21 0R R0402 5%
TP17 MCU_3V3
R0603 5% U4C U4D
E3 J3
VBAT VSSA
A3 E2
VDD1 AGND VSSSMPS
A6
C57 MCU_3V3 VDD_SMPS A7 VDD2 C20 C21 C22 C29 C30 C31 C26 C27 C23 C24 C25 C28 C32 C36 C37 B3
100nF A10 VDD3 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF B7 VSS1
25V,X7R C13 VDD4 25V,X7R 25V,X7R 25V,X7R 25V,X7R 25V,X7R 25V,X7R 25V,X7R 25V,X7R 25V,X7R 25V,X7R 25V,X7R 25V,X7R 25V,X7R 25V,X7R 25V,X7R B10 VSS2
C0402 D1 VDD5 C0402 C0402 C0402 C0402 C0402 C0402 C0402 C0402 C0402 C0402 C0402 C0402 C0402 C0402 C0402 C12 VSS3
R22 R24 G1 VDD6 D2 VSS4
0R 0R H13 VDD7 G2 VSS5
MCU_3V3 5% 5% L13 VDD8 H12 VSS6
R0402 R0402 M1 VDD9 L12 VSS7
DNP N4 VDD10 M2 VSS8
1.3A
L0402

N7 VDD11 M4 VSS9
N11 VDD12 M7 VSS10
VDD13 M11 VSS11
VDDLDO M10 VSS12
FB1
120R

D12 VDDLDO3 STM32H725AEI6

B4 VDDLDO2
C UFBGA169_0d5_7x7x0_6mm C
VDDLDO1
C33 10uF C0402 G12 VDDLDO
6.3V-20%-X5R C34 1uF G13 VDD50USB
AGND VDD_SMPS C0402 6.3V,X5R VDD33USB
F1
VDDSMPS C38 C39 C40 R23 0R
C35 10uF C0402 F2 100nF 100nF 100nF R0402 5%
MCU_3V3 6.3V-20%-X5R L4 2.2uH VFBSMPS 25V,X7R 25V,X7R 25V,X7R
AGND VDDA VLXSMPS E1 C0402 C0402 C0402
L1008 1.3A VLXSMPS AGND
FB2 120R LQM2HPN2R2MG0L L1
L0402 1.3A R25 0R VREF+ L2 VDDA
BLM15PD121SN1D R0402 5% VREF+
A4
R26 0R D13 VCAP1
VDD_SMPS VCAP2
R0402 5% N10 TP6
VCAP3 [5] MCU_BOOT0
STM32H725AEI6 TP8
UFBGA169_0d5_7x7x0_6mm
C49 C50 C51 TP9
2.2uF 2.2uF 2.2uF
6.3V,X5R 6.3V,X5R 6.3V,X5R VDDA
Design Note: C0402 C0402 C0402
VREF+ VLXSMPS
[5] VREF+
MCU_SMPS MODE: Default

MCU_LDO MODE:
Remove R24,L4,R26. C52 C53 C54 C55 C56
Add R22. 1uF 100nF 1uF 100nF 220pF
6.3V,X5R 25V,X7R 6.3V,X5R 25V,X7R 50V,NPO
C0402 C0402 C0402 C0402 C0402

B B

STM32H725AEI6 POWER

A A

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Title:
Wio Lite AI
Size: Document Number: Rev:
C 04 MCU POWER v1.0
Draw By: JN.FUONG Date: Wednesday, July 28, 2021 Sheet: 4 of 8
5 4 3 2 1
 5 4 3 2 1

TP14
Close header(J6) U4A
K3 K2 TP20
L3 PA0_C PC2_C K1 TP21
[5] PA1_C_A0 PA1_C PC3_C
J5 J1
[5] MCU_PA0_D9 PA0 PC0 PC0_A4 [5]
K4 J2
[7] LCD_R2 PA1 PC1 WIFI_SPI2_MOSI [8]
TP15 N1 H5 WIFI_SPI2_MISO [8]
[7] DCMI_XCLK N3 PA2 PC2 J4
[7] LCD_B5 PA3 PC3 WIFI_CHIP_EN [8]
H6 K6 PC4_A2 [5]
D [7] DCMI_HSYNC PA4 PC4 D
L4 N5
[7] LCD_R4 PA5 PC5 LCD_DE [7]
R27 33R 5% K5 F9
[7] DCMI_PCLK PA6 PC6 LCD_HSYNC [7]
J6 F10 LCD_G6 [7]
[7] LCD_VSYNC E12 PA7 PC7 F12
[7] LCD_R6 PA8 PC8 MMC1_D0 [6] OSC_OUT
C58 E11 F11 MMC1_D1 [6] R28 0R C59 22pF
[7] DCMI_D0 PA9 PC9
10pF E10 A12 R0402 5% C0402 50V,NPO
[8] BLE_UART_TXD PA10 USART1_RX PC10 MMC1_D2 [6] OSC_IN
50V,NPO F13 B11
[3] USB1_DM PA11 PC11 MMC1_D3 [6]
C0402 E13 A11 MMC1_CLK [6]
[3] USB1_DP PA12 PC12

2
D11 D3
[5] DEBUG_SWDIO PA13 PC13 OSC32_IN MCU_PC13_LED0 [8]
B12 C1 X1
[5] DEBUG_SWCLK PA14 PC14-OSC32_IN OSC32_OUT
C11 B1 25MHz 18pF
[7] LCD_R3 PA15 PC15-OSC32_OUT x4_smd_2_5x2_0mm
Layout Note: M5 D10 LCD_B1 [7]
[7] LCD_G1 L5 PB0 PD0 C10
[7] LCD_G0 PB1 PD1 MCU_PD1_FDCAN1_TX [5]
Place R27 C58 Close To MPU. L6 E9 MMC1_CMD [6]
[6] OSPI1_DQS PB2 PD2
F7 D9
[5] MCU_PB3_D12 PB3 PD3 DCMI_D5 [7]

1
B6 C9
[5] PB4_SPI_MISO PB4 PD4 OSPI1_SIO4 [6]
C6 A9 OSPI1_SIO5 [6]
[5] PB5_SPI_MOSI A5 PB5 PD5 B9
LCD_B2 [7] C60 22pF
[7] LCD_IIC1_SCL PB6 PD6
D6 D8 OSPI1_SIO7 [6] C0402 50V,NPO
[7] LCD_IIC1_SDA PB7 PD7
B5 M12
[7] LCD_B6 PB8 MCU_PD8_USART3_TX [5]
C5 USART3_TX PD8 K11
[7] LCD_B7 PB9 MCU_PD9_USART3_RX [5]
L9 USART3_RX PD9 K12
[7] LCD_G4 PB10 PD10 LCD_B3 [7]
M9 J10
[7] LCD_G5 PB11 PD11 SAI4_SDA [7]
N12 K13 SAI4_FSA [7]
[8] WIFI_SPI2_CS PB12 PD12
L11 J11 R30 33R 5%
[8] WIFI_SPI2_CLK PB13 PD13 SAI4_SCKA [7]
N13 J13
[8] BLE_UART_RXD PB14 USART1_TX UART9_RX PD14 WIFI_DEBUG_TXD [8]
M13 J12 WIFI_DEBUG_RXD [8]
[7] LCD_G7 PB15 UART9_TX PD15
STM32H725AEI6
UFBGA169_0d5_7x7x0_6mm

C C

U4B
D5 K7
[7] DCMI_D2 PE0 PG0 QSPI2_IO4 [6]
D4 L7 Layout Note:
[7] DCMI_D3 PE1 PG1 QSPI2_IO5 [6]
R8 33R 5% A2 H9 LCD_INT [7]
[7] SAI4_MCLKA B2 PE2 PG2 H10
OSPI1_RST [6] Place R32 C62 Close To MPU.
[7] SAI4_SDB PE3 PG3
A1 F8 GPIO_Audio_INT [7]
[7] DCMI_D4 PE4 PG4
C3 H11
[7] DCMI_D6 PE5 PG5 LCD_RST [7]
Layout Note: C7 C2 G9
[7] DCMI_D7 PE6 PG6 OSPI1_CS [6]
10pF G8 G10 R32 33R 5% LCD_CLK [7]
[7] DCMI_PWDN H8 PE7 PG7 G11
Place R31 C61 Close To MPU. 50V,NPO TP19
[5] MCU_PE8_D13 PE8 PG8
C0402 J8 C8 DCMI_VSYNC [7]
[6] OSPI1_SIO6 PE9 PG9
M8 A8 C62
[5] MCU_PE10_D11 PE10 PG10 QSPI2_IO6 [6]
N8 B8 10pF
[7] LCD_G3 PE11 PG11 QSPI2_IO7 [6]
L8 E8 QSPI2_CS [6] 50V,NPO
[7] LCD_B4 K8 PE12 PG12 D7
TP16 PG13_SPI_SCK [5] C0402
TP18 J9 PE13 PG13 C7
PE14 PG14 LCD_B0 [7] OSC32_OUT
N9 E7
[7] LCD_R7 PE15 PG15 OSC32_IN
F3 H1 OSC_IN
[8] MCU_PF0_LED1 E4 PF0 PH0-OSC_IN H2 OSC_OUT
[8] MCU_PF1_Button PF1 PH1-OSC_OUT
F4 N2 LCD_R0 [7]
[8] WIFI_SYNC PF2 PH2
E5 M3 X2
[5] MCU_PF3_D10 PF3 PH3 LCD_R1 [7]
MCU_3V3 G3 1 2
[6] QSPI2_CLK PF4
F5 K9 DCMI_D1 [7]
[7] LCD_BL G4 PF5 PH10 L10
LCD_R5 [7] FC-12M
[6] OSPI1_SIO3 PF6 PH11
F6 K10 DCMI_RST [7] x2_smd_2x1_2mm
[6] OSPI1_SIO2 PF7 PH12
H4 B13
[6] OSPI1_SIO0 PF8 PH13 LCD_G2 [7]
G5 A13 C63 C64
[6] OSPI1_SIO1 PF9 PH14 MCU_PH14_FDCAN1_RX [5]
R33 R34 H3 22pF 22pF
[6] OSPI1_CLK M6 PF10 E6
4.7K 4.7K MCU_BOOT0 [4] 50V,NPO 50V,NPO
[5] PF11_A1 PF11 BOOT0
5% 5% N6 C0402 C0402
[5] PF12_A3 PF12
R0402 R0402 G7 G6
[5] PF13_A5 PF13 NRST MCU_RESET [5,8]
H7 R36
[5,7] IIC4_SCL PF14
J7 C4 R35 10K MCU_3V3 10K
[5,7] IIC4_SDA PF15 PDR_ON R0402 5% 5%
STM32H725AEI6 R0402
B B
UFBGA169_0d5_7x7x0_6mm

STM32H725AEI6 GPIOS

J6
1
[5] DEBUG_SWCLK
2
[5] DEBUG_SWDIO 3 SWCLK
4 SWDIO J3
[5,8] MCU_RESET 5 GND 1
SYS_3V3 RESET
6 2 VBAT
[4] VREF+ 3V3 GND
7 3
VREF SYS_5V 5V
8 GND 4
[5] PA1_C_A0 [5] MCU_PE8_D13 D13 / PWM/TX
9 A0 5
[5] PF11_A1 10 [5] MCU_PB3_D12 6
D12 / PWM/RX
[5] PC4_A2 A1 [5] MCU_PE10_D11 D11 / PWM
11 A2 7 D10 / PWM
[5] PF12_A3 A3 [5] MCU_PF3_D10
12 8 D9 / PWM
[5] PC0_A4 13 A4 [5] MCU_PA0_D9 9
[5] PF13_A5 [5] MCU_PD1_FDCAN1_TX FDCAN2_TX
14 A5 10 FDCAN2_RX
[5] PG13_SPI_SCK 15 SCK [5] MCU_PH14_FDCAN1_RX 11 SCL
[5] PB5_SPI_MOSI MOSI [5,7] IIC4_SCL SDA
16 MISO 12
[5] PB4_SPI_MISO [5,7] IIC4_SDA
17 USART3_RX
[5] MCU_PD9_USART3_RX 18
[5] MCU_PD8_USART3_TX USART3_TX PF-2620
A 19 GND header12p_2d54_dip A
DNP
Header 1x19 2.54mm
header19p_2d54_dip
DNP
Arduino IOS

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Title:
Wio Lite AI
Size: Document Number: Rev:
C 05 MCU GPIOS v1.0
Draw By: JN.FUONG Date: Thursday, July 15, 2021 Sheet: 5 of 8
5 4 3 2 1
 5 4 3 2 1

SYS_3V3 SD_3V3

FB3 120R
D D
L0402 1.3A
BLM15PD121SN1D
C65
100nF R37 R38 R39 R40 R41 R42
25V,X7R 10K 10K 10K 10K 10K 10K
C0402 5% 5% 5% 5% 5% 5%
R0402 R0402 R0402 R0402 R0402 R0402

J4
R43 33R 5% 1
[5] MMC1_D2 DAT2
R44 33R 5% 2
[5] MMC1_D3 3 CD/DAT3
R45 33R 5%
[5] MMC1_CMD CMD
4
R46 33R 5% 5 VDD G1
[5] MMC1_CLK CLOCK GND1
6 G2
R47 33R 5% 7 VSS GND2 G3
[5] MMC1_D0 8 DAT0 GND3 G4
DAT1 microSD
R48 33R 5%
[5] MMC1_D1 GND4

L0402
472192001

1.3A
Layout Note: SIC_SD8-1_1-14_5X13_6X1_9MM

2
Place R46 C67 Close To MPU.
C67 D2 D3 D4 D5 D6 D7

FB7
120R
10pF ESDPSA0402V05
50V,NPO 5V 5V 5V 5V 5V 5V
C0402 D0402 D0402 D0402 D0402 D0402 D0402
DNP

1
C C

MicroSD CARD

Layout Note:
SYS_3V3 PSRAM_3V3
Place C60 C9 Close To VDD.
Place C68 C8 Close To VDDQ0 and VDDQ1.
FB4 120R
L0402 1.3A
BLM15PD121SN1D
C69 C9 C68 C8
100nF 10uF 100nF 100nF
25V,X7R 10V,X5R 25V,X7R 25V,X7R
C0402 C0603 C0402 C0402

B B
PSRAM_3V3

PSRAM_3V3 U3
D3 B4
[5] OSPI1_SIO0 DQ0 VDD
D2 D1
[5] OSPI1_SIO1 DQ1 VDDQ0
C4 E4 R90 R91 C70
[5] OSPI1_SIO2 D4 DQ2 VDDQ1 10K 10K 100nF
[5] OSPI1_SIO3 DQ3
R10 R9 D5 B3 5% 5% 25V,X7R
[5] OSPI1_SIO4 E3 DQ4 VSS C1
10K 10K R0402 R0402 C0402
[5] OSPI1_SIO5 DQ5 VSSQ0
5% 5% E2 E5
[5] OSPI1_SIO6 DQ6 VSSQ1
R0402 R0402 E1
[5] OSPI1_SIO7 DQ7 [5] QSPI2_IO7
DNP R49 33R 5%
[5] QSPI2_CLK
A3 A2 R0402
[5] OSPI1_CS A4 CE# NC0 A5 [5] QSPI2_IO4
R13 0R 5% DNP U6
[5] OSPI1_RST RST# NC1
R50 33R 5% B2 B1 1 8
[5] OSPI1_CLK CLK NC2 [5] QSPI2_CS /CS VCC
C3 B5 2 7
[5] OSPI1_DQS C2 DQS NC3 C5 [5] QSPI2_IO5 3 DO_IO1 IO3 6
RSU NC4 [5] QSPI2_IO6 IO2 CLK
4 5
C72 GND DI_IO0
BGA25_1_8x6x1_2MM
C71 10pF W25Q128JVSIQ
Layout Note: 10pF APS6408L-3OBM-BA Layout Note: 50V,NPO SOIC8_1D27_5_2x5_2x1_95mm
50V,NPO C0402
Place R50 C71 Close To MPU. C0402 Place R49 C72 Close To MPU. DNP
DNP

Layout Note:

Layout Note: The SPI Flash (running at up to 133MHz):

The PSRAM interface (running at up to 133MHz): 1. Route all signals at the same length within 100 Mils.
2. CLK must have a complete reference plane。
1. Mini rule of width and isolation can be changed to 4mil.
2. Route all signals at the same length within 100 Mils.
3. The controlled impedance for the single-ended traces must be 50 Ω.
A PSRAM & FLASH A

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Title:
Wio Lite AI
Size: Document Number: Rev:
C 06 SD_Card, PSRAM, FLASH v1.0
Draw By: JN.FUONG Date: Wednesday, July 28, 2021 Sheet: 6 of 8
5 4 3 2 1
 5 4 3 2 1

SYS_3V3 SYS_5V

R51 0.5K-DX-40PW B
0R
R52 5%
0R R0402
5%

42
D R0402 D
C73 100nF 1

PAD1
1

fpc40_0d5_25_4x5_25x2mm
SYS_5V SYS_3V3 C0402 25V,X7R 2
C74 100nF 3 2
C0402 25V,X7R 4 3
5 4
R53 R54 6 5
[5] LCD_R0 6
0R 0R 7
[5] LCD_R1 7
5% 5% 8
[5] LCD_R2 8
R0402 R0402 9
[5] LCD_R3 9
10
[5] LCD_R4 10
C75 100nF 11
[5] LCD_R5 11
C0402 25V,X7R 12

14
[5] LCD_R6 12
J2 13
[5] LCD_R7 13
C76 100nF 1 14

14
1 [5] LCD_G0 14
C0402 25V,X7R 2 15
2 [5] LCD_G1 15

fpc12_0d5_11_4x5_25x2mm
3 16
[5] SAI4_SCKA 3 [5] LCD_G2 16
4 17
[5] SAI4_FSA 4 [5] LCD_G3 17

AFC01-S12FCC-00
5 18
[5] SAI4_SDA 5 [5] LCD_G4 18
GND_AUD 6 19
[5] SAI4_SDB 6 [5] LCD_G5 19
7 20
[5] SAI4_MCLKA 7 [5] LCD_G6 20
8 21
[5,7] IIC4_SDA 8 [5] LCD_G7 21
9 22
[5,7] IIC4_SCL 9 [5] LCD_B0 22
10 23
[5] GPIO_Audio_INT 10 [5] LCD_B1 23
11 SYS_3V3 24
11 [5] LCD_B2 24
12 25

13
12 [5] LCD_B3 25
26
[5] LCD_B4 26
27
[5] LCD_B5 27

13
28
[5] LCD_B6 28
C GND_AUD 29 C
[5] LCD_B7 29
R55 R56 R57 30
[5] LCD_CLK 30
4.7K 4.7K 10K 31
[5] LCD_HSYNC 31
5% 5% 5% 32
[5] LCD_VSYNC 32
R0402 R0402 R0402 33
[5] LCD_DE 33
34
LCD_BL35 34
[5] LCD_BL 35
36
FB8 120R 37 36
[5] LCD_RST 37
L0402 1.3A 38
[5] LCD_INT 38
BLM15PD121SN1D R58 33R 5% 39

PAD2
[5] LCD_IIC1_SDA 39
R59 33R 5% 40
[5] LCD_IIC1_SCL 40
GND_AUD
LCD_BL R82 10K

41
R0402 5% J5

Audio LCD

B B

U8

26
SYS_5V ME6216A28M3G VDD_2V8
SOT23 24 J7

26
3 2 VDD_2V8 23 24
Vin Vout 22 23
[5,7] IIC4_SDA 22
Vss

C79 C80 C77 1uF 21

21

AFC01-S24FCC-00
C78 10uF 10uF C0402 10V,X5R 20
[5,7] IIC4_SCL 20
1uF 6.3V-20%-X5R 6.3V-20%-X5R 19
[5] DCMI_RST 19
1

10V,X5R C0402 C0402 18

[5] DCMI_VSYNC 18
C0402 VDD_2V8 VDD_1V3 17
[5] DCMI_PW DN 17
16
[5] DCMI_HSYNC 16
C81 1uF 15
R16 0R C0402 10V,X5R DVP_VDD_IO 14 15
R0402 5% 13 14
[5] DCMI_D7 13
R11 0R XCLK 12
[5] DCMI_XCLK 12

fpc24_0d5_17_4x5_25x2mm
R0402 5% 11
[5] DCMI_D6 11
C11 10
1uF 9 10
[5] DCMI_D5 9
U9 10V,X5R 8
[5] DCMI_PCLK 8
SYS_5V XC6206P132MR VDD_1V3 C0402 7
[5] DCMI_D4 7
SOT23 DNP 6
[5] DCMI_D0 6
3 2 5
Vin Vout [5] DCMI_D3 5
4
SYS_3V3 [5] DCMI_D1 4
Vss

C83 C84 3
[5] DCMI_D2 3
C82 10uF 10uF OSC1 2
1uF 6.3V-20%-X5R 6.3V-20%-X5R 4 3 R15 0R XCLK 1 2

25
VDD CLK 1
1

A 10V,X5R C0402 C0402 R0402 5% DNP A

C0402 1 2
EN GND

25
C92 24MHz 6.8pF
100nF X4-SMD-3_2X2_5X1_0MM
25V,X7R DNP
C0402 https://www.seeedstudio.com
Title:
Wio Lite AI
Camera Size: Document Number: Rev:
A3 07 LCD, CAMERA, AUDIO v1.0
Draw By: JN.FUONG Date: W ednesday, July 28, 2021 Sheet: 7 of 8
5 4 3 2 1
 5 4 3 2 1

W IFI_3V3

D D

W IFI_3V3 SYS_3V3

36
35
34
33
R62 R63 17 16 FB5 120R

36
35
34
33
4.7K 4.7K 18 PB14 VD1833 15 L0402 1.3A
5% 5% 19 PB13 GND2 14 C87 C88 BLM15PD121SN1D
R0402 R0402 20 PB16 PB3 13 LPUART_TX 10uF 100nF
21 PB17 PB1 12 LPUART_RX 6.3V-20%-X5R 25V,X7R LPUART_TX TP11
R64 33R 5% HS_USI_UART_TXD 22 GND3 PB2 11 C0402 C0402
[5] BLE_UART_TXD HS_USI_UART_RXD 23 PB20 NC1 LPUART_RX
R65 33R 5% 10 TP12
[5] BLE_UART_RXD PB21 PA25 W IFI_LED
24 9
[5] W IFI_CHIP_EN CHIP_EN PA26 8720_SWCLK
25 8 W IFI_SYNC [5] TP2
[5] W IFI_DEBUG_TXD UART_LOG_TXD PA28 8720_SWCLK
26 7
[5] W IFI_DEBUG_RXD UART_LOG_RXD PA30 8720_SWDIO 8720_SWDIO
27 6 TP5
ANT1 28 NC2 PA27 5
NC3 PA15 W IFI_SPI2_CS [5]
ANT-AMEBA-D 29 4 R93 33R 5% W IFI_SPI2_CLK [5] TP10
30 NC4 PA14 3 R94 33R 5%
GND4 PA13 W IFI_SPI2_MISO [5]
1 R61 0R 31 2 R95 33R 5% W IFI_SPI2_MOSI [5]
R0402 5% 32 RF_ANT PA12 1
GND5 GND1
2

C85 C86
10pF 10pF U10
50V,NPO 50V,NPO RTL8720 Module
C0402 C0402 Module32_0d8_13x12mm
DNP DNP

C Layout Note: C

The antenna needs to take 50R impedanc

WIFI & Bluetooth

MCU_3V3 MCU_3V3 W IFI_3V3 SYS_3V3

MCU_3V3 MCU_3V3

R70 R71 R72 R73

R68 R69 680R 680R 680R 680R
10K 10K 5% 5% 5% 5%
5% SW 1 5% SW 2 R0402 R0402 R0402 R0402
R0402 1 2 R0402 1 2

1
B LED2 LED3 B
3 4 3 4 Red Yellow LED5
Layout Note: led0402 led0402 LED4 Green
Blue led0402
Place C89 Close To MPU. led0402
C89 100nF C90 100nF

2
C0402 25V,X7R C0402 25V,X7R

3
2 10K Q1A 5 10K Q1B
DDC114YU DDC114YU
[5] MCU_RESET
47K SMini6-F3-B 47K SMini6-F3-B
R74 R75
[5] MCU_PF1_Button
100K 100K

4
5% 5%
R0402 R0402

[5] MCU_PC13_LED0

[5] MCU_PF0_LED1
W IFI_LED

A LED & Button A

https://www.seeedstudio.com
Title:
Wio Lite AI
Size: Document Number: Rev:
A3 08 W IFI, LED v1.0
Draw By: JN.FUONG Date: Thursday, July 15, 2021 Sheet: 8 of 8
5 4 3 2 1