DIGITAL COMMUNICATION

LAB FILE

NAME :- Rishav Dev

ROLL No :- UE215081

CLASS :- BE - ECE

SEMESTER :- 6th (Group - 2)

Submitted To :- Ms. Shiva Sharma

pg. 1
 INDEX
S No. Name of Experiment Page Date Signature &
No. Remarks

1. To study the Amplitude Shift Keying 3-6 07/02/2024

2. To study the Phase Shift Keying 7-10 14/02/2024

3. To study the Frequency Shift Keying 11-15 21/03/2024

4. To study the Time Division 16-19 06/03/2024

Multiplexing (TDM).

5. To study Pulse Code Modulation & 20-23 23/04/2024

Demodulation technique.

6. To study Delta Modulation and 24-27 10/04/2024

Demodulation

7. To study Viterbi Algorithm. 28 10/04/2024

pg. 2
 EXPERIMENT-1

AIM :- To study the Amplitude Shift Keying modulator and demodulator.

Apparatus Used:- ASK Modulator/Demodulator Trainer kit (ST 2106, ST 2107), Data Bit
Generator, CRO, CRO Probes.
Theory :-
The simplest method of modulating a carrier with a carrier stream is to change the amplitude
of carrier wave every time the data changes. The modulation technique is known as Amplitude
Shift Keying.
In ASK, a high-amplitude carrier signal is used to represent a binary ‘1,’ and a low-amplitude
carrier signal represents a binary ‘0.’
It involves the superimposition of a carrier signal and a digital message signal. The carrier
signal is often a high-frequency sinusoidal waveform, which serves as the carrier for the
digital information. The binary message signal, consisting of ‘1’s and ‘0’s, is used to control
the amplitude of the carrier signal. The resultant signal formed after the superimposition of
message and carrier is transmitted over the communication channel.

Demodulation in Amplitude Shift Keying (ASK) involves extracting the original digital
message signal from the modulated carrier wave. The process reverses the modulation
applied to the carrier signal. The demodulation of ASK can be performed through various
methods, such as envelope detection or coherent detection.

Block diagram:
a) ASK Modulator

pg. 3
b) ASK Demodulator

Procedure :-
1. Turn ON the trainer kits. Monitor NRZ O/P from ST2106 trainer on one channel of the
CRO. Use the other channel to monitor the O/P of modulator 1 in ST2106 trainer.
2. Adjust potentiometer till the O/P is not a 2Vpp signal is ‘ON’ state to calculate gain.
3. Adjust modulation offset till the amplitude of the off signal is as close to zero as
possible.
4. Adjust Carrier offset till the off level occurs midway between the ON signal peaks.
5. Observe O/P at the ASK demodulator & LPF on ST2107 trainer.
6. Adjust the bias level till the O/P signal pulse width is not similar to the data pulse
width.
Connections:
a) ASK Modulation Setup:

b) Ask Demodulation Setup:

pg. 4
Observations:-

Fig.i) Input Data Stream Fig.ii) Carrier Waveform

Fig.iii) ASK Modulated Wave

Fig.iv) LPF Output Fig.v) ASK Demodulated Wave

Result: The ASK modulator and demodulator circuit has been studied.
Precautions:
1. Check the connections before switched ON the kit.
2. Observations should be taken properly.

pg. 5
 EXPERIMENT-2

AIM : To study the Phase Shift Keying modulator and demodulator.

Apparatus used: PSK Modulator/Demodulator Trainer kit, Binary Data Generator, CRO, CRO
Probes.

Theory :

Phase Shift Keying PSK is the digital modulation technique in which the phase of the carrier
signal is changed by varying the sine and cosine inputs at a particular time. PSK technique is
widely used for wireless LANs, bio-metric, contactless operations, along with RFID and
Bluetooth communications.

PSK is of two types, depending upon the phases the signal gets shifted. They are −

1. Binary Phase Shift Keying (BPSK) : This is also called as 2-phase PSK or Phase Reversal
Keying. In this technique, the sine wave carrier takes two phase reversals such as 0°
and 180°. BPSK is basically a Double Side Band Suppressed Carrier (DSBSC) modulation
scheme, for message being the digital information.

2. Quadrature Phase Shift Keying (QPSK) : This is the phase shift keying technique, in
which the sine wave carrier takes four phase reversals such as 0°, 90°, 180°, and 270°.

Functionally, the PSK modulator is very similar to the ask modulator. Both uses balanced
modulator to multiply the carrier with the multiplying signal. But in the contrast to ASK
techniques, the digital signal applied to the modulator input for PSK generation is bipolar i.e.
have equal +ve and -ve voltage levels. The unipolar-bipolar converter converts the unipolar
data stream to bipolar data. At receiver, the square loop detector circuit is used to
demodulate the transmitted PSK signal. The incoming PSK signal with 0 & 180 phase changes
is first fed to the signal square, which multiplies the input signal by itself. The phase adjust
circuit allows the phase of the digital signal to the adjusted w.r.t. the input PSK signal. Also,
its O/P controls the closing of an analog switch. When the output is high the switch closes &
the original PSK signal is switched through the detector.

pg. 6
 BLOCK DIGRAM:

Fig: BPSK DEMODULATOR

PROCEDURE:

1. Connections to be done on ST2106 trainer kit.

2. Carrier input modulator 1 to 960 KHz carrier.
3. NRZ(M) output t.p 6 to unipolar-bipolar converter input.
4. Unipolar-Bipolar converter output t.p modulator1 input.
5. Connections between ST2106 & ST2107 trainers: Modulator 1 output to PSK
demodulator input.
6. Connections on ST2107 trainer:
7. PSK demodulator output to LPF input.
8. LPF output to comparator input.
9. Comparator output to bit decoder input.
10. Switch ON the trainer kits and monitor the modulator output in ST2106 trainer with
reference to its input by using a dual trace CRO.
11. To see PSK demodulator process examine the input PSK demodulator on ST2107 trainer
with the demodulator output. Adjust the phase control knob & see its effect on thw
demodulator’s output. Check the various test points provided at the O/P of the
functional blocks of the PSK demodulator.
12. The O/P of the demodulator goes to the LPF input. Monitor the filters output with the
reference to its input.

pg. 7
 13. The LPF output is rounded and cannot be used for digital processing. In order to square
up the waveform, comparators are used. The Bias control is adjusted so that the
comparator’s output pulse width at 47 is same as the NRZ(M) pulse width.

CONNECTIONS:

Fig: PSK modulation Fig : PSK demodulation

OBSERVATIONS :

a) Input Bit Stream b) Bipolar Bit Stream

c) Carrier Signal d) PSK Signal

pg. 8
 e) Demodulated Wave f) Bipolar Demodulated Wave

g) PSK Demodulated Stream

Result : The PSK modulator an demodulator circuit has been studied.

Precautions :
1. Check the connections before switching ON the kit.
2. Observations should be taken carefully.

pg. 9
 EXPERIMENT-3

AIM : To study the Frequency Shift Keying modulator and demodulator.

Apparatus used: FSK Modulator/Demodulator Trainer kit, Binary Data Generator, CRO, CRO
Probes.

Theory :

Frequency Shift Keying :FSK is the digital modulation technique in which the frequency of the
carrier signal varies according to the digital signal changes. FSK is a scheme of frequency
modulation.

The output of a FSK modulated wave is high in frequency for a binary High input and is low in
frequency for a binary Low input. The binary 1s and 0s are called Mark and Space frequencies.

The following image is the diagrammatic representation of FSK modulated waveform along
with its input.

FSK Modulator

The FSK modulator block diagram comprises of two oscillators with a clock and the input
binary sequence. Following is its block diagram.

pg. 10
FSK Demodulator

There are different methods for demodulating a FSK wave. The main methods of FSK
detection are asynchronous detector and synchronous detector. The synchronous detector
is a coherent one, while asynchronous detector is a non-coherent one.

1. Asynchronous FSK Detector

The block diagram of Asynchronous FSK detector consists of two band pass filters, two
envelope detectors, and a decision circuit. Following is the diagrammatic representation.

The FSK signal is passed through the two Band Pass Filters BPFs, tuned
to Space and Mark frequencies. The output from these two BPFs look like ASK signal, which
is given to the envelope detector. The signal in each envelope detector is modulated
asynchronously.

The decision circuit chooses which output is more likely and selects it from any one of the
envelope detectors. It also re-shapes the waveform to a rectangular one.

2. Synchronous FSK Detector

The block diagram of Synchronous FSK detector consists of two mixers with local oscillator
circuits, two band pass filters and a decision circuit. Following is the diagrammatic
representation.

pg. 11
The FSK signal input is given to the two mixers with local oscillator circuits. These two are
connected to two band pass filters. These combinations act as demodulators and the decision
circuit chooses which output is more likely and selects it from any one of the detectors. The
two signals have a minimum frequency separation.

For both of the demodulators, the bandwidth of each of them depends on their bit rate. This
synchronous demodulator is a bit complex than asynchronous type demodulators.

Procedure:

FSK Modulation:

1. Connect the signal generator to the FSK modulator input.

2. Set the parameters on the signal generator for the desired carrier frequency and data
signal.
3. Observe the modulated signal output on the oscilloscope.

FSK Demodulation:

1. Connect the FSK modulated signal output to the FSK demodulator.

2. Connect the demodulator output to the oscilloscope.
3. Adjust the parameters of the demodulator as necessary.
4. Observe the demodulated signal on the oscilloscope.

Connections :

Fig: FSK Modulation

pg. 12
Observations :

Fig: FSK Modulation Waveform Fig: Unipolar Waveform

Fig: Input and its inverted output Fig: 1st Carrier

Fig: 2nd Carrier Fig: 1st ASK Modulated signal

pg. 13
 Fig: FSK Modulated Output Fig: Demodulated output

Result : FSK modulation and demodulation has been studied.

Precautions :
1. Check the connections before switching ON the kit.
2. Observations should be taken carefully.

pg. 14
 EXPERIMENT-4

AIM : To study the Time Division Multiplexing (TDM).

Apparatus Required : TDM Trainer Kit, CRO, patch chords.
Theory :
The TDM is used for transmitting several analog message signal over a communication channel
by dividing the time frame Into slots, one slot for each message signal. The four l/P signals, all
band limited by the Input filter are sequentially sampled, the O/P of which is PAM Waveform
containing samples of the I/P signal periodically interested in time. The samples from adjacent
I/P messages channels are separated by T s/m, where M is the number of I/P Channels. A set
of M pulses consisting of one sample from each of the l/P M-I/P channel is called imin.
At receiver the samples from Individual channel are separated by carefully synchronizing and
are critical part TDM. The samples from each channel are filtered to reproduced the original
message signal. There are two level of synchronisation is necessary to establish. When each
group of sample begins and word synchronisation is necessary to properly separate the
samples within each frame.
Procedure :
1. Connect the circuit as shown in fig.
2. Switch ON the power supply.
3. Set the following initial conditions :
i) Mode switch in Fast position.
ii) DC1 & DC2 controls in semi generation block fully clockwise.
iii) 1 kHz & 2 kHz signal control levels set to give 10 Vpp.
iv) Error check code -> A=0,B=0.
v) All switched faults OFF.
4. Now connect only 1 kHz O/P to CRO. Turn on the power & check PAM O/P of 1 kHz
sine wave is available at I/Ps of the kit.
5. Now, also connect 2kHz supply to the CH1. Connect channel 1 of CRO to tp 12 &
channel 2 of CRO to tp 15.
6. Observe the waveform.

pg. 15
Connections :

Fig: TDM Modulation and Demodulation

Observations:

Fig: 1KHz Input Signal Fig: 2KHz Input Signal

Fig: TDM Signal Fig: TDM Signal with 2nd channel open

pg. 16
Fig: TDM signal when both the channels are short for 1st channel i.e. CH0

Fig: Input and TDM output for CH0

Fig: Input and TDM output for CH0 and CH1

pg. 17
 Fig: TDM signal for 2nd channel when CH0 and CH1 are short

Fig: Input and TDM output for CH0 when CH1 is open

Fig: Input and TDM output for CH0 and CH1 when CH0 is open

pg. 18
 Fig: Input and TDM output for CH0 and CH1

Fig: 1KHz Output Signal (Demodulated output)

Fig: 2KHz Output Signal (Demodulated output)

Result : TDM system has been studied.

pg. 19
 EXPERIMENT-5

Aim : To study Pulse Code Modulation & Demodulation technique.

Apparatus Required : PCM modulation / demodulation ST2103 trainer kit, CRO, Connecting
leads.
Theory : Pulse Code Modulation technique involves following steps:
The analog signal is sampled according to the Nyquist criteria. The Nyquist criteria states that
the faithful reproduction of a band limited signal, the sampling rate must be at least twice the
highest frequency component present in the signal.
So, sampling frequency >= 2fm, where fm is the max. frequency component present in the
signal.

The transmitter section of a Pulse Code Modulator circuit consists of Sampling,

Quantizing and Encoding, which are performed in the analog-to-digital converter section. The
low pass filter prior to sampling prevents aliasing of the message signal.

The basic operations in the receiver section are regeneration of impaired signals,
decoding, and reconstruction of the quantized pulse train. Following is the block diagram of
PCM which represents the basic elements of both the transmitter and the receiver sections.

pg. 20
In Pulse Code Modulation, the message signal is represented by a sequence of coded pulses.
This message signal is achieved by representing the signal in discrete form in both time and
amplitude.
Instead of a pulse train, PCM produces a series of numbers or digits, and hence this process is
called as digital. Each one of these digits, though in binary code, represent the approximate
amplitude of the signal sample at that instant.

Procedure :
1. Ensure that the MODE switch should be in Fast mode.
2. Connect CH 0 & CH 1 to DC1 & DC2.
3. Ensure that the DC1 & DC2 controls in Function Generator Block should be in fully
clockwise direction & 1KHz & 2KHz signal controls set art 10Vpp.
4. Now turn ON the kit & see that the LED glows.
5. With the help of Digital Voltmeter, adjust the DC1 amplitude control until the DC1 O/P
measures 0V.
6. Observe the O/P on the A/D Converter Block LED’s (D0 to D6). The LED’s represent the
state of the binary PCM word allocated to the PAM sample being processed.
7. Adjust DC input from +5V to -5V in steps of 1V.
8. Observe the output of +5V.
9. Turn the DC1 control fully anticlockwise & repeat the above procedure by varying the
DC2 control.
10. Trigger the dual trace oscilloscope externally by the CH1 signal available at t.p.12 &
observe the signal at CH 0 & CH1 with reference to the signal.
11. Now connect the oscilloscope channel 1 to CH! Sample & sketch the three waveforms.

Connections:

Fig: PCM Modulator and Demodulator

pg. 21
Observations:

Fig: Input and demodulated output of PCM for CH0 (1KHz)

Fig: Input and TDM output of CH0

Fig: Input and TDM output for CH0 and CH1

Fig: Input and demodulated output of PCM for CH1 (2KHz)

pg. 22
 Fig: Input and TDM output of CH1

Fig: Input and TDM output for CH0 and CH1

Fig: Input and PCM output modulated

Result : The PCM Modulation/ Demodulation studied.

Precaution:
1. Connections should be checked before switching ON the kit.
2. Observations should be taken properly.

pg. 23
 EXPERIMENT-6

Aim : To study Delta Modulation and Demodulation.

Apparatus Required : Delta Modulation/Demodulation Trainer, CRO, Connecting leads.

Theory :

Following are some of the features of delta modulation.

• An over-sampled input is taken to make full use of the signal correlation.

• The quantization design is simple.
• The input sequence is much higher than the Nyquist rate.
• The quality is moderate.
• The design of the modulator and the demodulator is simple.
• The stair-case approximation of output waveform.
• The step-size is very small, i.e., Δ delta.
• The bit rate can be decided by the user.
• This involves simpler implementation.

Delta Modulation is a simplified form of DPCM technique, also viewed as 1-bit DPCM
scheme. As the sampling interval is reduced, the signal correlation will be higher.

The Delta Modulator comprises of a 1-bit quantizer and a delay circuit along with two
summer circuits. Following is the block diagram of a delta modulator.

Procedure :
1. Make connections as per diagram.
2. Ensure that the clock frequency selector block switches A & B are in A=0 and B=0 position.
3. Now turn On the kit and see that LED glows .
4. In order to ensure for the correct operation of the system, we first connect O volts to the
+ve input of the comparator. Now observe the output of the integrator 1 (i.e. tp 17) and the

pg. 24
output of transmitter's level changer (i.e. tp 15). When the positive and negative output levels
of the level changer will be equal the output will be a triangular waveform as shown in fig3
(Case A). When the negative level is greater than positive level, the integrator's output level
will be as shown in fig3 (Case B). And when the positive output level is greater, then the
integrator' output will be as shown in fig3 (Case C). The levels can be adjusted by turning the
potentiometer from one extreme to another.
5. Adjust the transmitter's level changer preset until the output of integrator is a triangular
wave centered at 0 volts. The peak to peak amplitude of the wave should be 0.5 volts
(approx.), this amplitude is known as the integrator Step Size.
6. Now observe the output of the transmitter's bistable circuit (i.e. tp 14). It is now a stream
of alternate '1' and 'O'. This is the output of a delta modulator and the Delta modulator is now
said to be balanced for correct operation.
7. Now examine the output of integrator at the receiver (i.e. tp 47). It should be a triangular
wave with step size equal to that of integrator in transmitter and ideally centered around 0
volts. 8. Now observe the output of low pass filter. It will be a DC level centered around 0 volts.
This is the output of Delta dernodulator and it is balanced for correct operation.
9. Now disconnect the 0 volts from the +ve input of the comparator and reconnect it to 250
Hz signal of the function generator block. Now observe the output of voltage comparator (tp
9), integrator (tp 17). Also observe the delta modulated output at the output of bistable
circuit. It has been encoded into stream of '0' and '1'
10. Also observe the output of low pass filter in the receiver (tp 51), which is the output of
demodulator.
11. Now disconnect 250 Hz from the +ve input of comparator and reconnect it to 500 Hz, 1
Khz, and 2 Khz outputs in turn. Now note the frequency of the analog signal increases, so the
low pass filter's output becomes more distorted and reduced in amplitude. This effect is
known as 'Slope Overloading'.
Observations:

Fig: Input Signal Fig: Comparator Output

pg. 25
Fig: Unipolar to Bipolar Output Fig: Bistable Circuit Output

Fig: Integrator Output Fig: Clock Signal

Fig: Bistable Input Fig: Bistable Output

pg. 26
 Fig: Unipolar to Bipolar Output Fig: LPF Output

Result: The Delta modulation / demodulation and Slope Overloading effect has been studied.
Precautions:
1. The connections should be made properly and tightly.
2. Check all the connections before switching ON the kit.

pg. 27
 EXPERIMENT-7

AIM : To study Viterbi Algorithm.

Theory :
The Viterbi algorithm operates on a state machine assumption. That is, at any time the system
being modelled is in some state. There are a finite number of states, however large. Multiple
sequences of states (paths) can lead to a given state, but one is the most likely path to that
state, called the "survivor path". This is a fundamental assumption of the algorithm because
the algorithm will examine all possible paths leading to a state and only keep the one most
likely. This way the algorithm does not have to keep track of all possible paths, only one per
state.
A second key assumption is that a transition from a previous state to a new state is marked by
an incremental metric, usually a number. This transition is computed from the event. The third
key assumption is that the events are cumulative over a path in some sense, usually additive.
So the crux of the algorithm is to keep a number for each state. When an event occurs, the
algorithm examines moving forward to a new set of states by combining the metric of a
possible previous state with the incremental metric of the transition due to the event and
chooses the best. The incremental metric associated with an event depends on the transition
possibility from the old state to the new state. For example in data communications, it may be
possible to only transmit half the symbols from an odd numbered state and the other half
from an even numbered state. Additionally, in many cases the state transition graph is not
fully connected. A simple example is a car that has 3 states forward, stop and reverse and a
transition from forward to reverse is not allowed. It must first enter the stop state. After
computing the combinations of incremental metric and state metric, only the best survives
and all other paths are discarded. There are modifications to the basic algorithm which allow
for a forward search in addition to the backwards one described here.
Path history must be stored. In some cases, the search history is complete because the state
machine at the encoder starts in a known state and there is sufficient memory to keep all the
paths. In other cases, a programmatic solution must be found for limited resources: one
example is convolutional encoding, where the decoder must truncate the history at a depth
large enough to keep performance to an acceptable level. Although the Viterbi algorithm is
very efficient and there are modifications that reduce the computational load, the memory
requirements tend to remain constant.

pg. 28
 Experiment :- 7
AIM :- Implementation of Viterbi algorithm using C-language.
THEORY:- Finding most probable sequence of hidden states: We often wish to take a
particular HMM, and determine from an observation sequence the most likely sequence of
underlying hidden states that might have generated it.

Sunny Sunny Sunny

Coudy doudy doudy

Rainy Rainy Rairy

Observatlons : dry damp soggy

" We can find the most probable sequence of hidden states by listing all possible sequences
of hidden states and finding the probability of the observed sequence for each of the
combinations. The most probable sequence of hidden states is that combination that
maximizes Pr (observed sequence | hidden state combination).
The most probable sequence of hidden states is the sequence that maximizes :
Pr(dry,damp,soggy sunny,sunny,unny),
Prdry,damp,soggy | sunny,sunny,cloudy),
Pr(dry, damp,soggy | sunny,sunny,rainy),.
Pr(dry,damp,soggy | rainy,rainy,rainy)
"This approach is viable, but to find the most probable sequence by exhaustively calculating
cach combination is computationally expensive. As with the forward algorithm, we can use
the
time invariance of the probabilities to reduce the complexity of the calculation.
Reducing complexity using recursion
 " Consider recursively finding the most probable sequence of hidden states given
observation sequence and aHMM. We will first define the partial probability 6, which is the
probabilityy of reaching aparticular intermediate state. Also howthese partial probabilities are
calculated at t =1 and at t =n >1).
" These partial probabilities diffrer from those calculated in the forward algorithm since they
state at time t, and not a total
represent the probability of the most probable path to a
" Partial probabilities (8's) and partial best paths: Consider the states and first order
transitions for the observation sequence dry,damp,sOggy;
t=1

Sunny Sunny Sunry

Couty Coudy doucty

Raly Ralny Ralny

dry damp sogiy

For each intermediate and terminating state there is a most probable path to that state. So. for
example, each of the three states at t = 3 will have a most probable path to it, perhaps like
this;

"We will call these paths partial best paths. Each of these partial best paths has an
associacu
probability, the partial probability or 8. Unlike the partial probabilities in the forward
algorithm, is the probability of the one (most probable) path to the state.
"Thus 8(i,t) is the maximum probability of all sequences ending at state i at time t, ana
u
partial best path is the sequence which achieves this maximal probability. Such a
(and partial path) exists for each possible value of I and t. probouy
 .Calculating 's at time t=1
Calculatetheepartial probabilities as the most
particularknowledge such as probable route to
and probabilities of the our current position (given
observation
most probable path to a state does not previous state).
sensibly
being in that state giventt=l and the observable stateexist;
the
however we
When t =1
kl use the
probability of

85() = ()bik
"as in the forward algorithm, this quantity is compounded by the
probability. appropriate observation
.Calculating 8's at time t (> 1 )

"The partialI probabilities at time t can be

calculated in terms of the &'s at time t-1as
follows :

OB

T< t-1 t-1

. We consider calculating the most probable path to the state X at time t; this path to X
will
have to pass through one of the states A, B or C at time (t-1).
"Therefore the most probable path to
Xwill be one of (sequence of states), ..., A,
X(sequence of states), ..., B,
Xor (sequence of states),..., C, X
*Ine path ending AX, BX or CX which has the maximum probability. Recall that the
akoV sSumption says that the probability of a state occurring given a previous state
quence depends only on the previous n states. In particular, with a first order Markov
astmption, the probability of Xoccurring after a sequence depends only on the previous
state, i.e.
 " Pr (most probable path to A). Pr (X |A). Pr (observation | X) the
path will be probability of this
"Pr (most probable path to A). Pr (X|A). Pr (observation | X). So, the probability af a.
most probable path to X is :
Pr(X at time t) =
max,=A,B,a Pri at time (t- 1) x
Pr(x|) x Pr(obs. at time t|x)
" where the first term is given by 8 at t-1, the second by the transition probabilities and the
third by the observation probabilities.

"Generalizing the above expression, the probability of the partial best path to astate l at time
t when the observation kt is given by:

&,(1) = max(&-1(j)ayibi.)
" Assuming knowledge of the previous state, using the transition probabilities and
multiplying by the appropriate observation probability.
" Back pointers, D's
t1 t-3

Suny Sunny Sunny

If lam here, by what

route is it most likely Ooudy Cloudy Coucly

Iarrived?'
Ralny Raly Raly

ry tkamp

" At each intermediate and end state we know the partial probability, ö(i,). However
the aim is to find the most probable sequence of states given an observation sequence -
herefore we need some way of remembering the partial best paths through the trellis.
" Recall that to calculate the partial probability, at time t we only need the 's for time tl.
Having calculated this partial probability, it is thus possible to record which preceding stale
was the one to generate (i,t) - that is, in what state the system must have been at time
is to arrive optimally at state i at time t. This recording (remembering) is done by holding tor
 optimally provokes the current
state a back pointer which points to the predecessor that
ch
ate. Formally, we can write
-) =argmaz;(6,-1(j)4)
"
the index jwhich maximizes the bracketed expression.
Here, the argmax operator selects observations of
algorithm provides a computationally eficient way of analyzing
he Viterbi underlying state sequence. It exploits recursion to reduce
IMs to recapture the most likely of the entire sequence to make judgments,
thereby
computational load, and uses the context
noise. In use, the algorithm proceeds through an execution trellis
llowing good analysis of together with a back-pointer indicating how that
calculating a partial probability for each cell,
completion, the most likely final state is taken as
cell could most probably be reached. On pointers.
correct, and the path to it traced back to t=1 via the back